1 /* Simulator model support for m32rxf.
3 THIS FILE IS MACHINE GENERATED WITH CGEN.
5 Copyright (C) 1996, 1997, 1998 Free Software Foundation, Inc.
7 This file is part of the GNU Simulators.
9 This program is free software; you can redistribute it and/or modify
10 it under the terms of the GNU General Public License as published by
11 the Free Software Foundation; either version 2, or (at your option)
14 This program is distributed in the hope that it will be useful,
15 but WITHOUT ANY WARRANTY; without even the implied warranty of
16 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 GNU General Public License for more details.
19 You should have received a copy of the GNU General Public License along
20 with this program; if not, write to the Free Software Foundation, Inc.,
21 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
25 #define WANT_CPU m32rxf
26 #define WANT_CPU_M32RXF
30 /* The profiling data is recorded here, but is accessed via the profiling
31 mechanism. After all, this is information for profiling. */
33 #if WITH_PROFILE_MODEL_P
35 /* Model handlers for each insn. */
38 model_m32rx_x_invalid (SIM_CPU *current_cpu, void *sem_arg)
40 #define FLD(f) abuf->fields.fmt_empty.f
41 ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
45 int UNUSED insn_referenced = abuf->written;
49 cycles += m32rxf_model_m32rx_u_exec (current_cpu, abuf->idesc, 0, referenced, sr, sr2, dr);
56 model_m32rx_x_after (SIM_CPU *current_cpu, void *sem_arg)
58 #define FLD(f) abuf->fields.fmt_empty.f
59 ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
63 int UNUSED insn_referenced = abuf->written;
67 cycles += m32rxf_model_m32rx_u_exec (current_cpu, abuf->idesc, 0, referenced, sr, sr2, dr);
74 model_m32rx_x_before (SIM_CPU *current_cpu, void *sem_arg)
76 #define FLD(f) abuf->fields.fmt_empty.f
77 ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
81 int UNUSED insn_referenced = abuf->written;
85 cycles += m32rxf_model_m32rx_u_exec (current_cpu, abuf->idesc, 0, referenced, sr, sr2, dr);
92 model_m32rx_x_cti_chain (SIM_CPU *current_cpu, void *sem_arg)
94 #define FLD(f) abuf->fields.fmt_empty.f
95 ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
99 int UNUSED insn_referenced = abuf->written;
103 cycles += m32rxf_model_m32rx_u_exec (current_cpu, abuf->idesc, 0, referenced, sr, sr2, dr);
110 model_m32rx_x_chain (SIM_CPU *current_cpu, void *sem_arg)
112 #define FLD(f) abuf->fields.fmt_empty.f
113 ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
117 int UNUSED insn_referenced = abuf->written;
121 cycles += m32rxf_model_m32rx_u_exec (current_cpu, abuf->idesc, 0, referenced, sr, sr2, dr);
128 model_m32rx_x_begin (SIM_CPU *current_cpu, void *sem_arg)
130 #define FLD(f) abuf->fields.fmt_empty.f
131 ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
135 int UNUSED insn_referenced = abuf->written;
139 cycles += m32rxf_model_m32rx_u_exec (current_cpu, abuf->idesc, 0, referenced, sr, sr2, dr);
146 model_m32rx_add (SIM_CPU *current_cpu, void *sem_arg)
148 #define FLD(f) abuf->fields.fmt_add.f
149 ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
153 int UNUSED insn_referenced = abuf->written;
159 referenced |= 1 << 0;
160 referenced |= 1 << 2;
161 cycles += m32rxf_model_m32rx_u_exec (current_cpu, abuf->idesc, 0, referenced, sr, sr2, dr);
168 model_m32rx_add3 (SIM_CPU *current_cpu, void *sem_arg)
170 #define FLD(f) abuf->fields.fmt_add3.f
171 ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
175 int UNUSED insn_referenced = abuf->written;
181 referenced |= 1 << 0;
182 referenced |= 1 << 2;
183 cycles += m32rxf_model_m32rx_u_exec (current_cpu, abuf->idesc, 0, referenced, sr, sr2, dr);
190 model_m32rx_and (SIM_CPU *current_cpu, void *sem_arg)
192 #define FLD(f) abuf->fields.fmt_add.f
193 ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
197 int UNUSED insn_referenced = abuf->written;
203 referenced |= 1 << 0;
204 referenced |= 1 << 2;
205 cycles += m32rxf_model_m32rx_u_exec (current_cpu, abuf->idesc, 0, referenced, sr, sr2, dr);
212 model_m32rx_and3 (SIM_CPU *current_cpu, void *sem_arg)
214 #define FLD(f) abuf->fields.fmt_and3.f
215 ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
219 int UNUSED insn_referenced = abuf->written;
225 referenced |= 1 << 0;
226 referenced |= 1 << 2;
227 cycles += m32rxf_model_m32rx_u_exec (current_cpu, abuf->idesc, 0, referenced, sr, sr2, dr);
234 model_m32rx_or (SIM_CPU *current_cpu, void *sem_arg)
236 #define FLD(f) abuf->fields.fmt_add.f
237 ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
241 int UNUSED insn_referenced = abuf->written;
247 referenced |= 1 << 0;
248 referenced |= 1 << 2;
249 cycles += m32rxf_model_m32rx_u_exec (current_cpu, abuf->idesc, 0, referenced, sr, sr2, dr);
256 model_m32rx_or3 (SIM_CPU *current_cpu, void *sem_arg)
258 #define FLD(f) abuf->fields.fmt_or3.f
259 ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
263 int UNUSED insn_referenced = abuf->written;
269 referenced |= 1 << 0;
270 referenced |= 1 << 2;
271 cycles += m32rxf_model_m32rx_u_exec (current_cpu, abuf->idesc, 0, referenced, sr, sr2, dr);
278 model_m32rx_xor (SIM_CPU *current_cpu, void *sem_arg)
280 #define FLD(f) abuf->fields.fmt_add.f
281 ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
285 int UNUSED insn_referenced = abuf->written;
291 referenced |= 1 << 0;
292 referenced |= 1 << 2;
293 cycles += m32rxf_model_m32rx_u_exec (current_cpu, abuf->idesc, 0, referenced, sr, sr2, dr);
300 model_m32rx_xor3 (SIM_CPU *current_cpu, void *sem_arg)
302 #define FLD(f) abuf->fields.fmt_and3.f
303 ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
307 int UNUSED insn_referenced = abuf->written;
313 referenced |= 1 << 0;
314 referenced |= 1 << 2;
315 cycles += m32rxf_model_m32rx_u_exec (current_cpu, abuf->idesc, 0, referenced, sr, sr2, dr);
322 model_m32rx_addi (SIM_CPU *current_cpu, void *sem_arg)
324 #define FLD(f) abuf->fields.fmt_addi.f
325 ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
329 int UNUSED insn_referenced = abuf->written;
335 referenced |= 1 << 0;
336 referenced |= 1 << 2;
337 cycles += m32rxf_model_m32rx_u_exec (current_cpu, abuf->idesc, 0, referenced, sr, sr2, dr);
344 model_m32rx_addv (SIM_CPU *current_cpu, void *sem_arg)
346 #define FLD(f) abuf->fields.fmt_addv.f
347 ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
351 int UNUSED insn_referenced = abuf->written;
357 referenced |= 1 << 0;
358 referenced |= 1 << 2;
359 cycles += m32rxf_model_m32rx_u_exec (current_cpu, abuf->idesc, 0, referenced, sr, sr2, dr);
366 model_m32rx_addv3 (SIM_CPU *current_cpu, void *sem_arg)
368 #define FLD(f) abuf->fields.fmt_addv3.f
369 ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
373 int UNUSED insn_referenced = abuf->written;
379 referenced |= 1 << 0;
380 referenced |= 1 << 2;
381 cycles += m32rxf_model_m32rx_u_exec (current_cpu, abuf->idesc, 0, referenced, sr, sr2, dr);
388 model_m32rx_addx (SIM_CPU *current_cpu, void *sem_arg)
390 #define FLD(f) abuf->fields.fmt_addx.f
391 ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
395 int UNUSED insn_referenced = abuf->written;
401 referenced |= 1 << 0;
402 referenced |= 1 << 2;
403 cycles += m32rxf_model_m32rx_u_exec (current_cpu, abuf->idesc, 0, referenced, sr, sr2, dr);
410 model_m32rx_bc8 (SIM_CPU *current_cpu, void *sem_arg)
412 #define FLD(f) abuf->fields.cti.fields.fmt_bc8.f
413 ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
417 int UNUSED insn_referenced = abuf->written;
419 if (insn_referenced & (1 << 2)) referenced |= 1 << 1;
420 cycles += m32rxf_model_m32rx_u_cti (current_cpu, abuf->idesc, 0, referenced, sr);
427 model_m32rx_bc24 (SIM_CPU *current_cpu, void *sem_arg)
429 #define FLD(f) abuf->fields.cti.fields.fmt_bc24.f
430 ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
434 int UNUSED insn_referenced = abuf->written;
436 if (insn_referenced & (1 << 2)) referenced |= 1 << 1;
437 cycles += m32rxf_model_m32rx_u_cti (current_cpu, abuf->idesc, 0, referenced, sr);
444 model_m32rx_beq (SIM_CPU *current_cpu, void *sem_arg)
446 #define FLD(f) abuf->fields.cti.fields.fmt_beq.f
447 ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
451 int UNUSED insn_referenced = abuf->written;
453 if (insn_referenced & (1 << 3)) referenced |= 1 << 1;
454 cycles += m32rxf_model_m32rx_u_cti (current_cpu, abuf->idesc, 0, referenced, sr);
458 int UNUSED insn_referenced = abuf->written;
461 src1 = FLD (in_src1);
462 src2 = FLD (in_src2);
463 referenced |= 1 << 0;
464 referenced |= 1 << 1;
465 cycles += m32rxf_model_m32rx_u_cmp (current_cpu, abuf->idesc, 1, referenced, src1, src2);
472 model_m32rx_beqz (SIM_CPU *current_cpu, void *sem_arg)
474 #define FLD(f) abuf->fields.cti.fields.fmt_beqz.f
475 ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
479 int UNUSED insn_referenced = abuf->written;
481 if (insn_referenced & (1 << 2)) referenced |= 1 << 1;
482 cycles += m32rxf_model_m32rx_u_cti (current_cpu, abuf->idesc, 0, referenced, sr);
486 int UNUSED insn_referenced = abuf->written;
489 src2 = FLD (in_src2);
490 referenced |= 1 << 1;
491 cycles += m32rxf_model_m32rx_u_cmp (current_cpu, abuf->idesc, 1, referenced, src1, src2);
498 model_m32rx_bgez (SIM_CPU *current_cpu, void *sem_arg)
500 #define FLD(f) abuf->fields.cti.fields.fmt_beqz.f
501 ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
505 int UNUSED insn_referenced = abuf->written;
507 if (insn_referenced & (1 << 2)) referenced |= 1 << 1;
508 cycles += m32rxf_model_m32rx_u_cti (current_cpu, abuf->idesc, 0, referenced, sr);
512 int UNUSED insn_referenced = abuf->written;
515 src2 = FLD (in_src2);
516 referenced |= 1 << 1;
517 cycles += m32rxf_model_m32rx_u_cmp (current_cpu, abuf->idesc, 1, referenced, src1, src2);
524 model_m32rx_bgtz (SIM_CPU *current_cpu, void *sem_arg)
526 #define FLD(f) abuf->fields.cti.fields.fmt_beqz.f
527 ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
531 int UNUSED insn_referenced = abuf->written;
533 if (insn_referenced & (1 << 2)) referenced |= 1 << 1;
534 cycles += m32rxf_model_m32rx_u_cti (current_cpu, abuf->idesc, 0, referenced, sr);
538 int UNUSED insn_referenced = abuf->written;
541 src2 = FLD (in_src2);
542 referenced |= 1 << 1;
543 cycles += m32rxf_model_m32rx_u_cmp (current_cpu, abuf->idesc, 1, referenced, src1, src2);
550 model_m32rx_blez (SIM_CPU *current_cpu, void *sem_arg)
552 #define FLD(f) abuf->fields.cti.fields.fmt_beqz.f
553 ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
557 int UNUSED insn_referenced = abuf->written;
559 if (insn_referenced & (1 << 2)) referenced |= 1 << 1;
560 cycles += m32rxf_model_m32rx_u_cti (current_cpu, abuf->idesc, 0, referenced, sr);
564 int UNUSED insn_referenced = abuf->written;
567 src2 = FLD (in_src2);
568 referenced |= 1 << 1;
569 cycles += m32rxf_model_m32rx_u_cmp (current_cpu, abuf->idesc, 1, referenced, src1, src2);
576 model_m32rx_bltz (SIM_CPU *current_cpu, void *sem_arg)
578 #define FLD(f) abuf->fields.cti.fields.fmt_beqz.f
579 ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
583 int UNUSED insn_referenced = abuf->written;
585 if (insn_referenced & (1 << 2)) referenced |= 1 << 1;
586 cycles += m32rxf_model_m32rx_u_cti (current_cpu, abuf->idesc, 0, referenced, sr);
590 int UNUSED insn_referenced = abuf->written;
593 src2 = FLD (in_src2);
594 referenced |= 1 << 1;
595 cycles += m32rxf_model_m32rx_u_cmp (current_cpu, abuf->idesc, 1, referenced, src1, src2);
602 model_m32rx_bnez (SIM_CPU *current_cpu, void *sem_arg)
604 #define FLD(f) abuf->fields.cti.fields.fmt_beqz.f
605 ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
609 int UNUSED insn_referenced = abuf->written;
611 if (insn_referenced & (1 << 2)) referenced |= 1 << 1;
612 cycles += m32rxf_model_m32rx_u_cti (current_cpu, abuf->idesc, 0, referenced, sr);
616 int UNUSED insn_referenced = abuf->written;
619 src2 = FLD (in_src2);
620 referenced |= 1 << 1;
621 cycles += m32rxf_model_m32rx_u_cmp (current_cpu, abuf->idesc, 1, referenced, src1, src2);
628 model_m32rx_bl8 (SIM_CPU *current_cpu, void *sem_arg)
630 #define FLD(f) abuf->fields.cti.fields.fmt_bl8.f
631 ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
635 int UNUSED insn_referenced = abuf->written;
637 referenced |= 1 << 1;
638 cycles += m32rxf_model_m32rx_u_cti (current_cpu, abuf->idesc, 0, referenced, sr);
645 model_m32rx_bl24 (SIM_CPU *current_cpu, void *sem_arg)
647 #define FLD(f) abuf->fields.cti.fields.fmt_bl24.f
648 ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
652 int UNUSED insn_referenced = abuf->written;
654 referenced |= 1 << 1;
655 cycles += m32rxf_model_m32rx_u_cti (current_cpu, abuf->idesc, 0, referenced, sr);
662 model_m32rx_bcl8 (SIM_CPU *current_cpu, void *sem_arg)
664 #define FLD(f) abuf->fields.cti.fields.fmt_bcl8.f
665 ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
669 int UNUSED insn_referenced = abuf->written;
671 if (insn_referenced & (1 << 4)) referenced |= 1 << 1;
672 cycles += m32rxf_model_m32rx_u_cti (current_cpu, abuf->idesc, 0, referenced, sr);
679 model_m32rx_bcl24 (SIM_CPU *current_cpu, void *sem_arg)
681 #define FLD(f) abuf->fields.cti.fields.fmt_bcl24.f
682 ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
686 int UNUSED insn_referenced = abuf->written;
688 if (insn_referenced & (1 << 4)) referenced |= 1 << 1;
689 cycles += m32rxf_model_m32rx_u_cti (current_cpu, abuf->idesc, 0, referenced, sr);
696 model_m32rx_bnc8 (SIM_CPU *current_cpu, void *sem_arg)
698 #define FLD(f) abuf->fields.cti.fields.fmt_bc8.f
699 ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
703 int UNUSED insn_referenced = abuf->written;
705 if (insn_referenced & (1 << 2)) referenced |= 1 << 1;
706 cycles += m32rxf_model_m32rx_u_cti (current_cpu, abuf->idesc, 0, referenced, sr);
713 model_m32rx_bnc24 (SIM_CPU *current_cpu, void *sem_arg)
715 #define FLD(f) abuf->fields.cti.fields.fmt_bc24.f
716 ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
720 int UNUSED insn_referenced = abuf->written;
722 if (insn_referenced & (1 << 2)) referenced |= 1 << 1;
723 cycles += m32rxf_model_m32rx_u_cti (current_cpu, abuf->idesc, 0, referenced, sr);
730 model_m32rx_bne (SIM_CPU *current_cpu, void *sem_arg)
732 #define FLD(f) abuf->fields.cti.fields.fmt_beq.f
733 ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
737 int UNUSED insn_referenced = abuf->written;
739 if (insn_referenced & (1 << 3)) referenced |= 1 << 1;
740 cycles += m32rxf_model_m32rx_u_cti (current_cpu, abuf->idesc, 0, referenced, sr);
744 int UNUSED insn_referenced = abuf->written;
747 src1 = FLD (in_src1);
748 src2 = FLD (in_src2);
749 referenced |= 1 << 0;
750 referenced |= 1 << 1;
751 cycles += m32rxf_model_m32rx_u_cmp (current_cpu, abuf->idesc, 1, referenced, src1, src2);
758 model_m32rx_bra8 (SIM_CPU *current_cpu, void *sem_arg)
760 #define FLD(f) abuf->fields.cti.fields.fmt_bra8.f
761 ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
765 int UNUSED insn_referenced = abuf->written;
767 referenced |= 1 << 1;
768 cycles += m32rxf_model_m32rx_u_cti (current_cpu, abuf->idesc, 0, referenced, sr);
775 model_m32rx_bra24 (SIM_CPU *current_cpu, void *sem_arg)
777 #define FLD(f) abuf->fields.cti.fields.fmt_bra24.f
778 ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
782 int UNUSED insn_referenced = abuf->written;
784 referenced |= 1 << 1;
785 cycles += m32rxf_model_m32rx_u_cti (current_cpu, abuf->idesc, 0, referenced, sr);
792 model_m32rx_bncl8 (SIM_CPU *current_cpu, void *sem_arg)
794 #define FLD(f) abuf->fields.cti.fields.fmt_bcl8.f
795 ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
799 int UNUSED insn_referenced = abuf->written;
801 if (insn_referenced & (1 << 4)) referenced |= 1 << 1;
802 cycles += m32rxf_model_m32rx_u_cti (current_cpu, abuf->idesc, 0, referenced, sr);
809 model_m32rx_bncl24 (SIM_CPU *current_cpu, void *sem_arg)
811 #define FLD(f) abuf->fields.cti.fields.fmt_bcl24.f
812 ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
816 int UNUSED insn_referenced = abuf->written;
818 if (insn_referenced & (1 << 4)) referenced |= 1 << 1;
819 cycles += m32rxf_model_m32rx_u_cti (current_cpu, abuf->idesc, 0, referenced, sr);
826 model_m32rx_cmp (SIM_CPU *current_cpu, void *sem_arg)
828 #define FLD(f) abuf->fields.fmt_cmp.f
829 ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
833 int UNUSED insn_referenced = abuf->written;
836 src1 = FLD (in_src1);
837 src2 = FLD (in_src2);
838 referenced |= 1 << 0;
839 referenced |= 1 << 1;
840 cycles += m32rxf_model_m32rx_u_cmp (current_cpu, abuf->idesc, 0, referenced, src1, src2);
847 model_m32rx_cmpi (SIM_CPU *current_cpu, void *sem_arg)
849 #define FLD(f) abuf->fields.fmt_cmpi.f
850 ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
854 int UNUSED insn_referenced = abuf->written;
857 src2 = FLD (in_src2);
858 referenced |= 1 << 1;
859 cycles += m32rxf_model_m32rx_u_cmp (current_cpu, abuf->idesc, 0, referenced, src1, src2);
866 model_m32rx_cmpu (SIM_CPU *current_cpu, void *sem_arg)
868 #define FLD(f) abuf->fields.fmt_cmp.f
869 ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
873 int UNUSED insn_referenced = abuf->written;
876 src1 = FLD (in_src1);
877 src2 = FLD (in_src2);
878 referenced |= 1 << 0;
879 referenced |= 1 << 1;
880 cycles += m32rxf_model_m32rx_u_cmp (current_cpu, abuf->idesc, 0, referenced, src1, src2);
887 model_m32rx_cmpui (SIM_CPU *current_cpu, void *sem_arg)
889 #define FLD(f) abuf->fields.fmt_cmpi.f
890 ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
894 int UNUSED insn_referenced = abuf->written;
897 src2 = FLD (in_src2);
898 referenced |= 1 << 1;
899 cycles += m32rxf_model_m32rx_u_cmp (current_cpu, abuf->idesc, 0, referenced, src1, src2);
906 model_m32rx_cmpeq (SIM_CPU *current_cpu, void *sem_arg)
908 #define FLD(f) abuf->fields.fmt_cmp.f
909 ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
913 int UNUSED insn_referenced = abuf->written;
916 src1 = FLD (in_src1);
917 src2 = FLD (in_src2);
918 referenced |= 1 << 0;
919 referenced |= 1 << 1;
920 cycles += m32rxf_model_m32rx_u_cmp (current_cpu, abuf->idesc, 0, referenced, src1, src2);
927 model_m32rx_cmpz (SIM_CPU *current_cpu, void *sem_arg)
929 #define FLD(f) abuf->fields.fmt_cmpz.f
930 ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
934 int UNUSED insn_referenced = abuf->written;
937 src2 = FLD (in_src2);
938 referenced |= 1 << 1;
939 cycles += m32rxf_model_m32rx_u_cmp (current_cpu, abuf->idesc, 0, referenced, src1, src2);
946 model_m32rx_div (SIM_CPU *current_cpu, void *sem_arg)
948 #define FLD(f) abuf->fields.fmt_div.f
949 ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
953 int UNUSED insn_referenced = abuf->written;
959 referenced |= 1 << 0;
960 if (insn_referenced & (1 << 2)) referenced |= 1 << 2;
961 cycles += m32rxf_model_m32rx_u_exec (current_cpu, abuf->idesc, 0, referenced, sr, sr2, dr);
968 model_m32rx_divu (SIM_CPU *current_cpu, void *sem_arg)
970 #define FLD(f) abuf->fields.fmt_div.f
971 ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
975 int UNUSED insn_referenced = abuf->written;
981 referenced |= 1 << 0;
982 if (insn_referenced & (1 << 2)) referenced |= 1 << 2;
983 cycles += m32rxf_model_m32rx_u_exec (current_cpu, abuf->idesc, 0, referenced, sr, sr2, dr);
990 model_m32rx_rem (SIM_CPU *current_cpu, void *sem_arg)
992 #define FLD(f) abuf->fields.fmt_div.f
993 ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
997 int UNUSED insn_referenced = abuf->written;
1003 referenced |= 1 << 0;
1004 if (insn_referenced & (1 << 2)) referenced |= 1 << 2;
1005 cycles += m32rxf_model_m32rx_u_exec (current_cpu, abuf->idesc, 0, referenced, sr, sr2, dr);
1012 model_m32rx_remu (SIM_CPU *current_cpu, void *sem_arg)
1014 #define FLD(f) abuf->fields.fmt_div.f
1015 ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
1019 int UNUSED insn_referenced = abuf->written;
1025 referenced |= 1 << 0;
1026 if (insn_referenced & (1 << 2)) referenced |= 1 << 2;
1027 cycles += m32rxf_model_m32rx_u_exec (current_cpu, abuf->idesc, 0, referenced, sr, sr2, dr);
1034 model_m32rx_divh (SIM_CPU *current_cpu, void *sem_arg)
1036 #define FLD(f) abuf->fields.fmt_div.f
1037 ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
1041 int UNUSED insn_referenced = abuf->written;
1047 referenced |= 1 << 0;
1048 if (insn_referenced & (1 << 2)) referenced |= 1 << 2;
1049 cycles += m32rxf_model_m32rx_u_exec (current_cpu, abuf->idesc, 0, referenced, sr, sr2, dr);
1056 model_m32rx_jc (SIM_CPU *current_cpu, void *sem_arg)
1058 #define FLD(f) abuf->fields.cti.fields.fmt_jc.f
1059 ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
1063 int UNUSED insn_referenced = abuf->written;
1066 if (insn_referenced & (1 << 1)) referenced |= 1 << 0;
1067 if (insn_referenced & (1 << 2)) referenced |= 1 << 1;
1068 cycles += m32rxf_model_m32rx_u_cti (current_cpu, abuf->idesc, 0, referenced, sr);
1075 model_m32rx_jnc (SIM_CPU *current_cpu, void *sem_arg)
1077 #define FLD(f) abuf->fields.cti.fields.fmt_jc.f
1078 ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
1082 int UNUSED insn_referenced = abuf->written;
1085 if (insn_referenced & (1 << 1)) referenced |= 1 << 0;
1086 if (insn_referenced & (1 << 2)) referenced |= 1 << 1;
1087 cycles += m32rxf_model_m32rx_u_cti (current_cpu, abuf->idesc, 0, referenced, sr);
1094 model_m32rx_jl (SIM_CPU *current_cpu, void *sem_arg)
1096 #define FLD(f) abuf->fields.cti.fields.fmt_jl.f
1097 ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
1101 int UNUSED insn_referenced = abuf->written;
1104 referenced |= 1 << 0;
1105 referenced |= 1 << 1;
1106 cycles += m32rxf_model_m32rx_u_cti (current_cpu, abuf->idesc, 0, referenced, sr);
1113 model_m32rx_jmp (SIM_CPU *current_cpu, void *sem_arg)
1115 #define FLD(f) abuf->fields.cti.fields.fmt_jmp.f
1116 ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
1120 int UNUSED insn_referenced = abuf->written;
1123 referenced |= 1 << 0;
1124 referenced |= 1 << 1;
1125 cycles += m32rxf_model_m32rx_u_cti (current_cpu, abuf->idesc, 0, referenced, sr);
1132 model_m32rx_ld (SIM_CPU *current_cpu, void *sem_arg)
1134 #define FLD(f) abuf->fields.fmt_ld.f
1135 ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
1139 int UNUSED insn_referenced = abuf->written;
1144 referenced |= 1 << 0;
1145 referenced |= 1 << 1;
1146 cycles += m32rxf_model_m32rx_u_load (current_cpu, abuf->idesc, 0, referenced, sr, dr);
1153 model_m32rx_ld_d (SIM_CPU *current_cpu, void *sem_arg)
1155 #define FLD(f) abuf->fields.fmt_ld_d.f
1156 ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
1160 int UNUSED insn_referenced = abuf->written;
1165 referenced |= 1 << 0;
1166 referenced |= 1 << 1;
1167 cycles += m32rxf_model_m32rx_u_load (current_cpu, abuf->idesc, 0, referenced, sr, dr);
1174 model_m32rx_ldb (SIM_CPU *current_cpu, void *sem_arg)
1176 #define FLD(f) abuf->fields.fmt_ldb.f
1177 ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
1181 int UNUSED insn_referenced = abuf->written;
1186 referenced |= 1 << 0;
1187 referenced |= 1 << 1;
1188 cycles += m32rxf_model_m32rx_u_load (current_cpu, abuf->idesc, 0, referenced, sr, dr);
1195 model_m32rx_ldb_d (SIM_CPU *current_cpu, void *sem_arg)
1197 #define FLD(f) abuf->fields.fmt_ldb_d.f
1198 ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
1202 int UNUSED insn_referenced = abuf->written;
1207 referenced |= 1 << 0;
1208 referenced |= 1 << 1;
1209 cycles += m32rxf_model_m32rx_u_load (current_cpu, abuf->idesc, 0, referenced, sr, dr);
1216 model_m32rx_ldh (SIM_CPU *current_cpu, void *sem_arg)
1218 #define FLD(f) abuf->fields.fmt_ldh.f
1219 ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
1223 int UNUSED insn_referenced = abuf->written;
1228 referenced |= 1 << 0;
1229 referenced |= 1 << 1;
1230 cycles += m32rxf_model_m32rx_u_load (current_cpu, abuf->idesc, 0, referenced, sr, dr);
1237 model_m32rx_ldh_d (SIM_CPU *current_cpu, void *sem_arg)
1239 #define FLD(f) abuf->fields.fmt_ldh_d.f
1240 ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
1244 int UNUSED insn_referenced = abuf->written;
1249 referenced |= 1 << 0;
1250 referenced |= 1 << 1;
1251 cycles += m32rxf_model_m32rx_u_load (current_cpu, abuf->idesc, 0, referenced, sr, dr);
1258 model_m32rx_ldub (SIM_CPU *current_cpu, void *sem_arg)
1260 #define FLD(f) abuf->fields.fmt_ldb.f
1261 ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
1265 int UNUSED insn_referenced = abuf->written;
1270 referenced |= 1 << 0;
1271 referenced |= 1 << 1;
1272 cycles += m32rxf_model_m32rx_u_load (current_cpu, abuf->idesc, 0, referenced, sr, dr);
1279 model_m32rx_ldub_d (SIM_CPU *current_cpu, void *sem_arg)
1281 #define FLD(f) abuf->fields.fmt_ldb_d.f
1282 ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
1286 int UNUSED insn_referenced = abuf->written;
1291 referenced |= 1 << 0;
1292 referenced |= 1 << 1;
1293 cycles += m32rxf_model_m32rx_u_load (current_cpu, abuf->idesc, 0, referenced, sr, dr);
1300 model_m32rx_lduh (SIM_CPU *current_cpu, void *sem_arg)
1302 #define FLD(f) abuf->fields.fmt_ldh.f
1303 ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
1307 int UNUSED insn_referenced = abuf->written;
1312 referenced |= 1 << 0;
1313 referenced |= 1 << 1;
1314 cycles += m32rxf_model_m32rx_u_load (current_cpu, abuf->idesc, 0, referenced, sr, dr);
1321 model_m32rx_lduh_d (SIM_CPU *current_cpu, void *sem_arg)
1323 #define FLD(f) abuf->fields.fmt_ldh_d.f
1324 ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
1328 int UNUSED insn_referenced = abuf->written;
1333 referenced |= 1 << 0;
1334 referenced |= 1 << 1;
1335 cycles += m32rxf_model_m32rx_u_load (current_cpu, abuf->idesc, 0, referenced, sr, dr);
1342 model_m32rx_ld_plus (SIM_CPU *current_cpu, void *sem_arg)
1344 #define FLD(f) abuf->fields.fmt_ld_plus.f
1345 ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
1349 int UNUSED insn_referenced = abuf->written;
1354 referenced |= 1 << 0;
1355 referenced |= 1 << 1;
1356 cycles += m32rxf_model_m32rx_u_load (current_cpu, abuf->idesc, 0, referenced, sr, dr);
1360 int UNUSED insn_referenced = abuf->written;
1366 referenced |= 1 << 0;
1367 referenced |= 1 << 2;
1368 cycles += m32rxf_model_m32rx_u_exec (current_cpu, abuf->idesc, 1, referenced, sr, sr2, dr);
1375 model_m32rx_ld24 (SIM_CPU *current_cpu, void *sem_arg)
1377 #define FLD(f) abuf->fields.fmt_ld24.f
1378 ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
1382 int UNUSED insn_referenced = abuf->written;
1387 referenced |= 1 << 2;
1388 cycles += m32rxf_model_m32rx_u_exec (current_cpu, abuf->idesc, 0, referenced, sr, sr2, dr);
1395 model_m32rx_ldi8 (SIM_CPU *current_cpu, void *sem_arg)
1397 #define FLD(f) abuf->fields.fmt_ldi8.f
1398 ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
1402 int UNUSED insn_referenced = abuf->written;
1407 referenced |= 1 << 2;
1408 cycles += m32rxf_model_m32rx_u_exec (current_cpu, abuf->idesc, 0, referenced, sr, sr2, dr);
1415 model_m32rx_ldi16 (SIM_CPU *current_cpu, void *sem_arg)
1417 #define FLD(f) abuf->fields.fmt_ldi16.f
1418 ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
1422 int UNUSED insn_referenced = abuf->written;
1427 referenced |= 1 << 2;
1428 cycles += m32rxf_model_m32rx_u_exec (current_cpu, abuf->idesc, 0, referenced, sr, sr2, dr);
1435 model_m32rx_lock (SIM_CPU *current_cpu, void *sem_arg)
1437 #define FLD(f) abuf->fields.fmt_lock.f
1438 ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
1442 int UNUSED insn_referenced = abuf->written;
1447 referenced |= 1 << 0;
1448 referenced |= 1 << 1;
1449 cycles += m32rxf_model_m32rx_u_load (current_cpu, abuf->idesc, 0, referenced, sr, dr);
1456 model_m32rx_machi_a (SIM_CPU *current_cpu, void *sem_arg)
1458 #define FLD(f) abuf->fields.fmt_machi_a.f
1459 ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
1463 int UNUSED insn_referenced = abuf->written;
1466 src1 = FLD (in_src1);
1467 src2 = FLD (in_src2);
1468 referenced |= 1 << 0;
1469 referenced |= 1 << 1;
1470 cycles += m32rxf_model_m32rx_u_mac (current_cpu, abuf->idesc, 0, referenced, src1, src2);
1477 model_m32rx_maclo_a (SIM_CPU *current_cpu, void *sem_arg)
1479 #define FLD(f) abuf->fields.fmt_machi_a.f
1480 ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
1484 int UNUSED insn_referenced = abuf->written;
1487 src1 = FLD (in_src1);
1488 src2 = FLD (in_src2);
1489 referenced |= 1 << 0;
1490 referenced |= 1 << 1;
1491 cycles += m32rxf_model_m32rx_u_mac (current_cpu, abuf->idesc, 0, referenced, src1, src2);
1498 model_m32rx_macwhi_a (SIM_CPU *current_cpu, void *sem_arg)
1500 #define FLD(f) abuf->fields.fmt_machi_a.f
1501 ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
1505 int UNUSED insn_referenced = abuf->written;
1508 src1 = FLD (in_src1);
1509 src2 = FLD (in_src2);
1510 referenced |= 1 << 0;
1511 referenced |= 1 << 1;
1512 cycles += m32rxf_model_m32rx_u_mac (current_cpu, abuf->idesc, 0, referenced, src1, src2);
1519 model_m32rx_macwlo_a (SIM_CPU *current_cpu, void *sem_arg)
1521 #define FLD(f) abuf->fields.fmt_machi_a.f
1522 ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
1526 int UNUSED insn_referenced = abuf->written;
1529 src1 = FLD (in_src1);
1530 src2 = FLD (in_src2);
1531 referenced |= 1 << 0;
1532 referenced |= 1 << 1;
1533 cycles += m32rxf_model_m32rx_u_mac (current_cpu, abuf->idesc, 0, referenced, src1, src2);
1540 model_m32rx_mul (SIM_CPU *current_cpu, void *sem_arg)
1542 #define FLD(f) abuf->fields.fmt_add.f
1543 ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
1547 int UNUSED insn_referenced = abuf->written;
1553 referenced |= 1 << 0;
1554 referenced |= 1 << 2;
1555 cycles += m32rxf_model_m32rx_u_exec (current_cpu, abuf->idesc, 0, referenced, sr, sr2, dr);
1562 model_m32rx_mulhi_a (SIM_CPU *current_cpu, void *sem_arg)
1564 #define FLD(f) abuf->fields.fmt_mulhi_a.f
1565 ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
1569 int UNUSED insn_referenced = abuf->written;
1572 src1 = FLD (in_src1);
1573 src2 = FLD (in_src2);
1574 referenced |= 1 << 0;
1575 referenced |= 1 << 1;
1576 cycles += m32rxf_model_m32rx_u_mac (current_cpu, abuf->idesc, 0, referenced, src1, src2);
1583 model_m32rx_mullo_a (SIM_CPU *current_cpu, void *sem_arg)
1585 #define FLD(f) abuf->fields.fmt_mulhi_a.f
1586 ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
1590 int UNUSED insn_referenced = abuf->written;
1593 src1 = FLD (in_src1);
1594 src2 = FLD (in_src2);
1595 referenced |= 1 << 0;
1596 referenced |= 1 << 1;
1597 cycles += m32rxf_model_m32rx_u_mac (current_cpu, abuf->idesc, 0, referenced, src1, src2);
1604 model_m32rx_mulwhi_a (SIM_CPU *current_cpu, void *sem_arg)
1606 #define FLD(f) abuf->fields.fmt_mulhi_a.f
1607 ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
1611 int UNUSED insn_referenced = abuf->written;
1614 src1 = FLD (in_src1);
1615 src2 = FLD (in_src2);
1616 referenced |= 1 << 0;
1617 referenced |= 1 << 1;
1618 cycles += m32rxf_model_m32rx_u_mac (current_cpu, abuf->idesc, 0, referenced, src1, src2);
1625 model_m32rx_mulwlo_a (SIM_CPU *current_cpu, void *sem_arg)
1627 #define FLD(f) abuf->fields.fmt_mulhi_a.f
1628 ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
1632 int UNUSED insn_referenced = abuf->written;
1635 src1 = FLD (in_src1);
1636 src2 = FLD (in_src2);
1637 referenced |= 1 << 0;
1638 referenced |= 1 << 1;
1639 cycles += m32rxf_model_m32rx_u_mac (current_cpu, abuf->idesc, 0, referenced, src1, src2);
1646 model_m32rx_mv (SIM_CPU *current_cpu, void *sem_arg)
1648 #define FLD(f) abuf->fields.fmt_mv.f
1649 ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
1653 int UNUSED insn_referenced = abuf->written;
1659 referenced |= 1 << 0;
1660 referenced |= 1 << 2;
1661 cycles += m32rxf_model_m32rx_u_exec (current_cpu, abuf->idesc, 0, referenced, sr, sr2, dr);
1668 model_m32rx_mvfachi_a (SIM_CPU *current_cpu, void *sem_arg)
1670 #define FLD(f) abuf->fields.fmt_mvfachi_a.f
1671 ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
1675 int UNUSED insn_referenced = abuf->written;
1680 referenced |= 1 << 2;
1681 cycles += m32rxf_model_m32rx_u_exec (current_cpu, abuf->idesc, 0, referenced, sr, sr2, dr);
1688 model_m32rx_mvfaclo_a (SIM_CPU *current_cpu, void *sem_arg)
1690 #define FLD(f) abuf->fields.fmt_mvfachi_a.f
1691 ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
1695 int UNUSED insn_referenced = abuf->written;
1700 referenced |= 1 << 2;
1701 cycles += m32rxf_model_m32rx_u_exec (current_cpu, abuf->idesc, 0, referenced, sr, sr2, dr);
1708 model_m32rx_mvfacmi_a (SIM_CPU *current_cpu, void *sem_arg)
1710 #define FLD(f) abuf->fields.fmt_mvfachi_a.f
1711 ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
1715 int UNUSED insn_referenced = abuf->written;
1720 referenced |= 1 << 2;
1721 cycles += m32rxf_model_m32rx_u_exec (current_cpu, abuf->idesc, 0, referenced, sr, sr2, dr);
1728 model_m32rx_mvfc (SIM_CPU *current_cpu, void *sem_arg)
1730 #define FLD(f) abuf->fields.fmt_mvfc.f
1731 ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
1735 int UNUSED insn_referenced = abuf->written;
1740 referenced |= 1 << 2;
1741 cycles += m32rxf_model_m32rx_u_exec (current_cpu, abuf->idesc, 0, referenced, sr, sr2, dr);
1748 model_m32rx_mvtachi_a (SIM_CPU *current_cpu, void *sem_arg)
1750 #define FLD(f) abuf->fields.fmt_mvtachi_a.f
1751 ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
1755 int UNUSED insn_referenced = abuf->written;
1760 referenced |= 1 << 0;
1761 cycles += m32rxf_model_m32rx_u_exec (current_cpu, abuf->idesc, 0, referenced, sr, sr2, dr);
1768 model_m32rx_mvtaclo_a (SIM_CPU *current_cpu, void *sem_arg)
1770 #define FLD(f) abuf->fields.fmt_mvtachi_a.f
1771 ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
1775 int UNUSED insn_referenced = abuf->written;
1780 referenced |= 1 << 0;
1781 cycles += m32rxf_model_m32rx_u_exec (current_cpu, abuf->idesc, 0, referenced, sr, sr2, dr);
1788 model_m32rx_mvtc (SIM_CPU *current_cpu, void *sem_arg)
1790 #define FLD(f) abuf->fields.fmt_mvtc.f
1791 ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
1795 int UNUSED insn_referenced = abuf->written;
1800 referenced |= 1 << 0;
1801 cycles += m32rxf_model_m32rx_u_exec (current_cpu, abuf->idesc, 0, referenced, sr, sr2, dr);
1808 model_m32rx_neg (SIM_CPU *current_cpu, void *sem_arg)
1810 #define FLD(f) abuf->fields.fmt_mv.f
1811 ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
1815 int UNUSED insn_referenced = abuf->written;
1821 referenced |= 1 << 0;
1822 referenced |= 1 << 2;
1823 cycles += m32rxf_model_m32rx_u_exec (current_cpu, abuf->idesc, 0, referenced, sr, sr2, dr);
1830 model_m32rx_nop (SIM_CPU *current_cpu, void *sem_arg)
1832 #define FLD(f) abuf->fields.fmt_nop.f
1833 ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
1837 int UNUSED insn_referenced = abuf->written;
1841 cycles += m32rxf_model_m32rx_u_exec (current_cpu, abuf->idesc, 0, referenced, sr, sr2, dr);
1848 model_m32rx_not (SIM_CPU *current_cpu, void *sem_arg)
1850 #define FLD(f) abuf->fields.fmt_mv.f
1851 ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
1855 int UNUSED insn_referenced = abuf->written;
1861 referenced |= 1 << 0;
1862 referenced |= 1 << 2;
1863 cycles += m32rxf_model_m32rx_u_exec (current_cpu, abuf->idesc, 0, referenced, sr, sr2, dr);
1870 model_m32rx_rac_dsi (SIM_CPU *current_cpu, void *sem_arg)
1872 #define FLD(f) abuf->fields.fmt_rac_dsi.f
1873 ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
1877 int UNUSED insn_referenced = abuf->written;
1880 cycles += m32rxf_model_m32rx_u_mac (current_cpu, abuf->idesc, 0, referenced, src1, src2);
1887 model_m32rx_rach_dsi (SIM_CPU *current_cpu, void *sem_arg)
1889 #define FLD(f) abuf->fields.fmt_rac_dsi.f
1890 ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
1894 int UNUSED insn_referenced = abuf->written;
1897 cycles += m32rxf_model_m32rx_u_mac (current_cpu, abuf->idesc, 0, referenced, src1, src2);
1904 model_m32rx_rte (SIM_CPU *current_cpu, void *sem_arg)
1906 #define FLD(f) abuf->fields.cti.fields.fmt_rte.f
1907 ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
1911 int UNUSED insn_referenced = abuf->written;
1915 cycles += m32rxf_model_m32rx_u_exec (current_cpu, abuf->idesc, 0, referenced, sr, sr2, dr);
1922 model_m32rx_seth (SIM_CPU *current_cpu, void *sem_arg)
1924 #define FLD(f) abuf->fields.fmt_seth.f
1925 ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
1929 int UNUSED insn_referenced = abuf->written;
1934 referenced |= 1 << 2;
1935 cycles += m32rxf_model_m32rx_u_exec (current_cpu, abuf->idesc, 0, referenced, sr, sr2, dr);
1942 model_m32rx_sll (SIM_CPU *current_cpu, void *sem_arg)
1944 #define FLD(f) abuf->fields.fmt_add.f
1945 ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
1949 int UNUSED insn_referenced = abuf->written;
1955 referenced |= 1 << 0;
1956 referenced |= 1 << 2;
1957 cycles += m32rxf_model_m32rx_u_exec (current_cpu, abuf->idesc, 0, referenced, sr, sr2, dr);
1964 model_m32rx_sll3 (SIM_CPU *current_cpu, void *sem_arg)
1966 #define FLD(f) abuf->fields.fmt_sll3.f
1967 ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
1971 int UNUSED insn_referenced = abuf->written;
1977 referenced |= 1 << 0;
1978 referenced |= 1 << 2;
1979 cycles += m32rxf_model_m32rx_u_exec (current_cpu, abuf->idesc, 0, referenced, sr, sr2, dr);
1986 model_m32rx_slli (SIM_CPU *current_cpu, void *sem_arg)
1988 #define FLD(f) abuf->fields.fmt_slli.f
1989 ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
1993 int UNUSED insn_referenced = abuf->written;
1998 referenced |= 1 << 2;
1999 cycles += m32rxf_model_m32rx_u_exec (current_cpu, abuf->idesc, 0, referenced, sr, sr2, dr);
2006 model_m32rx_sra (SIM_CPU *current_cpu, void *sem_arg)
2008 #define FLD(f) abuf->fields.fmt_add.f
2009 ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
2013 int UNUSED insn_referenced = abuf->written;
2019 referenced |= 1 << 0;
2020 referenced |= 1 << 2;
2021 cycles += m32rxf_model_m32rx_u_exec (current_cpu, abuf->idesc, 0, referenced, sr, sr2, dr);
2028 model_m32rx_sra3 (SIM_CPU *current_cpu, void *sem_arg)
2030 #define FLD(f) abuf->fields.fmt_sll3.f
2031 ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
2035 int UNUSED insn_referenced = abuf->written;
2041 referenced |= 1 << 0;
2042 referenced |= 1 << 2;
2043 cycles += m32rxf_model_m32rx_u_exec (current_cpu, abuf->idesc, 0, referenced, sr, sr2, dr);
2050 model_m32rx_srai (SIM_CPU *current_cpu, void *sem_arg)
2052 #define FLD(f) abuf->fields.fmt_slli.f
2053 ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
2057 int UNUSED insn_referenced = abuf->written;
2062 referenced |= 1 << 2;
2063 cycles += m32rxf_model_m32rx_u_exec (current_cpu, abuf->idesc, 0, referenced, sr, sr2, dr);
2070 model_m32rx_srl (SIM_CPU *current_cpu, void *sem_arg)
2072 #define FLD(f) abuf->fields.fmt_add.f
2073 ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
2077 int UNUSED insn_referenced = abuf->written;
2083 referenced |= 1 << 0;
2084 referenced |= 1 << 2;
2085 cycles += m32rxf_model_m32rx_u_exec (current_cpu, abuf->idesc, 0, referenced, sr, sr2, dr);
2092 model_m32rx_srl3 (SIM_CPU *current_cpu, void *sem_arg)
2094 #define FLD(f) abuf->fields.fmt_sll3.f
2095 ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
2099 int UNUSED insn_referenced = abuf->written;
2105 referenced |= 1 << 0;
2106 referenced |= 1 << 2;
2107 cycles += m32rxf_model_m32rx_u_exec (current_cpu, abuf->idesc, 0, referenced, sr, sr2, dr);
2114 model_m32rx_srli (SIM_CPU *current_cpu, void *sem_arg)
2116 #define FLD(f) abuf->fields.fmt_slli.f
2117 ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
2121 int UNUSED insn_referenced = abuf->written;
2126 referenced |= 1 << 2;
2127 cycles += m32rxf_model_m32rx_u_exec (current_cpu, abuf->idesc, 0, referenced, sr, sr2, dr);
2134 model_m32rx_st (SIM_CPU *current_cpu, void *sem_arg)
2136 #define FLD(f) abuf->fields.fmt_st.f
2137 ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
2141 int UNUSED insn_referenced = abuf->written;
2144 src1 = FLD (in_src1);
2145 src2 = FLD (in_src2);
2146 referenced |= 1 << 0;
2147 referenced |= 1 << 1;
2148 cycles += m32rxf_model_m32rx_u_store (current_cpu, abuf->idesc, 0, referenced, src1, src2);
2155 model_m32rx_st_d (SIM_CPU *current_cpu, void *sem_arg)
2157 #define FLD(f) abuf->fields.fmt_st_d.f
2158 ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
2162 int UNUSED insn_referenced = abuf->written;
2165 src1 = FLD (in_src1);
2166 src2 = FLD (in_src2);
2167 referenced |= 1 << 0;
2168 referenced |= 1 << 1;
2169 cycles += m32rxf_model_m32rx_u_store (current_cpu, abuf->idesc, 0, referenced, src1, src2);
2176 model_m32rx_stb (SIM_CPU *current_cpu, void *sem_arg)
2178 #define FLD(f) abuf->fields.fmt_stb.f
2179 ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
2183 int UNUSED insn_referenced = abuf->written;
2186 src1 = FLD (in_src1);
2187 src2 = FLD (in_src2);
2188 referenced |= 1 << 0;
2189 referenced |= 1 << 1;
2190 cycles += m32rxf_model_m32rx_u_store (current_cpu, abuf->idesc, 0, referenced, src1, src2);
2197 model_m32rx_stb_d (SIM_CPU *current_cpu, void *sem_arg)
2199 #define FLD(f) abuf->fields.fmt_stb_d.f
2200 ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
2204 int UNUSED insn_referenced = abuf->written;
2207 src1 = FLD (in_src1);
2208 src2 = FLD (in_src2);
2209 referenced |= 1 << 0;
2210 referenced |= 1 << 1;
2211 cycles += m32rxf_model_m32rx_u_store (current_cpu, abuf->idesc, 0, referenced, src1, src2);
2218 model_m32rx_sth (SIM_CPU *current_cpu, void *sem_arg)
2220 #define FLD(f) abuf->fields.fmt_sth.f
2221 ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
2225 int UNUSED insn_referenced = abuf->written;
2228 src1 = FLD (in_src1);
2229 src2 = FLD (in_src2);
2230 referenced |= 1 << 0;
2231 referenced |= 1 << 1;
2232 cycles += m32rxf_model_m32rx_u_store (current_cpu, abuf->idesc, 0, referenced, src1, src2);
2239 model_m32rx_sth_d (SIM_CPU *current_cpu, void *sem_arg)
2241 #define FLD(f) abuf->fields.fmt_sth_d.f
2242 ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
2246 int UNUSED insn_referenced = abuf->written;
2249 src1 = FLD (in_src1);
2250 src2 = FLD (in_src2);
2251 referenced |= 1 << 0;
2252 referenced |= 1 << 1;
2253 cycles += m32rxf_model_m32rx_u_store (current_cpu, abuf->idesc, 0, referenced, src1, src2);
2260 model_m32rx_st_plus (SIM_CPU *current_cpu, void *sem_arg)
2262 #define FLD(f) abuf->fields.fmt_st_plus.f
2263 ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
2267 int UNUSED insn_referenced = abuf->written;
2270 src1 = FLD (in_src1);
2271 src2 = FLD (in_src2);
2272 referenced |= 1 << 0;
2273 referenced |= 1 << 1;
2274 cycles += m32rxf_model_m32rx_u_store (current_cpu, abuf->idesc, 0, referenced, src1, src2);
2278 int UNUSED insn_referenced = abuf->written;
2282 dr = FLD (out_src2);
2284 referenced |= 1 << 0;
2285 referenced |= 1 << 2;
2286 cycles += m32rxf_model_m32rx_u_exec (current_cpu, abuf->idesc, 1, referenced, sr, sr2, dr);
2293 model_m32rx_st_minus (SIM_CPU *current_cpu, void *sem_arg)
2295 #define FLD(f) abuf->fields.fmt_st_plus.f
2296 ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
2300 int UNUSED insn_referenced = abuf->written;
2303 src1 = FLD (in_src1);
2304 src2 = FLD (in_src2);
2305 referenced |= 1 << 0;
2306 referenced |= 1 << 1;
2307 cycles += m32rxf_model_m32rx_u_store (current_cpu, abuf->idesc, 0, referenced, src1, src2);
2311 int UNUSED insn_referenced = abuf->written;
2315 dr = FLD (out_src2);
2317 referenced |= 1 << 0;
2318 referenced |= 1 << 2;
2319 cycles += m32rxf_model_m32rx_u_exec (current_cpu, abuf->idesc, 1, referenced, sr, sr2, dr);
2326 model_m32rx_sub (SIM_CPU *current_cpu, void *sem_arg)
2328 #define FLD(f) abuf->fields.fmt_add.f
2329 ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
2333 int UNUSED insn_referenced = abuf->written;
2339 referenced |= 1 << 0;
2340 referenced |= 1 << 2;
2341 cycles += m32rxf_model_m32rx_u_exec (current_cpu, abuf->idesc, 0, referenced, sr, sr2, dr);
2348 model_m32rx_subv (SIM_CPU *current_cpu, void *sem_arg)
2350 #define FLD(f) abuf->fields.fmt_addv.f
2351 ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
2355 int UNUSED insn_referenced = abuf->written;
2361 referenced |= 1 << 0;
2362 referenced |= 1 << 2;
2363 cycles += m32rxf_model_m32rx_u_exec (current_cpu, abuf->idesc, 0, referenced, sr, sr2, dr);
2370 model_m32rx_subx (SIM_CPU *current_cpu, void *sem_arg)
2372 #define FLD(f) abuf->fields.fmt_addx.f
2373 ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
2377 int UNUSED insn_referenced = abuf->written;
2383 referenced |= 1 << 0;
2384 referenced |= 1 << 2;
2385 cycles += m32rxf_model_m32rx_u_exec (current_cpu, abuf->idesc, 0, referenced, sr, sr2, dr);
2392 model_m32rx_trap (SIM_CPU *current_cpu, void *sem_arg)
2394 #define FLD(f) abuf->fields.cti.fields.fmt_trap.f
2395 ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
2399 int UNUSED insn_referenced = abuf->written;
2403 cycles += m32rxf_model_m32rx_u_exec (current_cpu, abuf->idesc, 0, referenced, sr, sr2, dr);
2410 model_m32rx_unlock (SIM_CPU *current_cpu, void *sem_arg)
2412 #define FLD(f) abuf->fields.fmt_unlock.f
2413 ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
2417 int UNUSED insn_referenced = abuf->written;
2420 cycles += m32rxf_model_m32rx_u_load (current_cpu, abuf->idesc, 0, referenced, sr, dr);
2427 model_m32rx_satb (SIM_CPU *current_cpu, void *sem_arg)
2429 #define FLD(f) abuf->fields.fmt_satb.f
2430 ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
2434 int UNUSED insn_referenced = abuf->written;
2440 referenced |= 1 << 0;
2441 referenced |= 1 << 2;
2442 cycles += m32rxf_model_m32rx_u_exec (current_cpu, abuf->idesc, 0, referenced, sr, sr2, dr);
2449 model_m32rx_sath (SIM_CPU *current_cpu, void *sem_arg)
2451 #define FLD(f) abuf->fields.fmt_satb.f
2452 ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
2456 int UNUSED insn_referenced = abuf->written;
2462 referenced |= 1 << 0;
2463 referenced |= 1 << 2;
2464 cycles += m32rxf_model_m32rx_u_exec (current_cpu, abuf->idesc, 0, referenced, sr, sr2, dr);
2471 model_m32rx_sat (SIM_CPU *current_cpu, void *sem_arg)
2473 #define FLD(f) abuf->fields.fmt_sat.f
2474 ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
2478 int UNUSED insn_referenced = abuf->written;
2484 if (insn_referenced & (1 << 1)) referenced |= 1 << 0;
2485 referenced |= 1 << 2;
2486 cycles += m32rxf_model_m32rx_u_exec (current_cpu, abuf->idesc, 0, referenced, sr, sr2, dr);
2493 model_m32rx_pcmpbz (SIM_CPU *current_cpu, void *sem_arg)
2495 #define FLD(f) abuf->fields.fmt_cmpz.f
2496 ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
2500 int UNUSED insn_referenced = abuf->written;
2503 src2 = FLD (in_src2);
2504 referenced |= 1 << 1;
2505 cycles += m32rxf_model_m32rx_u_cmp (current_cpu, abuf->idesc, 0, referenced, src1, src2);
2512 model_m32rx_sadd (SIM_CPU *current_cpu, void *sem_arg)
2514 #define FLD(f) abuf->fields.fmt_sadd.f
2515 ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
2519 int UNUSED insn_referenced = abuf->written;
2522 cycles += m32rxf_model_m32rx_u_mac (current_cpu, abuf->idesc, 0, referenced, src1, src2);
2529 model_m32rx_macwu1 (SIM_CPU *current_cpu, void *sem_arg)
2531 #define FLD(f) abuf->fields.fmt_macwu1.f
2532 ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
2536 int UNUSED insn_referenced = abuf->written;
2539 src1 = FLD (in_src1);
2540 src2 = FLD (in_src2);
2541 referenced |= 1 << 0;
2542 referenced |= 1 << 1;
2543 cycles += m32rxf_model_m32rx_u_mac (current_cpu, abuf->idesc, 0, referenced, src1, src2);
2550 model_m32rx_msblo (SIM_CPU *current_cpu, void *sem_arg)
2552 #define FLD(f) abuf->fields.fmt_msblo.f
2553 ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
2557 int UNUSED insn_referenced = abuf->written;
2560 src1 = FLD (in_src1);
2561 src2 = FLD (in_src2);
2562 referenced |= 1 << 0;
2563 referenced |= 1 << 1;
2564 cycles += m32rxf_model_m32rx_u_mac (current_cpu, abuf->idesc, 0, referenced, src1, src2);
2571 model_m32rx_mulwu1 (SIM_CPU *current_cpu, void *sem_arg)
2573 #define FLD(f) abuf->fields.fmt_mulwu1.f
2574 ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
2578 int UNUSED insn_referenced = abuf->written;
2581 src1 = FLD (in_src1);
2582 src2 = FLD (in_src2);
2583 referenced |= 1 << 0;
2584 referenced |= 1 << 1;
2585 cycles += m32rxf_model_m32rx_u_mac (current_cpu, abuf->idesc, 0, referenced, src1, src2);
2592 model_m32rx_maclh1 (SIM_CPU *current_cpu, void *sem_arg)
2594 #define FLD(f) abuf->fields.fmt_macwu1.f
2595 ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
2599 int UNUSED insn_referenced = abuf->written;
2602 src1 = FLD (in_src1);
2603 src2 = FLD (in_src2);
2604 referenced |= 1 << 0;
2605 referenced |= 1 << 1;
2606 cycles += m32rxf_model_m32rx_u_mac (current_cpu, abuf->idesc, 0, referenced, src1, src2);
2613 model_m32rx_sc (SIM_CPU *current_cpu, void *sem_arg)
2615 #define FLD(f) abuf->fields.cti.fields.fmt_sc.f
2616 ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
2620 int UNUSED insn_referenced = abuf->written;
2624 cycles += m32rxf_model_m32rx_u_exec (current_cpu, abuf->idesc, 0, referenced, sr, sr2, dr);
2631 model_m32rx_snc (SIM_CPU *current_cpu, void *sem_arg)
2633 #define FLD(f) abuf->fields.cti.fields.fmt_sc.f
2634 ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
2638 int UNUSED insn_referenced = abuf->written;
2642 cycles += m32rxf_model_m32rx_u_exec (current_cpu, abuf->idesc, 0, referenced, sr, sr2, dr);
2648 /* We assume UNIT_NONE == 0 because the tables don't always terminate
2651 /* Model timing data for `m32rx'. */
2653 static const INSN_TIMING m32rx_timing[] = {
2654 { M32RXF_INSN_X_INVALID, model_m32rx_x_invalid, { { (int) UNIT_M32RX_U_EXEC, 1, 1 } } },
2655 { M32RXF_INSN_X_AFTER, model_m32rx_x_after, { { (int) UNIT_M32RX_U_EXEC, 1, 1 } } },
2656 { M32RXF_INSN_X_BEFORE, model_m32rx_x_before, { { (int) UNIT_M32RX_U_EXEC, 1, 1 } } },
2657 { M32RXF_INSN_X_CTI_CHAIN, model_m32rx_x_cti_chain, { { (int) UNIT_M32RX_U_EXEC, 1, 1 } } },
2658 { M32RXF_INSN_X_CHAIN, model_m32rx_x_chain, { { (int) UNIT_M32RX_U_EXEC, 1, 1 } } },
2659 { M32RXF_INSN_X_BEGIN, model_m32rx_x_begin, { { (int) UNIT_M32RX_U_EXEC, 1, 1 } } },
2660 { M32RXF_INSN_ADD, model_m32rx_add, { { (int) UNIT_M32RX_U_EXEC, 1, 1 } } },
2661 { M32RXF_INSN_ADD3, model_m32rx_add3, { { (int) UNIT_M32RX_U_EXEC, 1, 1 } } },
2662 { M32RXF_INSN_AND, model_m32rx_and, { { (int) UNIT_M32RX_U_EXEC, 1, 1 } } },
2663 { M32RXF_INSN_AND3, model_m32rx_and3, { { (int) UNIT_M32RX_U_EXEC, 1, 1 } } },
2664 { M32RXF_INSN_OR, model_m32rx_or, { { (int) UNIT_M32RX_U_EXEC, 1, 1 } } },
2665 { M32RXF_INSN_OR3, model_m32rx_or3, { { (int) UNIT_M32RX_U_EXEC, 1, 1 } } },
2666 { M32RXF_INSN_XOR, model_m32rx_xor, { { (int) UNIT_M32RX_U_EXEC, 1, 1 } } },
2667 { M32RXF_INSN_XOR3, model_m32rx_xor3, { { (int) UNIT_M32RX_U_EXEC, 1, 1 } } },
2668 { M32RXF_INSN_ADDI, model_m32rx_addi, { { (int) UNIT_M32RX_U_EXEC, 1, 1 } } },
2669 { M32RXF_INSN_ADDV, model_m32rx_addv, { { (int) UNIT_M32RX_U_EXEC, 1, 1 } } },
2670 { M32RXF_INSN_ADDV3, model_m32rx_addv3, { { (int) UNIT_M32RX_U_EXEC, 1, 1 } } },
2671 { M32RXF_INSN_ADDX, model_m32rx_addx, { { (int) UNIT_M32RX_U_EXEC, 1, 1 } } },
2672 { M32RXF_INSN_BC8, model_m32rx_bc8, { { (int) UNIT_M32RX_U_CTI, 1, 1 } } },
2673 { M32RXF_INSN_BC24, model_m32rx_bc24, { { (int) UNIT_M32RX_U_CTI, 1, 1 } } },
2674 { M32RXF_INSN_BEQ, model_m32rx_beq, { { (int) UNIT_M32RX_U_CTI, 1, 1 }, { (int) UNIT_M32RX_U_CMP, 1, 0 } } },
2675 { M32RXF_INSN_BEQZ, model_m32rx_beqz, { { (int) UNIT_M32RX_U_CTI, 1, 1 }, { (int) UNIT_M32RX_U_CMP, 1, 0 } } },
2676 { M32RXF_INSN_BGEZ, model_m32rx_bgez, { { (int) UNIT_M32RX_U_CTI, 1, 1 }, { (int) UNIT_M32RX_U_CMP, 1, 0 } } },
2677 { M32RXF_INSN_BGTZ, model_m32rx_bgtz, { { (int) UNIT_M32RX_U_CTI, 1, 1 }, { (int) UNIT_M32RX_U_CMP, 1, 0 } } },
2678 { M32RXF_INSN_BLEZ, model_m32rx_blez, { { (int) UNIT_M32RX_U_CTI, 1, 1 }, { (int) UNIT_M32RX_U_CMP, 1, 0 } } },
2679 { M32RXF_INSN_BLTZ, model_m32rx_bltz, { { (int) UNIT_M32RX_U_CTI, 1, 1 }, { (int) UNIT_M32RX_U_CMP, 1, 0 } } },
2680 { M32RXF_INSN_BNEZ, model_m32rx_bnez, { { (int) UNIT_M32RX_U_CTI, 1, 1 }, { (int) UNIT_M32RX_U_CMP, 1, 0 } } },
2681 { M32RXF_INSN_BL8, model_m32rx_bl8, { { (int) UNIT_M32RX_U_CTI, 1, 1 } } },
2682 { M32RXF_INSN_BL24, model_m32rx_bl24, { { (int) UNIT_M32RX_U_CTI, 1, 1 } } },
2683 { M32RXF_INSN_BCL8, model_m32rx_bcl8, { { (int) UNIT_M32RX_U_CTI, 1, 1 } } },
2684 { M32RXF_INSN_BCL24, model_m32rx_bcl24, { { (int) UNIT_M32RX_U_CTI, 1, 1 } } },
2685 { M32RXF_INSN_BNC8, model_m32rx_bnc8, { { (int) UNIT_M32RX_U_CTI, 1, 1 } } },
2686 { M32RXF_INSN_BNC24, model_m32rx_bnc24, { { (int) UNIT_M32RX_U_CTI, 1, 1 } } },
2687 { M32RXF_INSN_BNE, model_m32rx_bne, { { (int) UNIT_M32RX_U_CTI, 1, 1 }, { (int) UNIT_M32RX_U_CMP, 1, 0 } } },
2688 { M32RXF_INSN_BRA8, model_m32rx_bra8, { { (int) UNIT_M32RX_U_CTI, 1, 1 } } },
2689 { M32RXF_INSN_BRA24, model_m32rx_bra24, { { (int) UNIT_M32RX_U_CTI, 1, 1 } } },
2690 { M32RXF_INSN_BNCL8, model_m32rx_bncl8, { { (int) UNIT_M32RX_U_CTI, 1, 1 } } },
2691 { M32RXF_INSN_BNCL24, model_m32rx_bncl24, { { (int) UNIT_M32RX_U_CTI, 1, 1 } } },
2692 { M32RXF_INSN_CMP, model_m32rx_cmp, { { (int) UNIT_M32RX_U_CMP, 1, 1 } } },
2693 { M32RXF_INSN_CMPI, model_m32rx_cmpi, { { (int) UNIT_M32RX_U_CMP, 1, 1 } } },
2694 { M32RXF_INSN_CMPU, model_m32rx_cmpu, { { (int) UNIT_M32RX_U_CMP, 1, 1 } } },
2695 { M32RXF_INSN_CMPUI, model_m32rx_cmpui, { { (int) UNIT_M32RX_U_CMP, 1, 1 } } },
2696 { M32RXF_INSN_CMPEQ, model_m32rx_cmpeq, { { (int) UNIT_M32RX_U_CMP, 1, 1 } } },
2697 { M32RXF_INSN_CMPZ, model_m32rx_cmpz, { { (int) UNIT_M32RX_U_CMP, 1, 1 } } },
2698 { M32RXF_INSN_DIV, model_m32rx_div, { { (int) UNIT_M32RX_U_EXEC, 1, 37 } } },
2699 { M32RXF_INSN_DIVU, model_m32rx_divu, { { (int) UNIT_M32RX_U_EXEC, 1, 37 } } },
2700 { M32RXF_INSN_REM, model_m32rx_rem, { { (int) UNIT_M32RX_U_EXEC, 1, 37 } } },
2701 { M32RXF_INSN_REMU, model_m32rx_remu, { { (int) UNIT_M32RX_U_EXEC, 1, 37 } } },
2702 { M32RXF_INSN_DIVH, model_m32rx_divh, { { (int) UNIT_M32RX_U_EXEC, 1, 21 } } },
2703 { M32RXF_INSN_JC, model_m32rx_jc, { { (int) UNIT_M32RX_U_CTI, 1, 1 } } },
2704 { M32RXF_INSN_JNC, model_m32rx_jnc, { { (int) UNIT_M32RX_U_CTI, 1, 1 } } },
2705 { M32RXF_INSN_JL, model_m32rx_jl, { { (int) UNIT_M32RX_U_CTI, 1, 1 } } },
2706 { M32RXF_INSN_JMP, model_m32rx_jmp, { { (int) UNIT_M32RX_U_CTI, 1, 1 } } },
2707 { M32RXF_INSN_LD, model_m32rx_ld, { { (int) UNIT_M32RX_U_LOAD, 1, 1 } } },
2708 { M32RXF_INSN_LD_D, model_m32rx_ld_d, { { (int) UNIT_M32RX_U_LOAD, 1, 2 } } },
2709 { M32RXF_INSN_LDB, model_m32rx_ldb, { { (int) UNIT_M32RX_U_LOAD, 1, 1 } } },
2710 { M32RXF_INSN_LDB_D, model_m32rx_ldb_d, { { (int) UNIT_M32RX_U_LOAD, 1, 2 } } },
2711 { M32RXF_INSN_LDH, model_m32rx_ldh, { { (int) UNIT_M32RX_U_LOAD, 1, 1 } } },
2712 { M32RXF_INSN_LDH_D, model_m32rx_ldh_d, { { (int) UNIT_M32RX_U_LOAD, 1, 2 } } },
2713 { M32RXF_INSN_LDUB, model_m32rx_ldub, { { (int) UNIT_M32RX_U_LOAD, 1, 1 } } },
2714 { M32RXF_INSN_LDUB_D, model_m32rx_ldub_d, { { (int) UNIT_M32RX_U_LOAD, 1, 2 } } },
2715 { M32RXF_INSN_LDUH, model_m32rx_lduh, { { (int) UNIT_M32RX_U_LOAD, 1, 1 } } },
2716 { M32RXF_INSN_LDUH_D, model_m32rx_lduh_d, { { (int) UNIT_M32RX_U_LOAD, 1, 2 } } },
2717 { M32RXF_INSN_LD_PLUS, model_m32rx_ld_plus, { { (int) UNIT_M32RX_U_LOAD, 1, 1 }, { (int) UNIT_M32RX_U_EXEC, 1, 0 } } },
2718 { M32RXF_INSN_LD24, model_m32rx_ld24, { { (int) UNIT_M32RX_U_EXEC, 1, 1 } } },
2719 { M32RXF_INSN_LDI8, model_m32rx_ldi8, { { (int) UNIT_M32RX_U_EXEC, 1, 1 } } },
2720 { M32RXF_INSN_LDI16, model_m32rx_ldi16, { { (int) UNIT_M32RX_U_EXEC, 1, 1 } } },
2721 { M32RXF_INSN_LOCK, model_m32rx_lock, { { (int) UNIT_M32RX_U_LOAD, 1, 1 } } },
2722 { M32RXF_INSN_MACHI_A, model_m32rx_machi_a, { { (int) UNIT_M32RX_U_MAC, 1, 1 } } },
2723 { M32RXF_INSN_MACLO_A, model_m32rx_maclo_a, { { (int) UNIT_M32RX_U_MAC, 1, 1 } } },
2724 { M32RXF_INSN_MACWHI_A, model_m32rx_macwhi_a, { { (int) UNIT_M32RX_U_MAC, 1, 1 } } },
2725 { M32RXF_INSN_MACWLO_A, model_m32rx_macwlo_a, { { (int) UNIT_M32RX_U_MAC, 1, 1 } } },
2726 { M32RXF_INSN_MUL, model_m32rx_mul, { { (int) UNIT_M32RX_U_EXEC, 1, 4 } } },
2727 { M32RXF_INSN_MULHI_A, model_m32rx_mulhi_a, { { (int) UNIT_M32RX_U_MAC, 1, 1 } } },
2728 { M32RXF_INSN_MULLO_A, model_m32rx_mullo_a, { { (int) UNIT_M32RX_U_MAC, 1, 1 } } },
2729 { M32RXF_INSN_MULWHI_A, model_m32rx_mulwhi_a, { { (int) UNIT_M32RX_U_MAC, 1, 1 } } },
2730 { M32RXF_INSN_MULWLO_A, model_m32rx_mulwlo_a, { { (int) UNIT_M32RX_U_MAC, 1, 1 } } },
2731 { M32RXF_INSN_MV, model_m32rx_mv, { { (int) UNIT_M32RX_U_EXEC, 1, 1 } } },
2732 { M32RXF_INSN_MVFACHI_A, model_m32rx_mvfachi_a, { { (int) UNIT_M32RX_U_EXEC, 1, 2 } } },
2733 { M32RXF_INSN_MVFACLO_A, model_m32rx_mvfaclo_a, { { (int) UNIT_M32RX_U_EXEC, 1, 2 } } },
2734 { M32RXF_INSN_MVFACMI_A, model_m32rx_mvfacmi_a, { { (int) UNIT_M32RX_U_EXEC, 1, 2 } } },
2735 { M32RXF_INSN_MVFC, model_m32rx_mvfc, { { (int) UNIT_M32RX_U_EXEC, 1, 1 } } },
2736 { M32RXF_INSN_MVTACHI_A, model_m32rx_mvtachi_a, { { (int) UNIT_M32RX_U_EXEC, 1, 1 } } },
2737 { M32RXF_INSN_MVTACLO_A, model_m32rx_mvtaclo_a, { { (int) UNIT_M32RX_U_EXEC, 1, 1 } } },
2738 { M32RXF_INSN_MVTC, model_m32rx_mvtc, { { (int) UNIT_M32RX_U_EXEC, 1, 1 } } },
2739 { M32RXF_INSN_NEG, model_m32rx_neg, { { (int) UNIT_M32RX_U_EXEC, 1, 1 } } },
2740 { M32RXF_INSN_NOP, model_m32rx_nop, { { (int) UNIT_M32RX_U_EXEC, 1, 0 } } },
2741 { M32RXF_INSN_NOT, model_m32rx_not, { { (int) UNIT_M32RX_U_EXEC, 1, 1 } } },
2742 { M32RXF_INSN_RAC_DSI, model_m32rx_rac_dsi, { { (int) UNIT_M32RX_U_MAC, 1, 1 } } },
2743 { M32RXF_INSN_RACH_DSI, model_m32rx_rach_dsi, { { (int) UNIT_M32RX_U_MAC, 1, 1 } } },
2744 { M32RXF_INSN_RTE, model_m32rx_rte, { { (int) UNIT_M32RX_U_EXEC, 1, 1 } } },
2745 { M32RXF_INSN_SETH, model_m32rx_seth, { { (int) UNIT_M32RX_U_EXEC, 1, 1 } } },
2746 { M32RXF_INSN_SLL, model_m32rx_sll, { { (int) UNIT_M32RX_U_EXEC, 1, 1 } } },
2747 { M32RXF_INSN_SLL3, model_m32rx_sll3, { { (int) UNIT_M32RX_U_EXEC, 1, 1 } } },
2748 { M32RXF_INSN_SLLI, model_m32rx_slli, { { (int) UNIT_M32RX_U_EXEC, 1, 1 } } },
2749 { M32RXF_INSN_SRA, model_m32rx_sra, { { (int) UNIT_M32RX_U_EXEC, 1, 1 } } },
2750 { M32RXF_INSN_SRA3, model_m32rx_sra3, { { (int) UNIT_M32RX_U_EXEC, 1, 1 } } },
2751 { M32RXF_INSN_SRAI, model_m32rx_srai, { { (int) UNIT_M32RX_U_EXEC, 1, 1 } } },
2752 { M32RXF_INSN_SRL, model_m32rx_srl, { { (int) UNIT_M32RX_U_EXEC, 1, 1 } } },
2753 { M32RXF_INSN_SRL3, model_m32rx_srl3, { { (int) UNIT_M32RX_U_EXEC, 1, 1 } } },
2754 { M32RXF_INSN_SRLI, model_m32rx_srli, { { (int) UNIT_M32RX_U_EXEC, 1, 1 } } },
2755 { M32RXF_INSN_ST, model_m32rx_st, { { (int) UNIT_M32RX_U_STORE, 1, 1 } } },
2756 { M32RXF_INSN_ST_D, model_m32rx_st_d, { { (int) UNIT_M32RX_U_STORE, 1, 2 } } },
2757 { M32RXF_INSN_STB, model_m32rx_stb, { { (int) UNIT_M32RX_U_STORE, 1, 1 } } },
2758 { M32RXF_INSN_STB_D, model_m32rx_stb_d, { { (int) UNIT_M32RX_U_STORE, 1, 2 } } },
2759 { M32RXF_INSN_STH, model_m32rx_sth, { { (int) UNIT_M32RX_U_STORE, 1, 1 } } },
2760 { M32RXF_INSN_STH_D, model_m32rx_sth_d, { { (int) UNIT_M32RX_U_STORE, 1, 2 } } },
2761 { M32RXF_INSN_ST_PLUS, model_m32rx_st_plus, { { (int) UNIT_M32RX_U_STORE, 1, 1 }, { (int) UNIT_M32RX_U_EXEC, 1, 0 } } },
2762 { M32RXF_INSN_ST_MINUS, model_m32rx_st_minus, { { (int) UNIT_M32RX_U_STORE, 1, 1 }, { (int) UNIT_M32RX_U_EXEC, 1, 0 } } },
2763 { M32RXF_INSN_SUB, model_m32rx_sub, { { (int) UNIT_M32RX_U_EXEC, 1, 1 } } },
2764 { M32RXF_INSN_SUBV, model_m32rx_subv, { { (int) UNIT_M32RX_U_EXEC, 1, 1 } } },
2765 { M32RXF_INSN_SUBX, model_m32rx_subx, { { (int) UNIT_M32RX_U_EXEC, 1, 1 } } },
2766 { M32RXF_INSN_TRAP, model_m32rx_trap, { { (int) UNIT_M32RX_U_EXEC, 1, 1 } } },
2767 { M32RXF_INSN_UNLOCK, model_m32rx_unlock, { { (int) UNIT_M32RX_U_LOAD, 1, 1 } } },
2768 { M32RXF_INSN_SATB, model_m32rx_satb, { { (int) UNIT_M32RX_U_EXEC, 1, 1 } } },
2769 { M32RXF_INSN_SATH, model_m32rx_sath, { { (int) UNIT_M32RX_U_EXEC, 1, 1 } } },
2770 { M32RXF_INSN_SAT, model_m32rx_sat, { { (int) UNIT_M32RX_U_EXEC, 1, 1 } } },
2771 { M32RXF_INSN_PCMPBZ, model_m32rx_pcmpbz, { { (int) UNIT_M32RX_U_CMP, 1, 1 } } },
2772 { M32RXF_INSN_SADD, model_m32rx_sadd, { { (int) UNIT_M32RX_U_MAC, 1, 1 } } },
2773 { M32RXF_INSN_MACWU1, model_m32rx_macwu1, { { (int) UNIT_M32RX_U_MAC, 1, 1 } } },
2774 { M32RXF_INSN_MSBLO, model_m32rx_msblo, { { (int) UNIT_M32RX_U_MAC, 1, 1 } } },
2775 { M32RXF_INSN_MULWU1, model_m32rx_mulwu1, { { (int) UNIT_M32RX_U_MAC, 1, 1 } } },
2776 { M32RXF_INSN_MACLH1, model_m32rx_maclh1, { { (int) UNIT_M32RX_U_MAC, 1, 1 } } },
2777 { M32RXF_INSN_SC, model_m32rx_sc, { { (int) UNIT_M32RX_U_EXEC, 1, 1 } } },
2778 { M32RXF_INSN_SNC, model_m32rx_snc, { { (int) UNIT_M32RX_U_EXEC, 1, 1 } } },
2781 #endif /* WITH_PROFILE_MODEL_P */
2784 m32rx_model_init (SIM_CPU *cpu)
2786 CPU_MODEL_DATA (cpu) = (void *) zalloc (sizeof (MODEL_M32RX_DATA));
2789 #if WITH_PROFILE_MODEL_P
2790 #define TIMING_DATA(td) td
2792 #define TIMING_DATA(td) 0
2795 static const MODEL m32rx_models[] =
2797 { "m32rx", & m32rx_mach, MODEL_M32RX, TIMING_DATA (& m32rx_timing[0]), m32rx_model_init },
2801 /* The properties of this cpu's implementation. */
2803 static const MACH_IMP_PROPERTIES m32rxf_imp_properties =
2813 static const CGEN_INSN *
2814 m32rxf_opcode (SIM_CPU *cpu, int inum)
2816 return CPU_IDESC (cpu) [inum].opcode;
2819 /* start-sanitize-m32rx */
2821 m32rx_init_cpu (SIM_CPU *cpu)
2823 CPU_REG_FETCH (cpu) = m32rxf_fetch_register;
2824 CPU_REG_STORE (cpu) = m32rxf_store_register;
2825 CPU_PC_FETCH (cpu) = m32rxf_h_pc_get;
2826 CPU_PC_STORE (cpu) = m32rxf_h_pc_set;
2827 CPU_OPCODE (cpu) = m32rxf_opcode;
2828 CPU_MAX_INSNS (cpu) = M32RXF_INSN_MAX;
2829 CPU_INSN_NAME (cpu) = cgen_insn_name;
2830 CPU_FULL_ENGINE_FN (cpu) = m32rxf_engine_run_full;
2832 CPU_FAST_ENGINE_FN (cpu) = m32rxf_engine_run_fast;
2834 CPU_FAST_ENGINE_FN (cpu) = m32rxf_engine_run_full;
2836 m32rxf_init_idesc_table (cpu);
2839 const MACH m32rx_mach =
2842 32, 32, & m32rx_models[0], & m32rxf_imp_properties,
2846 /* end-sanitize-m32rx */