1 /* Simulator model support for m32r2f.
3 THIS FILE IS MACHINE GENERATED WITH CGEN.
5 Copyright 1996-2016 Free Software Foundation, Inc.
7 This file is part of the GNU simulators.
9 This file is free software; you can redistribute it and/or modify
10 it under the terms of the GNU General Public License as published by
11 the Free Software Foundation; either version 3, or (at your option)
14 It is distributed in the hope that it will be useful, but WITHOUT
15 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
16 or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public
17 License for more details.
19 You should have received a copy of the GNU General Public License along
20 with this program; if not, see <http://www.gnu.org/licenses/>.
24 #define WANT_CPU m32r2f
25 #define WANT_CPU_M32R2F
29 /* The profiling data is recorded here, but is accessed via the profiling
30 mechanism. After all, this is information for profiling. */
32 #if WITH_PROFILE_MODEL_P
34 /* Model handlers for each insn. */
37 model_m32r2_add (SIM_CPU *current_cpu, void *sem_arg)
39 #define FLD(f) abuf->fields.sfmt_add.f
40 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
41 const IDESC * UNUSED idesc = abuf->idesc;
45 int UNUSED insn_referenced = abuf->written;
51 out_dr = FLD (out_dr);
55 cycles += m32r2f_model_m32r2_u_exec (current_cpu, idesc, 0, referenced, in_sr, in_dr, out_dr);
62 model_m32r2_add3 (SIM_CPU *current_cpu, void *sem_arg)
64 #define FLD(f) abuf->fields.sfmt_add3.f
65 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
66 const IDESC * UNUSED idesc = abuf->idesc;
70 int UNUSED insn_referenced = abuf->written;
75 out_dr = FLD (out_dr);
78 cycles += m32r2f_model_m32r2_u_exec (current_cpu, idesc, 0, referenced, in_sr, in_dr, out_dr);
85 model_m32r2_and (SIM_CPU *current_cpu, void *sem_arg)
87 #define FLD(f) abuf->fields.sfmt_add.f
88 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
89 const IDESC * UNUSED idesc = abuf->idesc;
93 int UNUSED insn_referenced = abuf->written;
99 out_dr = FLD (out_dr);
100 referenced |= 1 << 0;
101 referenced |= 1 << 1;
102 referenced |= 1 << 2;
103 cycles += m32r2f_model_m32r2_u_exec (current_cpu, idesc, 0, referenced, in_sr, in_dr, out_dr);
110 model_m32r2_and3 (SIM_CPU *current_cpu, void *sem_arg)
112 #define FLD(f) abuf->fields.sfmt_and3.f
113 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
114 const IDESC * UNUSED idesc = abuf->idesc;
118 int UNUSED insn_referenced = abuf->written;
123 out_dr = FLD (out_dr);
124 referenced |= 1 << 0;
125 referenced |= 1 << 2;
126 cycles += m32r2f_model_m32r2_u_exec (current_cpu, idesc, 0, referenced, in_sr, in_dr, out_dr);
133 model_m32r2_or (SIM_CPU *current_cpu, void *sem_arg)
135 #define FLD(f) abuf->fields.sfmt_add.f
136 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
137 const IDESC * UNUSED idesc = abuf->idesc;
141 int UNUSED insn_referenced = abuf->written;
147 out_dr = FLD (out_dr);
148 referenced |= 1 << 0;
149 referenced |= 1 << 1;
150 referenced |= 1 << 2;
151 cycles += m32r2f_model_m32r2_u_exec (current_cpu, idesc, 0, referenced, in_sr, in_dr, out_dr);
158 model_m32r2_or3 (SIM_CPU *current_cpu, void *sem_arg)
160 #define FLD(f) abuf->fields.sfmt_and3.f
161 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
162 const IDESC * UNUSED idesc = abuf->idesc;
166 int UNUSED insn_referenced = abuf->written;
171 out_dr = FLD (out_dr);
172 referenced |= 1 << 0;
173 referenced |= 1 << 2;
174 cycles += m32r2f_model_m32r2_u_exec (current_cpu, idesc, 0, referenced, in_sr, in_dr, out_dr);
181 model_m32r2_xor (SIM_CPU *current_cpu, void *sem_arg)
183 #define FLD(f) abuf->fields.sfmt_add.f
184 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
185 const IDESC * UNUSED idesc = abuf->idesc;
189 int UNUSED insn_referenced = abuf->written;
195 out_dr = FLD (out_dr);
196 referenced |= 1 << 0;
197 referenced |= 1 << 1;
198 referenced |= 1 << 2;
199 cycles += m32r2f_model_m32r2_u_exec (current_cpu, idesc, 0, referenced, in_sr, in_dr, out_dr);
206 model_m32r2_xor3 (SIM_CPU *current_cpu, void *sem_arg)
208 #define FLD(f) abuf->fields.sfmt_and3.f
209 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
210 const IDESC * UNUSED idesc = abuf->idesc;
214 int UNUSED insn_referenced = abuf->written;
219 out_dr = FLD (out_dr);
220 referenced |= 1 << 0;
221 referenced |= 1 << 2;
222 cycles += m32r2f_model_m32r2_u_exec (current_cpu, idesc, 0, referenced, in_sr, in_dr, out_dr);
229 model_m32r2_addi (SIM_CPU *current_cpu, void *sem_arg)
231 #define FLD(f) abuf->fields.sfmt_addi.f
232 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
233 const IDESC * UNUSED idesc = abuf->idesc;
237 int UNUSED insn_referenced = abuf->written;
242 out_dr = FLD (out_dr);
243 referenced |= 1 << 1;
244 referenced |= 1 << 2;
245 cycles += m32r2f_model_m32r2_u_exec (current_cpu, idesc, 0, referenced, in_sr, in_dr, out_dr);
252 model_m32r2_addv (SIM_CPU *current_cpu, void *sem_arg)
254 #define FLD(f) abuf->fields.sfmt_add.f
255 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
256 const IDESC * UNUSED idesc = abuf->idesc;
260 int UNUSED insn_referenced = abuf->written;
266 out_dr = FLD (out_dr);
267 referenced |= 1 << 0;
268 referenced |= 1 << 1;
269 referenced |= 1 << 2;
270 cycles += m32r2f_model_m32r2_u_exec (current_cpu, idesc, 0, referenced, in_sr, in_dr, out_dr);
277 model_m32r2_addv3 (SIM_CPU *current_cpu, void *sem_arg)
279 #define FLD(f) abuf->fields.sfmt_add3.f
280 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
281 const IDESC * UNUSED idesc = abuf->idesc;
285 int UNUSED insn_referenced = abuf->written;
290 out_dr = FLD (out_dr);
291 referenced |= 1 << 0;
292 referenced |= 1 << 2;
293 cycles += m32r2f_model_m32r2_u_exec (current_cpu, idesc, 0, referenced, in_sr, in_dr, out_dr);
300 model_m32r2_addx (SIM_CPU *current_cpu, void *sem_arg)
302 #define FLD(f) abuf->fields.sfmt_add.f
303 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
304 const IDESC * UNUSED idesc = abuf->idesc;
308 int UNUSED insn_referenced = abuf->written;
314 out_dr = FLD (out_dr);
315 referenced |= 1 << 0;
316 referenced |= 1 << 1;
317 referenced |= 1 << 2;
318 cycles += m32r2f_model_m32r2_u_exec (current_cpu, idesc, 0, referenced, in_sr, in_dr, out_dr);
325 model_m32r2_bc8 (SIM_CPU *current_cpu, void *sem_arg)
327 #define FLD(f) abuf->fields.sfmt_bl8.f
328 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
329 const IDESC * UNUSED idesc = abuf->idesc;
333 int UNUSED insn_referenced = abuf->written;
335 if (insn_referenced & (1 << 2)) referenced |= 1 << 1;
336 cycles += m32r2f_model_m32r2_u_cti (current_cpu, idesc, 0, referenced, in_sr);
343 model_m32r2_bc24 (SIM_CPU *current_cpu, void *sem_arg)
345 #define FLD(f) abuf->fields.sfmt_bl24.f
346 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
347 const IDESC * UNUSED idesc = abuf->idesc;
351 int UNUSED insn_referenced = abuf->written;
353 if (insn_referenced & (1 << 2)) referenced |= 1 << 1;
354 cycles += m32r2f_model_m32r2_u_cti (current_cpu, idesc, 0, referenced, in_sr);
361 model_m32r2_beq (SIM_CPU *current_cpu, void *sem_arg)
363 #define FLD(f) abuf->fields.sfmt_beq.f
364 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
365 const IDESC * UNUSED idesc = abuf->idesc;
369 int UNUSED insn_referenced = abuf->written;
371 if (insn_referenced & (1 << 3)) referenced |= 1 << 1;
372 cycles += m32r2f_model_m32r2_u_cti (current_cpu, idesc, 0, referenced, in_sr);
376 int UNUSED insn_referenced = abuf->written;
379 in_src1 = FLD (in_src1);
380 in_src2 = FLD (in_src2);
381 referenced |= 1 << 0;
382 referenced |= 1 << 1;
383 cycles += m32r2f_model_m32r2_u_cmp (current_cpu, idesc, 1, referenced, in_src1, in_src2);
390 model_m32r2_beqz (SIM_CPU *current_cpu, void *sem_arg)
392 #define FLD(f) abuf->fields.sfmt_beq.f
393 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
394 const IDESC * UNUSED idesc = abuf->idesc;
398 int UNUSED insn_referenced = abuf->written;
400 if (insn_referenced & (1 << 2)) referenced |= 1 << 1;
401 cycles += m32r2f_model_m32r2_u_cti (current_cpu, idesc, 0, referenced, in_sr);
405 int UNUSED insn_referenced = abuf->written;
408 in_src2 = FLD (in_src2);
409 referenced |= 1 << 1;
410 cycles += m32r2f_model_m32r2_u_cmp (current_cpu, idesc, 1, referenced, in_src1, in_src2);
417 model_m32r2_bgez (SIM_CPU *current_cpu, void *sem_arg)
419 #define FLD(f) abuf->fields.sfmt_beq.f
420 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
421 const IDESC * UNUSED idesc = abuf->idesc;
425 int UNUSED insn_referenced = abuf->written;
427 if (insn_referenced & (1 << 2)) referenced |= 1 << 1;
428 cycles += m32r2f_model_m32r2_u_cti (current_cpu, idesc, 0, referenced, in_sr);
432 int UNUSED insn_referenced = abuf->written;
435 in_src2 = FLD (in_src2);
436 referenced |= 1 << 1;
437 cycles += m32r2f_model_m32r2_u_cmp (current_cpu, idesc, 1, referenced, in_src1, in_src2);
444 model_m32r2_bgtz (SIM_CPU *current_cpu, void *sem_arg)
446 #define FLD(f) abuf->fields.sfmt_beq.f
447 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
448 const IDESC * UNUSED idesc = abuf->idesc;
452 int UNUSED insn_referenced = abuf->written;
454 if (insn_referenced & (1 << 2)) referenced |= 1 << 1;
455 cycles += m32r2f_model_m32r2_u_cti (current_cpu, idesc, 0, referenced, in_sr);
459 int UNUSED insn_referenced = abuf->written;
462 in_src2 = FLD (in_src2);
463 referenced |= 1 << 1;
464 cycles += m32r2f_model_m32r2_u_cmp (current_cpu, idesc, 1, referenced, in_src1, in_src2);
471 model_m32r2_blez (SIM_CPU *current_cpu, void *sem_arg)
473 #define FLD(f) abuf->fields.sfmt_beq.f
474 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
475 const IDESC * UNUSED idesc = abuf->idesc;
479 int UNUSED insn_referenced = abuf->written;
481 if (insn_referenced & (1 << 2)) referenced |= 1 << 1;
482 cycles += m32r2f_model_m32r2_u_cti (current_cpu, idesc, 0, referenced, in_sr);
486 int UNUSED insn_referenced = abuf->written;
489 in_src2 = FLD (in_src2);
490 referenced |= 1 << 1;
491 cycles += m32r2f_model_m32r2_u_cmp (current_cpu, idesc, 1, referenced, in_src1, in_src2);
498 model_m32r2_bltz (SIM_CPU *current_cpu, void *sem_arg)
500 #define FLD(f) abuf->fields.sfmt_beq.f
501 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
502 const IDESC * UNUSED idesc = abuf->idesc;
506 int UNUSED insn_referenced = abuf->written;
508 if (insn_referenced & (1 << 2)) referenced |= 1 << 1;
509 cycles += m32r2f_model_m32r2_u_cti (current_cpu, idesc, 0, referenced, in_sr);
513 int UNUSED insn_referenced = abuf->written;
516 in_src2 = FLD (in_src2);
517 referenced |= 1 << 1;
518 cycles += m32r2f_model_m32r2_u_cmp (current_cpu, idesc, 1, referenced, in_src1, in_src2);
525 model_m32r2_bnez (SIM_CPU *current_cpu, void *sem_arg)
527 #define FLD(f) abuf->fields.sfmt_beq.f
528 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
529 const IDESC * UNUSED idesc = abuf->idesc;
533 int UNUSED insn_referenced = abuf->written;
535 if (insn_referenced & (1 << 2)) referenced |= 1 << 1;
536 cycles += m32r2f_model_m32r2_u_cti (current_cpu, idesc, 0, referenced, in_sr);
540 int UNUSED insn_referenced = abuf->written;
543 in_src2 = FLD (in_src2);
544 referenced |= 1 << 1;
545 cycles += m32r2f_model_m32r2_u_cmp (current_cpu, idesc, 1, referenced, in_src1, in_src2);
552 model_m32r2_bl8 (SIM_CPU *current_cpu, void *sem_arg)
554 #define FLD(f) abuf->fields.sfmt_bl8.f
555 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
556 const IDESC * UNUSED idesc = abuf->idesc;
560 int UNUSED insn_referenced = abuf->written;
562 referenced |= 1 << 1;
563 cycles += m32r2f_model_m32r2_u_cti (current_cpu, idesc, 0, referenced, in_sr);
570 model_m32r2_bl24 (SIM_CPU *current_cpu, void *sem_arg)
572 #define FLD(f) abuf->fields.sfmt_bl24.f
573 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
574 const IDESC * UNUSED idesc = abuf->idesc;
578 int UNUSED insn_referenced = abuf->written;
580 referenced |= 1 << 1;
581 cycles += m32r2f_model_m32r2_u_cti (current_cpu, idesc, 0, referenced, in_sr);
588 model_m32r2_bcl8 (SIM_CPU *current_cpu, void *sem_arg)
590 #define FLD(f) abuf->fields.sfmt_bl8.f
591 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
592 const IDESC * UNUSED idesc = abuf->idesc;
596 int UNUSED insn_referenced = abuf->written;
598 if (insn_referenced & (1 << 4)) referenced |= 1 << 1;
599 cycles += m32r2f_model_m32r2_u_cti (current_cpu, idesc, 0, referenced, in_sr);
606 model_m32r2_bcl24 (SIM_CPU *current_cpu, void *sem_arg)
608 #define FLD(f) abuf->fields.sfmt_bl24.f
609 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
610 const IDESC * UNUSED idesc = abuf->idesc;
614 int UNUSED insn_referenced = abuf->written;
616 if (insn_referenced & (1 << 4)) referenced |= 1 << 1;
617 cycles += m32r2f_model_m32r2_u_cti (current_cpu, idesc, 0, referenced, in_sr);
624 model_m32r2_bnc8 (SIM_CPU *current_cpu, void *sem_arg)
626 #define FLD(f) abuf->fields.sfmt_bl8.f
627 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
628 const IDESC * UNUSED idesc = abuf->idesc;
632 int UNUSED insn_referenced = abuf->written;
634 if (insn_referenced & (1 << 2)) referenced |= 1 << 1;
635 cycles += m32r2f_model_m32r2_u_cti (current_cpu, idesc, 0, referenced, in_sr);
642 model_m32r2_bnc24 (SIM_CPU *current_cpu, void *sem_arg)
644 #define FLD(f) abuf->fields.sfmt_bl24.f
645 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
646 const IDESC * UNUSED idesc = abuf->idesc;
650 int UNUSED insn_referenced = abuf->written;
652 if (insn_referenced & (1 << 2)) referenced |= 1 << 1;
653 cycles += m32r2f_model_m32r2_u_cti (current_cpu, idesc, 0, referenced, in_sr);
660 model_m32r2_bne (SIM_CPU *current_cpu, void *sem_arg)
662 #define FLD(f) abuf->fields.sfmt_beq.f
663 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
664 const IDESC * UNUSED idesc = abuf->idesc;
668 int UNUSED insn_referenced = abuf->written;
670 if (insn_referenced & (1 << 3)) referenced |= 1 << 1;
671 cycles += m32r2f_model_m32r2_u_cti (current_cpu, idesc, 0, referenced, in_sr);
675 int UNUSED insn_referenced = abuf->written;
678 in_src1 = FLD (in_src1);
679 in_src2 = FLD (in_src2);
680 referenced |= 1 << 0;
681 referenced |= 1 << 1;
682 cycles += m32r2f_model_m32r2_u_cmp (current_cpu, idesc, 1, referenced, in_src1, in_src2);
689 model_m32r2_bra8 (SIM_CPU *current_cpu, void *sem_arg)
691 #define FLD(f) abuf->fields.sfmt_bl8.f
692 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
693 const IDESC * UNUSED idesc = abuf->idesc;
697 int UNUSED insn_referenced = abuf->written;
699 referenced |= 1 << 1;
700 cycles += m32r2f_model_m32r2_u_cti (current_cpu, idesc, 0, referenced, in_sr);
707 model_m32r2_bra24 (SIM_CPU *current_cpu, void *sem_arg)
709 #define FLD(f) abuf->fields.sfmt_bl24.f
710 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
711 const IDESC * UNUSED idesc = abuf->idesc;
715 int UNUSED insn_referenced = abuf->written;
717 referenced |= 1 << 1;
718 cycles += m32r2f_model_m32r2_u_cti (current_cpu, idesc, 0, referenced, in_sr);
725 model_m32r2_bncl8 (SIM_CPU *current_cpu, void *sem_arg)
727 #define FLD(f) abuf->fields.sfmt_bl8.f
728 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
729 const IDESC * UNUSED idesc = abuf->idesc;
733 int UNUSED insn_referenced = abuf->written;
735 if (insn_referenced & (1 << 4)) referenced |= 1 << 1;
736 cycles += m32r2f_model_m32r2_u_cti (current_cpu, idesc, 0, referenced, in_sr);
743 model_m32r2_bncl24 (SIM_CPU *current_cpu, void *sem_arg)
745 #define FLD(f) abuf->fields.sfmt_bl24.f
746 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
747 const IDESC * UNUSED idesc = abuf->idesc;
751 int UNUSED insn_referenced = abuf->written;
753 if (insn_referenced & (1 << 4)) referenced |= 1 << 1;
754 cycles += m32r2f_model_m32r2_u_cti (current_cpu, idesc, 0, referenced, in_sr);
761 model_m32r2_cmp (SIM_CPU *current_cpu, void *sem_arg)
763 #define FLD(f) abuf->fields.sfmt_st_plus.f
764 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
765 const IDESC * UNUSED idesc = abuf->idesc;
769 int UNUSED insn_referenced = abuf->written;
772 in_src1 = FLD (in_src1);
773 in_src2 = FLD (in_src2);
774 referenced |= 1 << 0;
775 referenced |= 1 << 1;
776 cycles += m32r2f_model_m32r2_u_cmp (current_cpu, idesc, 0, referenced, in_src1, in_src2);
783 model_m32r2_cmpi (SIM_CPU *current_cpu, void *sem_arg)
785 #define FLD(f) abuf->fields.sfmt_st_d.f
786 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
787 const IDESC * UNUSED idesc = abuf->idesc;
791 int UNUSED insn_referenced = abuf->written;
794 in_src2 = FLD (in_src2);
795 referenced |= 1 << 1;
796 cycles += m32r2f_model_m32r2_u_cmp (current_cpu, idesc, 0, referenced, in_src1, in_src2);
803 model_m32r2_cmpu (SIM_CPU *current_cpu, void *sem_arg)
805 #define FLD(f) abuf->fields.sfmt_st_plus.f
806 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
807 const IDESC * UNUSED idesc = abuf->idesc;
811 int UNUSED insn_referenced = abuf->written;
814 in_src1 = FLD (in_src1);
815 in_src2 = FLD (in_src2);
816 referenced |= 1 << 0;
817 referenced |= 1 << 1;
818 cycles += m32r2f_model_m32r2_u_cmp (current_cpu, idesc, 0, referenced, in_src1, in_src2);
825 model_m32r2_cmpui (SIM_CPU *current_cpu, void *sem_arg)
827 #define FLD(f) abuf->fields.sfmt_st_d.f
828 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
829 const IDESC * UNUSED idesc = abuf->idesc;
833 int UNUSED insn_referenced = abuf->written;
836 in_src2 = FLD (in_src2);
837 referenced |= 1 << 1;
838 cycles += m32r2f_model_m32r2_u_cmp (current_cpu, idesc, 0, referenced, in_src1, in_src2);
845 model_m32r2_cmpeq (SIM_CPU *current_cpu, void *sem_arg)
847 #define FLD(f) abuf->fields.sfmt_st_plus.f
848 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
849 const IDESC * UNUSED idesc = abuf->idesc;
853 int UNUSED insn_referenced = abuf->written;
856 in_src1 = FLD (in_src1);
857 in_src2 = FLD (in_src2);
858 referenced |= 1 << 0;
859 referenced |= 1 << 1;
860 cycles += m32r2f_model_m32r2_u_cmp (current_cpu, idesc, 0, referenced, in_src1, in_src2);
867 model_m32r2_cmpz (SIM_CPU *current_cpu, void *sem_arg)
869 #define FLD(f) abuf->fields.sfmt_st_plus.f
870 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
871 const IDESC * UNUSED idesc = abuf->idesc;
875 int UNUSED insn_referenced = abuf->written;
878 in_src2 = FLD (in_src2);
879 referenced |= 1 << 1;
880 cycles += m32r2f_model_m32r2_u_cmp (current_cpu, idesc, 0, referenced, in_src1, in_src2);
887 model_m32r2_div (SIM_CPU *current_cpu, void *sem_arg)
889 #define FLD(f) abuf->fields.sfmt_add.f
890 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
891 const IDESC * UNUSED idesc = abuf->idesc;
895 int UNUSED insn_referenced = abuf->written;
901 out_dr = FLD (out_dr);
902 referenced |= 1 << 0;
903 if (insn_referenced & (1 << 0)) referenced |= 1 << 1;
904 if (insn_referenced & (1 << 2)) referenced |= 1 << 2;
905 cycles += m32r2f_model_m32r2_u_exec (current_cpu, idesc, 0, referenced, in_sr, in_dr, out_dr);
912 model_m32r2_divu (SIM_CPU *current_cpu, void *sem_arg)
914 #define FLD(f) abuf->fields.sfmt_add.f
915 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
916 const IDESC * UNUSED idesc = abuf->idesc;
920 int UNUSED insn_referenced = abuf->written;
926 out_dr = FLD (out_dr);
927 referenced |= 1 << 0;
928 if (insn_referenced & (1 << 0)) referenced |= 1 << 1;
929 if (insn_referenced & (1 << 2)) referenced |= 1 << 2;
930 cycles += m32r2f_model_m32r2_u_exec (current_cpu, idesc, 0, referenced, in_sr, in_dr, out_dr);
937 model_m32r2_rem (SIM_CPU *current_cpu, void *sem_arg)
939 #define FLD(f) abuf->fields.sfmt_add.f
940 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
941 const IDESC * UNUSED idesc = abuf->idesc;
945 int UNUSED insn_referenced = abuf->written;
951 out_dr = FLD (out_dr);
952 referenced |= 1 << 0;
953 if (insn_referenced & (1 << 0)) referenced |= 1 << 1;
954 if (insn_referenced & (1 << 2)) referenced |= 1 << 2;
955 cycles += m32r2f_model_m32r2_u_exec (current_cpu, idesc, 0, referenced, in_sr, in_dr, out_dr);
962 model_m32r2_remu (SIM_CPU *current_cpu, void *sem_arg)
964 #define FLD(f) abuf->fields.sfmt_add.f
965 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
966 const IDESC * UNUSED idesc = abuf->idesc;
970 int UNUSED insn_referenced = abuf->written;
976 out_dr = FLD (out_dr);
977 referenced |= 1 << 0;
978 if (insn_referenced & (1 << 0)) referenced |= 1 << 1;
979 if (insn_referenced & (1 << 2)) referenced |= 1 << 2;
980 cycles += m32r2f_model_m32r2_u_exec (current_cpu, idesc, 0, referenced, in_sr, in_dr, out_dr);
987 model_m32r2_remh (SIM_CPU *current_cpu, void *sem_arg)
989 #define FLD(f) abuf->fields.sfmt_add.f
990 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
991 const IDESC * UNUSED idesc = abuf->idesc;
995 int UNUSED insn_referenced = abuf->written;
1000 in_dr = FLD (in_dr);
1001 out_dr = FLD (out_dr);
1002 referenced |= 1 << 0;
1003 if (insn_referenced & (1 << 0)) referenced |= 1 << 1;
1004 if (insn_referenced & (1 << 2)) referenced |= 1 << 2;
1005 cycles += m32r2f_model_m32r2_u_exec (current_cpu, idesc, 0, referenced, in_sr, in_dr, out_dr);
1012 model_m32r2_remuh (SIM_CPU *current_cpu, void *sem_arg)
1014 #define FLD(f) abuf->fields.sfmt_add.f
1015 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
1016 const IDESC * UNUSED idesc = abuf->idesc;
1020 int UNUSED insn_referenced = abuf->written;
1024 in_sr = FLD (in_sr);
1025 in_dr = FLD (in_dr);
1026 out_dr = FLD (out_dr);
1027 referenced |= 1 << 0;
1028 if (insn_referenced & (1 << 0)) referenced |= 1 << 1;
1029 if (insn_referenced & (1 << 2)) referenced |= 1 << 2;
1030 cycles += m32r2f_model_m32r2_u_exec (current_cpu, idesc, 0, referenced, in_sr, in_dr, out_dr);
1037 model_m32r2_remb (SIM_CPU *current_cpu, void *sem_arg)
1039 #define FLD(f) abuf->fields.sfmt_add.f
1040 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
1041 const IDESC * UNUSED idesc = abuf->idesc;
1045 int UNUSED insn_referenced = abuf->written;
1049 in_sr = FLD (in_sr);
1050 in_dr = FLD (in_dr);
1051 out_dr = FLD (out_dr);
1052 referenced |= 1 << 0;
1053 if (insn_referenced & (1 << 0)) referenced |= 1 << 1;
1054 if (insn_referenced & (1 << 2)) referenced |= 1 << 2;
1055 cycles += m32r2f_model_m32r2_u_exec (current_cpu, idesc, 0, referenced, in_sr, in_dr, out_dr);
1062 model_m32r2_remub (SIM_CPU *current_cpu, void *sem_arg)
1064 #define FLD(f) abuf->fields.sfmt_add.f
1065 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
1066 const IDESC * UNUSED idesc = abuf->idesc;
1070 int UNUSED insn_referenced = abuf->written;
1074 in_sr = FLD (in_sr);
1075 in_dr = FLD (in_dr);
1076 out_dr = FLD (out_dr);
1077 referenced |= 1 << 0;
1078 if (insn_referenced & (1 << 0)) referenced |= 1 << 1;
1079 if (insn_referenced & (1 << 2)) referenced |= 1 << 2;
1080 cycles += m32r2f_model_m32r2_u_exec (current_cpu, idesc, 0, referenced, in_sr, in_dr, out_dr);
1087 model_m32r2_divuh (SIM_CPU *current_cpu, void *sem_arg)
1089 #define FLD(f) abuf->fields.sfmt_add.f
1090 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
1091 const IDESC * UNUSED idesc = abuf->idesc;
1095 int UNUSED insn_referenced = abuf->written;
1099 in_sr = FLD (in_sr);
1100 in_dr = FLD (in_dr);
1101 out_dr = FLD (out_dr);
1102 referenced |= 1 << 0;
1103 if (insn_referenced & (1 << 0)) referenced |= 1 << 1;
1104 if (insn_referenced & (1 << 2)) referenced |= 1 << 2;
1105 cycles += m32r2f_model_m32r2_u_exec (current_cpu, idesc, 0, referenced, in_sr, in_dr, out_dr);
1112 model_m32r2_divb (SIM_CPU *current_cpu, void *sem_arg)
1114 #define FLD(f) abuf->fields.sfmt_add.f
1115 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
1116 const IDESC * UNUSED idesc = abuf->idesc;
1120 int UNUSED insn_referenced = abuf->written;
1124 in_sr = FLD (in_sr);
1125 in_dr = FLD (in_dr);
1126 out_dr = FLD (out_dr);
1127 referenced |= 1 << 0;
1128 if (insn_referenced & (1 << 0)) referenced |= 1 << 1;
1129 if (insn_referenced & (1 << 2)) referenced |= 1 << 2;
1130 cycles += m32r2f_model_m32r2_u_exec (current_cpu, idesc, 0, referenced, in_sr, in_dr, out_dr);
1137 model_m32r2_divub (SIM_CPU *current_cpu, void *sem_arg)
1139 #define FLD(f) abuf->fields.sfmt_add.f
1140 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
1141 const IDESC * UNUSED idesc = abuf->idesc;
1145 int UNUSED insn_referenced = abuf->written;
1149 in_sr = FLD (in_sr);
1150 in_dr = FLD (in_dr);
1151 out_dr = FLD (out_dr);
1152 referenced |= 1 << 0;
1153 if (insn_referenced & (1 << 0)) referenced |= 1 << 1;
1154 if (insn_referenced & (1 << 2)) referenced |= 1 << 2;
1155 cycles += m32r2f_model_m32r2_u_exec (current_cpu, idesc, 0, referenced, in_sr, in_dr, out_dr);
1162 model_m32r2_divh (SIM_CPU *current_cpu, void *sem_arg)
1164 #define FLD(f) abuf->fields.sfmt_add.f
1165 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
1166 const IDESC * UNUSED idesc = abuf->idesc;
1170 int UNUSED insn_referenced = abuf->written;
1174 in_sr = FLD (in_sr);
1175 in_dr = FLD (in_dr);
1176 out_dr = FLD (out_dr);
1177 referenced |= 1 << 0;
1178 if (insn_referenced & (1 << 0)) referenced |= 1 << 1;
1179 if (insn_referenced & (1 << 2)) referenced |= 1 << 2;
1180 cycles += m32r2f_model_m32r2_u_exec (current_cpu, idesc, 0, referenced, in_sr, in_dr, out_dr);
1187 model_m32r2_jc (SIM_CPU *current_cpu, void *sem_arg)
1189 #define FLD(f) abuf->fields.sfmt_jl.f
1190 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
1191 const IDESC * UNUSED idesc = abuf->idesc;
1195 int UNUSED insn_referenced = abuf->written;
1197 in_sr = FLD (in_sr);
1198 if (insn_referenced & (1 << 1)) referenced |= 1 << 0;
1199 if (insn_referenced & (1 << 2)) referenced |= 1 << 1;
1200 cycles += m32r2f_model_m32r2_u_cti (current_cpu, idesc, 0, referenced, in_sr);
1207 model_m32r2_jnc (SIM_CPU *current_cpu, void *sem_arg)
1209 #define FLD(f) abuf->fields.sfmt_jl.f
1210 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
1211 const IDESC * UNUSED idesc = abuf->idesc;
1215 int UNUSED insn_referenced = abuf->written;
1217 in_sr = FLD (in_sr);
1218 if (insn_referenced & (1 << 1)) referenced |= 1 << 0;
1219 if (insn_referenced & (1 << 2)) referenced |= 1 << 1;
1220 cycles += m32r2f_model_m32r2_u_cti (current_cpu, idesc, 0, referenced, in_sr);
1227 model_m32r2_jl (SIM_CPU *current_cpu, void *sem_arg)
1229 #define FLD(f) abuf->fields.sfmt_jl.f
1230 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
1231 const IDESC * UNUSED idesc = abuf->idesc;
1235 int UNUSED insn_referenced = abuf->written;
1237 in_sr = FLD (in_sr);
1238 referenced |= 1 << 0;
1239 referenced |= 1 << 1;
1240 cycles += m32r2f_model_m32r2_u_cti (current_cpu, idesc, 0, referenced, in_sr);
1247 model_m32r2_jmp (SIM_CPU *current_cpu, void *sem_arg)
1249 #define FLD(f) abuf->fields.sfmt_jl.f
1250 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
1251 const IDESC * UNUSED idesc = abuf->idesc;
1255 int UNUSED insn_referenced = abuf->written;
1257 in_sr = FLD (in_sr);
1258 referenced |= 1 << 0;
1259 referenced |= 1 << 1;
1260 cycles += m32r2f_model_m32r2_u_cti (current_cpu, idesc, 0, referenced, in_sr);
1267 model_m32r2_ld (SIM_CPU *current_cpu, void *sem_arg)
1269 #define FLD(f) abuf->fields.sfmt_ld_plus.f
1270 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
1271 const IDESC * UNUSED idesc = abuf->idesc;
1275 int UNUSED insn_referenced = abuf->written;
1278 in_sr = FLD (in_sr);
1279 out_dr = FLD (out_dr);
1280 referenced |= 1 << 0;
1281 referenced |= 1 << 1;
1282 cycles += m32r2f_model_m32r2_u_load (current_cpu, idesc, 0, referenced, in_sr, out_dr);
1289 model_m32r2_ld_d (SIM_CPU *current_cpu, void *sem_arg)
1291 #define FLD(f) abuf->fields.sfmt_add3.f
1292 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
1293 const IDESC * UNUSED idesc = abuf->idesc;
1297 int UNUSED insn_referenced = abuf->written;
1300 in_sr = FLD (in_sr);
1301 out_dr = FLD (out_dr);
1302 referenced |= 1 << 0;
1303 referenced |= 1 << 1;
1304 cycles += m32r2f_model_m32r2_u_load (current_cpu, idesc, 0, referenced, in_sr, out_dr);
1311 model_m32r2_ldb (SIM_CPU *current_cpu, void *sem_arg)
1313 #define FLD(f) abuf->fields.sfmt_ld_plus.f
1314 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
1315 const IDESC * UNUSED idesc = abuf->idesc;
1319 int UNUSED insn_referenced = abuf->written;
1322 in_sr = FLD (in_sr);
1323 out_dr = FLD (out_dr);
1324 referenced |= 1 << 0;
1325 referenced |= 1 << 1;
1326 cycles += m32r2f_model_m32r2_u_load (current_cpu, idesc, 0, referenced, in_sr, out_dr);
1333 model_m32r2_ldb_d (SIM_CPU *current_cpu, void *sem_arg)
1335 #define FLD(f) abuf->fields.sfmt_add3.f
1336 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
1337 const IDESC * UNUSED idesc = abuf->idesc;
1341 int UNUSED insn_referenced = abuf->written;
1344 in_sr = FLD (in_sr);
1345 out_dr = FLD (out_dr);
1346 referenced |= 1 << 0;
1347 referenced |= 1 << 1;
1348 cycles += m32r2f_model_m32r2_u_load (current_cpu, idesc, 0, referenced, in_sr, out_dr);
1355 model_m32r2_ldh (SIM_CPU *current_cpu, void *sem_arg)
1357 #define FLD(f) abuf->fields.sfmt_ld_plus.f
1358 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
1359 const IDESC * UNUSED idesc = abuf->idesc;
1363 int UNUSED insn_referenced = abuf->written;
1366 in_sr = FLD (in_sr);
1367 out_dr = FLD (out_dr);
1368 referenced |= 1 << 0;
1369 referenced |= 1 << 1;
1370 cycles += m32r2f_model_m32r2_u_load (current_cpu, idesc, 0, referenced, in_sr, out_dr);
1377 model_m32r2_ldh_d (SIM_CPU *current_cpu, void *sem_arg)
1379 #define FLD(f) abuf->fields.sfmt_add3.f
1380 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
1381 const IDESC * UNUSED idesc = abuf->idesc;
1385 int UNUSED insn_referenced = abuf->written;
1388 in_sr = FLD (in_sr);
1389 out_dr = FLD (out_dr);
1390 referenced |= 1 << 0;
1391 referenced |= 1 << 1;
1392 cycles += m32r2f_model_m32r2_u_load (current_cpu, idesc, 0, referenced, in_sr, out_dr);
1399 model_m32r2_ldub (SIM_CPU *current_cpu, void *sem_arg)
1401 #define FLD(f) abuf->fields.sfmt_ld_plus.f
1402 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
1403 const IDESC * UNUSED idesc = abuf->idesc;
1407 int UNUSED insn_referenced = abuf->written;
1410 in_sr = FLD (in_sr);
1411 out_dr = FLD (out_dr);
1412 referenced |= 1 << 0;
1413 referenced |= 1 << 1;
1414 cycles += m32r2f_model_m32r2_u_load (current_cpu, idesc, 0, referenced, in_sr, out_dr);
1421 model_m32r2_ldub_d (SIM_CPU *current_cpu, void *sem_arg)
1423 #define FLD(f) abuf->fields.sfmt_add3.f
1424 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
1425 const IDESC * UNUSED idesc = abuf->idesc;
1429 int UNUSED insn_referenced = abuf->written;
1432 in_sr = FLD (in_sr);
1433 out_dr = FLD (out_dr);
1434 referenced |= 1 << 0;
1435 referenced |= 1 << 1;
1436 cycles += m32r2f_model_m32r2_u_load (current_cpu, idesc, 0, referenced, in_sr, out_dr);
1443 model_m32r2_lduh (SIM_CPU *current_cpu, void *sem_arg)
1445 #define FLD(f) abuf->fields.sfmt_ld_plus.f
1446 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
1447 const IDESC * UNUSED idesc = abuf->idesc;
1451 int UNUSED insn_referenced = abuf->written;
1454 in_sr = FLD (in_sr);
1455 out_dr = FLD (out_dr);
1456 referenced |= 1 << 0;
1457 referenced |= 1 << 1;
1458 cycles += m32r2f_model_m32r2_u_load (current_cpu, idesc, 0, referenced, in_sr, out_dr);
1465 model_m32r2_lduh_d (SIM_CPU *current_cpu, void *sem_arg)
1467 #define FLD(f) abuf->fields.sfmt_add3.f
1468 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
1469 const IDESC * UNUSED idesc = abuf->idesc;
1473 int UNUSED insn_referenced = abuf->written;
1476 in_sr = FLD (in_sr);
1477 out_dr = FLD (out_dr);
1478 referenced |= 1 << 0;
1479 referenced |= 1 << 1;
1480 cycles += m32r2f_model_m32r2_u_load (current_cpu, idesc, 0, referenced, in_sr, out_dr);
1487 model_m32r2_ld_plus (SIM_CPU *current_cpu, void *sem_arg)
1489 #define FLD(f) abuf->fields.sfmt_ld_plus.f
1490 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
1491 const IDESC * UNUSED idesc = abuf->idesc;
1495 int UNUSED insn_referenced = abuf->written;
1498 in_sr = FLD (in_sr);
1499 out_dr = FLD (out_dr);
1500 referenced |= 1 << 0;
1501 referenced |= 1 << 1;
1502 cycles += m32r2f_model_m32r2_u_load (current_cpu, idesc, 0, referenced, in_sr, out_dr);
1506 int UNUSED insn_referenced = abuf->written;
1510 in_dr = FLD (in_sr);
1511 out_dr = FLD (out_sr);
1512 referenced |= 1 << 0;
1513 referenced |= 1 << 2;
1514 cycles += m32r2f_model_m32r2_u_exec (current_cpu, idesc, 1, referenced, in_sr, in_dr, out_dr);
1521 model_m32r2_ld24 (SIM_CPU *current_cpu, void *sem_arg)
1523 #define FLD(f) abuf->fields.sfmt_ld24.f
1524 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
1525 const IDESC * UNUSED idesc = abuf->idesc;
1529 int UNUSED insn_referenced = abuf->written;
1533 out_dr = FLD (out_dr);
1534 referenced |= 1 << 2;
1535 cycles += m32r2f_model_m32r2_u_exec (current_cpu, idesc, 0, referenced, in_sr, in_dr, out_dr);
1542 model_m32r2_ldi8 (SIM_CPU *current_cpu, void *sem_arg)
1544 #define FLD(f) abuf->fields.sfmt_addi.f
1545 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
1546 const IDESC * UNUSED idesc = abuf->idesc;
1550 int UNUSED insn_referenced = abuf->written;
1554 out_dr = FLD (out_dr);
1555 referenced |= 1 << 2;
1556 cycles += m32r2f_model_m32r2_u_exec (current_cpu, idesc, 0, referenced, in_sr, in_dr, out_dr);
1563 model_m32r2_ldi16 (SIM_CPU *current_cpu, void *sem_arg)
1565 #define FLD(f) abuf->fields.sfmt_add3.f
1566 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
1567 const IDESC * UNUSED idesc = abuf->idesc;
1571 int UNUSED insn_referenced = abuf->written;
1575 out_dr = FLD (out_dr);
1576 referenced |= 1 << 2;
1577 cycles += m32r2f_model_m32r2_u_exec (current_cpu, idesc, 0, referenced, in_sr, in_dr, out_dr);
1584 model_m32r2_lock (SIM_CPU *current_cpu, void *sem_arg)
1586 #define FLD(f) abuf->fields.sfmt_ld_plus.f
1587 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
1588 const IDESC * UNUSED idesc = abuf->idesc;
1592 int UNUSED insn_referenced = abuf->written;
1595 in_sr = FLD (in_sr);
1596 out_dr = FLD (out_dr);
1597 referenced |= 1 << 0;
1598 referenced |= 1 << 1;
1599 cycles += m32r2f_model_m32r2_u_load (current_cpu, idesc, 0, referenced, in_sr, out_dr);
1606 model_m32r2_machi_a (SIM_CPU *current_cpu, void *sem_arg)
1608 #define FLD(f) abuf->fields.sfmt_machi_a.f
1609 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
1610 const IDESC * UNUSED idesc = abuf->idesc;
1614 int UNUSED insn_referenced = abuf->written;
1617 in_src1 = FLD (in_src1);
1618 in_src2 = FLD (in_src2);
1619 referenced |= 1 << 0;
1620 referenced |= 1 << 1;
1621 cycles += m32r2f_model_m32r2_u_mac (current_cpu, idesc, 0, referenced, in_src1, in_src2);
1628 model_m32r2_maclo_a (SIM_CPU *current_cpu, void *sem_arg)
1630 #define FLD(f) abuf->fields.sfmt_machi_a.f
1631 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
1632 const IDESC * UNUSED idesc = abuf->idesc;
1636 int UNUSED insn_referenced = abuf->written;
1639 in_src1 = FLD (in_src1);
1640 in_src2 = FLD (in_src2);
1641 referenced |= 1 << 0;
1642 referenced |= 1 << 1;
1643 cycles += m32r2f_model_m32r2_u_mac (current_cpu, idesc, 0, referenced, in_src1, in_src2);
1650 model_m32r2_macwhi_a (SIM_CPU *current_cpu, void *sem_arg)
1652 #define FLD(f) abuf->fields.sfmt_machi_a.f
1653 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
1654 const IDESC * UNUSED idesc = abuf->idesc;
1658 int UNUSED insn_referenced = abuf->written;
1661 in_src1 = FLD (in_src1);
1662 in_src2 = FLD (in_src2);
1663 referenced |= 1 << 0;
1664 referenced |= 1 << 1;
1665 cycles += m32r2f_model_m32r2_u_mac (current_cpu, idesc, 0, referenced, in_src1, in_src2);
1672 model_m32r2_macwlo_a (SIM_CPU *current_cpu, void *sem_arg)
1674 #define FLD(f) abuf->fields.sfmt_machi_a.f
1675 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
1676 const IDESC * UNUSED idesc = abuf->idesc;
1680 int UNUSED insn_referenced = abuf->written;
1683 in_src1 = FLD (in_src1);
1684 in_src2 = FLD (in_src2);
1685 referenced |= 1 << 0;
1686 referenced |= 1 << 1;
1687 cycles += m32r2f_model_m32r2_u_mac (current_cpu, idesc, 0, referenced, in_src1, in_src2);
1694 model_m32r2_mul (SIM_CPU *current_cpu, void *sem_arg)
1696 #define FLD(f) abuf->fields.sfmt_add.f
1697 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
1698 const IDESC * UNUSED idesc = abuf->idesc;
1702 int UNUSED insn_referenced = abuf->written;
1706 in_sr = FLD (in_sr);
1707 in_dr = FLD (in_dr);
1708 out_dr = FLD (out_dr);
1709 referenced |= 1 << 0;
1710 referenced |= 1 << 1;
1711 referenced |= 1 << 2;
1712 cycles += m32r2f_model_m32r2_u_exec (current_cpu, idesc, 0, referenced, in_sr, in_dr, out_dr);
1719 model_m32r2_mulhi_a (SIM_CPU *current_cpu, void *sem_arg)
1721 #define FLD(f) abuf->fields.sfmt_machi_a.f
1722 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
1723 const IDESC * UNUSED idesc = abuf->idesc;
1727 int UNUSED insn_referenced = abuf->written;
1730 in_src1 = FLD (in_src1);
1731 in_src2 = FLD (in_src2);
1732 referenced |= 1 << 0;
1733 referenced |= 1 << 1;
1734 cycles += m32r2f_model_m32r2_u_mac (current_cpu, idesc, 0, referenced, in_src1, in_src2);
1741 model_m32r2_mullo_a (SIM_CPU *current_cpu, void *sem_arg)
1743 #define FLD(f) abuf->fields.sfmt_machi_a.f
1744 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
1745 const IDESC * UNUSED idesc = abuf->idesc;
1749 int UNUSED insn_referenced = abuf->written;
1752 in_src1 = FLD (in_src1);
1753 in_src2 = FLD (in_src2);
1754 referenced |= 1 << 0;
1755 referenced |= 1 << 1;
1756 cycles += m32r2f_model_m32r2_u_mac (current_cpu, idesc, 0, referenced, in_src1, in_src2);
1763 model_m32r2_mulwhi_a (SIM_CPU *current_cpu, void *sem_arg)
1765 #define FLD(f) abuf->fields.sfmt_machi_a.f
1766 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
1767 const IDESC * UNUSED idesc = abuf->idesc;
1771 int UNUSED insn_referenced = abuf->written;
1774 in_src1 = FLD (in_src1);
1775 in_src2 = FLD (in_src2);
1776 referenced |= 1 << 0;
1777 referenced |= 1 << 1;
1778 cycles += m32r2f_model_m32r2_u_mac (current_cpu, idesc, 0, referenced, in_src1, in_src2);
1785 model_m32r2_mulwlo_a (SIM_CPU *current_cpu, void *sem_arg)
1787 #define FLD(f) abuf->fields.sfmt_machi_a.f
1788 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
1789 const IDESC * UNUSED idesc = abuf->idesc;
1793 int UNUSED insn_referenced = abuf->written;
1796 in_src1 = FLD (in_src1);
1797 in_src2 = FLD (in_src2);
1798 referenced |= 1 << 0;
1799 referenced |= 1 << 1;
1800 cycles += m32r2f_model_m32r2_u_mac (current_cpu, idesc, 0, referenced, in_src1, in_src2);
1807 model_m32r2_mv (SIM_CPU *current_cpu, void *sem_arg)
1809 #define FLD(f) abuf->fields.sfmt_ld_plus.f
1810 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
1811 const IDESC * UNUSED idesc = abuf->idesc;
1815 int UNUSED insn_referenced = abuf->written;
1819 in_sr = FLD (in_sr);
1820 out_dr = FLD (out_dr);
1821 referenced |= 1 << 0;
1822 referenced |= 1 << 2;
1823 cycles += m32r2f_model_m32r2_u_exec (current_cpu, idesc, 0, referenced, in_sr, in_dr, out_dr);
1830 model_m32r2_mvfachi_a (SIM_CPU *current_cpu, void *sem_arg)
1832 #define FLD(f) abuf->fields.sfmt_mvfachi_a.f
1833 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
1834 const IDESC * UNUSED idesc = abuf->idesc;
1838 int UNUSED insn_referenced = abuf->written;
1842 out_dr = FLD (out_dr);
1843 referenced |= 1 << 2;
1844 cycles += m32r2f_model_m32r2_u_exec (current_cpu, idesc, 0, referenced, in_sr, in_dr, out_dr);
1851 model_m32r2_mvfaclo_a (SIM_CPU *current_cpu, void *sem_arg)
1853 #define FLD(f) abuf->fields.sfmt_mvfachi_a.f
1854 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
1855 const IDESC * UNUSED idesc = abuf->idesc;
1859 int UNUSED insn_referenced = abuf->written;
1863 out_dr = FLD (out_dr);
1864 referenced |= 1 << 2;
1865 cycles += m32r2f_model_m32r2_u_exec (current_cpu, idesc, 0, referenced, in_sr, in_dr, out_dr);
1872 model_m32r2_mvfacmi_a (SIM_CPU *current_cpu, void *sem_arg)
1874 #define FLD(f) abuf->fields.sfmt_mvfachi_a.f
1875 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
1876 const IDESC * UNUSED idesc = abuf->idesc;
1880 int UNUSED insn_referenced = abuf->written;
1884 out_dr = FLD (out_dr);
1885 referenced |= 1 << 2;
1886 cycles += m32r2f_model_m32r2_u_exec (current_cpu, idesc, 0, referenced, in_sr, in_dr, out_dr);
1893 model_m32r2_mvfc (SIM_CPU *current_cpu, void *sem_arg)
1895 #define FLD(f) abuf->fields.sfmt_ld_plus.f
1896 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
1897 const IDESC * UNUSED idesc = abuf->idesc;
1901 int UNUSED insn_referenced = abuf->written;
1905 out_dr = FLD (out_dr);
1906 referenced |= 1 << 2;
1907 cycles += m32r2f_model_m32r2_u_exec (current_cpu, idesc, 0, referenced, in_sr, in_dr, out_dr);
1914 model_m32r2_mvtachi_a (SIM_CPU *current_cpu, void *sem_arg)
1916 #define FLD(f) abuf->fields.sfmt_mvtachi_a.f
1917 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
1918 const IDESC * UNUSED idesc = abuf->idesc;
1922 int UNUSED insn_referenced = abuf->written;
1926 in_sr = FLD (in_src1);
1927 cycles += m32r2f_model_m32r2_u_exec (current_cpu, idesc, 0, referenced, in_sr, in_dr, out_dr);
1934 model_m32r2_mvtaclo_a (SIM_CPU *current_cpu, void *sem_arg)
1936 #define FLD(f) abuf->fields.sfmt_mvtachi_a.f
1937 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
1938 const IDESC * UNUSED idesc = abuf->idesc;
1942 int UNUSED insn_referenced = abuf->written;
1946 in_sr = FLD (in_src1);
1947 cycles += m32r2f_model_m32r2_u_exec (current_cpu, idesc, 0, referenced, in_sr, in_dr, out_dr);
1954 model_m32r2_mvtc (SIM_CPU *current_cpu, void *sem_arg)
1956 #define FLD(f) abuf->fields.sfmt_ld_plus.f
1957 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
1958 const IDESC * UNUSED idesc = abuf->idesc;
1962 int UNUSED insn_referenced = abuf->written;
1966 in_sr = FLD (in_sr);
1967 referenced |= 1 << 0;
1968 cycles += m32r2f_model_m32r2_u_exec (current_cpu, idesc, 0, referenced, in_sr, in_dr, out_dr);
1975 model_m32r2_neg (SIM_CPU *current_cpu, void *sem_arg)
1977 #define FLD(f) abuf->fields.sfmt_ld_plus.f
1978 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
1979 const IDESC * UNUSED idesc = abuf->idesc;
1983 int UNUSED insn_referenced = abuf->written;
1987 in_sr = FLD (in_sr);
1988 out_dr = FLD (out_dr);
1989 referenced |= 1 << 0;
1990 referenced |= 1 << 2;
1991 cycles += m32r2f_model_m32r2_u_exec (current_cpu, idesc, 0, referenced, in_sr, in_dr, out_dr);
1998 model_m32r2_nop (SIM_CPU *current_cpu, void *sem_arg)
2000 #define FLD(f) abuf->fields.sfmt_empty.f
2001 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
2002 const IDESC * UNUSED idesc = abuf->idesc;
2006 int UNUSED insn_referenced = abuf->written;
2010 cycles += m32r2f_model_m32r2_u_exec (current_cpu, idesc, 0, referenced, in_sr, in_dr, out_dr);
2017 model_m32r2_not (SIM_CPU *current_cpu, void *sem_arg)
2019 #define FLD(f) abuf->fields.sfmt_ld_plus.f
2020 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
2021 const IDESC * UNUSED idesc = abuf->idesc;
2025 int UNUSED insn_referenced = abuf->written;
2029 in_sr = FLD (in_sr);
2030 out_dr = FLD (out_dr);
2031 referenced |= 1 << 0;
2032 referenced |= 1 << 2;
2033 cycles += m32r2f_model_m32r2_u_exec (current_cpu, idesc, 0, referenced, in_sr, in_dr, out_dr);
2040 model_m32r2_rac_dsi (SIM_CPU *current_cpu, void *sem_arg)
2042 #define FLD(f) abuf->fields.sfmt_rac_dsi.f
2043 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
2044 const IDESC * UNUSED idesc = abuf->idesc;
2048 int UNUSED insn_referenced = abuf->written;
2051 cycles += m32r2f_model_m32r2_u_mac (current_cpu, idesc, 0, referenced, in_src1, in_src2);
2058 model_m32r2_rach_dsi (SIM_CPU *current_cpu, void *sem_arg)
2060 #define FLD(f) abuf->fields.sfmt_rac_dsi.f
2061 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
2062 const IDESC * UNUSED idesc = abuf->idesc;
2066 int UNUSED insn_referenced = abuf->written;
2069 cycles += m32r2f_model_m32r2_u_mac (current_cpu, idesc, 0, referenced, in_src1, in_src2);
2076 model_m32r2_rte (SIM_CPU *current_cpu, void *sem_arg)
2078 #define FLD(f) abuf->fields.sfmt_empty.f
2079 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
2080 const IDESC * UNUSED idesc = abuf->idesc;
2084 int UNUSED insn_referenced = abuf->written;
2088 cycles += m32r2f_model_m32r2_u_exec (current_cpu, idesc, 0, referenced, in_sr, in_dr, out_dr);
2095 model_m32r2_seth (SIM_CPU *current_cpu, void *sem_arg)
2097 #define FLD(f) abuf->fields.sfmt_seth.f
2098 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
2099 const IDESC * UNUSED idesc = abuf->idesc;
2103 int UNUSED insn_referenced = abuf->written;
2107 out_dr = FLD (out_dr);
2108 referenced |= 1 << 2;
2109 cycles += m32r2f_model_m32r2_u_exec (current_cpu, idesc, 0, referenced, in_sr, in_dr, out_dr);
2116 model_m32r2_sll (SIM_CPU *current_cpu, void *sem_arg)
2118 #define FLD(f) abuf->fields.sfmt_add.f
2119 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
2120 const IDESC * UNUSED idesc = abuf->idesc;
2124 int UNUSED insn_referenced = abuf->written;
2128 in_sr = FLD (in_sr);
2129 in_dr = FLD (in_dr);
2130 out_dr = FLD (out_dr);
2131 referenced |= 1 << 0;
2132 referenced |= 1 << 1;
2133 referenced |= 1 << 2;
2134 cycles += m32r2f_model_m32r2_u_exec (current_cpu, idesc, 0, referenced, in_sr, in_dr, out_dr);
2141 model_m32r2_sll3 (SIM_CPU *current_cpu, void *sem_arg)
2143 #define FLD(f) abuf->fields.sfmt_add3.f
2144 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
2145 const IDESC * UNUSED idesc = abuf->idesc;
2149 int UNUSED insn_referenced = abuf->written;
2153 in_sr = FLD (in_sr);
2154 out_dr = FLD (out_dr);
2155 referenced |= 1 << 0;
2156 referenced |= 1 << 2;
2157 cycles += m32r2f_model_m32r2_u_exec (current_cpu, idesc, 0, referenced, in_sr, in_dr, out_dr);
2164 model_m32r2_slli (SIM_CPU *current_cpu, void *sem_arg)
2166 #define FLD(f) abuf->fields.sfmt_slli.f
2167 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
2168 const IDESC * UNUSED idesc = abuf->idesc;
2172 int UNUSED insn_referenced = abuf->written;
2176 in_dr = FLD (in_dr);
2177 out_dr = FLD (out_dr);
2178 referenced |= 1 << 1;
2179 referenced |= 1 << 2;
2180 cycles += m32r2f_model_m32r2_u_exec (current_cpu, idesc, 0, referenced, in_sr, in_dr, out_dr);
2187 model_m32r2_sra (SIM_CPU *current_cpu, void *sem_arg)
2189 #define FLD(f) abuf->fields.sfmt_add.f
2190 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
2191 const IDESC * UNUSED idesc = abuf->idesc;
2195 int UNUSED insn_referenced = abuf->written;
2199 in_sr = FLD (in_sr);
2200 in_dr = FLD (in_dr);
2201 out_dr = FLD (out_dr);
2202 referenced |= 1 << 0;
2203 referenced |= 1 << 1;
2204 referenced |= 1 << 2;
2205 cycles += m32r2f_model_m32r2_u_exec (current_cpu, idesc, 0, referenced, in_sr, in_dr, out_dr);
2212 model_m32r2_sra3 (SIM_CPU *current_cpu, void *sem_arg)
2214 #define FLD(f) abuf->fields.sfmt_add3.f
2215 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
2216 const IDESC * UNUSED idesc = abuf->idesc;
2220 int UNUSED insn_referenced = abuf->written;
2224 in_sr = FLD (in_sr);
2225 out_dr = FLD (out_dr);
2226 referenced |= 1 << 0;
2227 referenced |= 1 << 2;
2228 cycles += m32r2f_model_m32r2_u_exec (current_cpu, idesc, 0, referenced, in_sr, in_dr, out_dr);
2235 model_m32r2_srai (SIM_CPU *current_cpu, void *sem_arg)
2237 #define FLD(f) abuf->fields.sfmt_slli.f
2238 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
2239 const IDESC * UNUSED idesc = abuf->idesc;
2243 int UNUSED insn_referenced = abuf->written;
2247 in_dr = FLD (in_dr);
2248 out_dr = FLD (out_dr);
2249 referenced |= 1 << 1;
2250 referenced |= 1 << 2;
2251 cycles += m32r2f_model_m32r2_u_exec (current_cpu, idesc, 0, referenced, in_sr, in_dr, out_dr);
2258 model_m32r2_srl (SIM_CPU *current_cpu, void *sem_arg)
2260 #define FLD(f) abuf->fields.sfmt_add.f
2261 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
2262 const IDESC * UNUSED idesc = abuf->idesc;
2266 int UNUSED insn_referenced = abuf->written;
2270 in_sr = FLD (in_sr);
2271 in_dr = FLD (in_dr);
2272 out_dr = FLD (out_dr);
2273 referenced |= 1 << 0;
2274 referenced |= 1 << 1;
2275 referenced |= 1 << 2;
2276 cycles += m32r2f_model_m32r2_u_exec (current_cpu, idesc, 0, referenced, in_sr, in_dr, out_dr);
2283 model_m32r2_srl3 (SIM_CPU *current_cpu, void *sem_arg)
2285 #define FLD(f) abuf->fields.sfmt_add3.f
2286 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
2287 const IDESC * UNUSED idesc = abuf->idesc;
2291 int UNUSED insn_referenced = abuf->written;
2295 in_sr = FLD (in_sr);
2296 out_dr = FLD (out_dr);
2297 referenced |= 1 << 0;
2298 referenced |= 1 << 2;
2299 cycles += m32r2f_model_m32r2_u_exec (current_cpu, idesc, 0, referenced, in_sr, in_dr, out_dr);
2306 model_m32r2_srli (SIM_CPU *current_cpu, void *sem_arg)
2308 #define FLD(f) abuf->fields.sfmt_slli.f
2309 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
2310 const IDESC * UNUSED idesc = abuf->idesc;
2314 int UNUSED insn_referenced = abuf->written;
2318 in_dr = FLD (in_dr);
2319 out_dr = FLD (out_dr);
2320 referenced |= 1 << 1;
2321 referenced |= 1 << 2;
2322 cycles += m32r2f_model_m32r2_u_exec (current_cpu, idesc, 0, referenced, in_sr, in_dr, out_dr);
2329 model_m32r2_st (SIM_CPU *current_cpu, void *sem_arg)
2331 #define FLD(f) abuf->fields.sfmt_st_plus.f
2332 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
2333 const IDESC * UNUSED idesc = abuf->idesc;
2337 int UNUSED insn_referenced = abuf->written;
2340 in_src1 = FLD (in_src1);
2341 in_src2 = FLD (in_src2);
2342 referenced |= 1 << 0;
2343 referenced |= 1 << 1;
2344 cycles += m32r2f_model_m32r2_u_store (current_cpu, idesc, 0, referenced, in_src1, in_src2);
2351 model_m32r2_st_d (SIM_CPU *current_cpu, void *sem_arg)
2353 #define FLD(f) abuf->fields.sfmt_st_d.f
2354 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
2355 const IDESC * UNUSED idesc = abuf->idesc;
2359 int UNUSED insn_referenced = abuf->written;
2362 in_src1 = FLD (in_src1);
2363 in_src2 = FLD (in_src2);
2364 referenced |= 1 << 0;
2365 referenced |= 1 << 1;
2366 cycles += m32r2f_model_m32r2_u_store (current_cpu, idesc, 0, referenced, in_src1, in_src2);
2373 model_m32r2_stb (SIM_CPU *current_cpu, void *sem_arg)
2375 #define FLD(f) abuf->fields.sfmt_st_plus.f
2376 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
2377 const IDESC * UNUSED idesc = abuf->idesc;
2381 int UNUSED insn_referenced = abuf->written;
2384 in_src1 = FLD (in_src1);
2385 in_src2 = FLD (in_src2);
2386 referenced |= 1 << 0;
2387 referenced |= 1 << 1;
2388 cycles += m32r2f_model_m32r2_u_store (current_cpu, idesc, 0, referenced, in_src1, in_src2);
2395 model_m32r2_stb_d (SIM_CPU *current_cpu, void *sem_arg)
2397 #define FLD(f) abuf->fields.sfmt_st_d.f
2398 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
2399 const IDESC * UNUSED idesc = abuf->idesc;
2403 int UNUSED insn_referenced = abuf->written;
2406 in_src1 = FLD (in_src1);
2407 in_src2 = FLD (in_src2);
2408 referenced |= 1 << 0;
2409 referenced |= 1 << 1;
2410 cycles += m32r2f_model_m32r2_u_store (current_cpu, idesc, 0, referenced, in_src1, in_src2);
2417 model_m32r2_sth (SIM_CPU *current_cpu, void *sem_arg)
2419 #define FLD(f) abuf->fields.sfmt_st_plus.f
2420 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
2421 const IDESC * UNUSED idesc = abuf->idesc;
2425 int UNUSED insn_referenced = abuf->written;
2428 in_src1 = FLD (in_src1);
2429 in_src2 = FLD (in_src2);
2430 referenced |= 1 << 0;
2431 referenced |= 1 << 1;
2432 cycles += m32r2f_model_m32r2_u_store (current_cpu, idesc, 0, referenced, in_src1, in_src2);
2439 model_m32r2_sth_d (SIM_CPU *current_cpu, void *sem_arg)
2441 #define FLD(f) abuf->fields.sfmt_st_d.f
2442 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
2443 const IDESC * UNUSED idesc = abuf->idesc;
2447 int UNUSED insn_referenced = abuf->written;
2450 in_src1 = FLD (in_src1);
2451 in_src2 = FLD (in_src2);
2452 referenced |= 1 << 0;
2453 referenced |= 1 << 1;
2454 cycles += m32r2f_model_m32r2_u_store (current_cpu, idesc, 0, referenced, in_src1, in_src2);
2461 model_m32r2_st_plus (SIM_CPU *current_cpu, void *sem_arg)
2463 #define FLD(f) abuf->fields.sfmt_st_plus.f
2464 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
2465 const IDESC * UNUSED idesc = abuf->idesc;
2469 int UNUSED insn_referenced = abuf->written;
2472 in_src1 = FLD (in_src1);
2473 in_src2 = FLD (in_src2);
2474 referenced |= 1 << 0;
2475 referenced |= 1 << 1;
2476 cycles += m32r2f_model_m32r2_u_store (current_cpu, idesc, 0, referenced, in_src1, in_src2);
2480 int UNUSED insn_referenced = abuf->written;
2484 in_dr = FLD (in_src2);
2485 out_dr = FLD (out_src2);
2486 cycles += m32r2f_model_m32r2_u_exec (current_cpu, idesc, 1, referenced, in_sr, in_dr, out_dr);
2493 model_m32r2_sth_plus (SIM_CPU *current_cpu, void *sem_arg)
2495 #define FLD(f) abuf->fields.sfmt_st_plus.f
2496 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
2497 const IDESC * UNUSED idesc = abuf->idesc;
2501 int UNUSED insn_referenced = abuf->written;
2504 in_src1 = FLD (in_src1);
2505 in_src2 = FLD (in_src2);
2506 referenced |= 1 << 0;
2507 referenced |= 1 << 1;
2508 cycles += m32r2f_model_m32r2_u_store (current_cpu, idesc, 0, referenced, in_src1, in_src2);
2512 int UNUSED insn_referenced = abuf->written;
2516 in_dr = FLD (in_src2);
2517 out_dr = FLD (out_src2);
2518 cycles += m32r2f_model_m32r2_u_exec (current_cpu, idesc, 1, referenced, in_sr, in_dr, out_dr);
2525 model_m32r2_stb_plus (SIM_CPU *current_cpu, void *sem_arg)
2527 #define FLD(f) abuf->fields.sfmt_st_plus.f
2528 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
2529 const IDESC * UNUSED idesc = abuf->idesc;
2533 int UNUSED insn_referenced = abuf->written;
2536 in_src1 = FLD (in_src1);
2537 in_src2 = FLD (in_src2);
2538 referenced |= 1 << 0;
2539 referenced |= 1 << 1;
2540 cycles += m32r2f_model_m32r2_u_store (current_cpu, idesc, 0, referenced, in_src1, in_src2);
2544 int UNUSED insn_referenced = abuf->written;
2548 in_dr = FLD (in_src2);
2549 out_dr = FLD (out_src2);
2550 cycles += m32r2f_model_m32r2_u_exec (current_cpu, idesc, 1, referenced, in_sr, in_dr, out_dr);
2557 model_m32r2_st_minus (SIM_CPU *current_cpu, void *sem_arg)
2559 #define FLD(f) abuf->fields.sfmt_st_plus.f
2560 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
2561 const IDESC * UNUSED idesc = abuf->idesc;
2565 int UNUSED insn_referenced = abuf->written;
2568 in_src1 = FLD (in_src1);
2569 in_src2 = FLD (in_src2);
2570 referenced |= 1 << 0;
2571 referenced |= 1 << 1;
2572 cycles += m32r2f_model_m32r2_u_store (current_cpu, idesc, 0, referenced, in_src1, in_src2);
2576 int UNUSED insn_referenced = abuf->written;
2580 in_dr = FLD (in_src2);
2581 out_dr = FLD (out_src2);
2582 cycles += m32r2f_model_m32r2_u_exec (current_cpu, idesc, 1, referenced, in_sr, in_dr, out_dr);
2589 model_m32r2_sub (SIM_CPU *current_cpu, void *sem_arg)
2591 #define FLD(f) abuf->fields.sfmt_add.f
2592 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
2593 const IDESC * UNUSED idesc = abuf->idesc;
2597 int UNUSED insn_referenced = abuf->written;
2601 in_sr = FLD (in_sr);
2602 in_dr = FLD (in_dr);
2603 out_dr = FLD (out_dr);
2604 referenced |= 1 << 0;
2605 referenced |= 1 << 1;
2606 referenced |= 1 << 2;
2607 cycles += m32r2f_model_m32r2_u_exec (current_cpu, idesc, 0, referenced, in_sr, in_dr, out_dr);
2614 model_m32r2_subv (SIM_CPU *current_cpu, void *sem_arg)
2616 #define FLD(f) abuf->fields.sfmt_add.f
2617 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
2618 const IDESC * UNUSED idesc = abuf->idesc;
2622 int UNUSED insn_referenced = abuf->written;
2626 in_sr = FLD (in_sr);
2627 in_dr = FLD (in_dr);
2628 out_dr = FLD (out_dr);
2629 referenced |= 1 << 0;
2630 referenced |= 1 << 1;
2631 referenced |= 1 << 2;
2632 cycles += m32r2f_model_m32r2_u_exec (current_cpu, idesc, 0, referenced, in_sr, in_dr, out_dr);
2639 model_m32r2_subx (SIM_CPU *current_cpu, void *sem_arg)
2641 #define FLD(f) abuf->fields.sfmt_add.f
2642 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
2643 const IDESC * UNUSED idesc = abuf->idesc;
2647 int UNUSED insn_referenced = abuf->written;
2651 in_sr = FLD (in_sr);
2652 in_dr = FLD (in_dr);
2653 out_dr = FLD (out_dr);
2654 referenced |= 1 << 0;
2655 referenced |= 1 << 1;
2656 referenced |= 1 << 2;
2657 cycles += m32r2f_model_m32r2_u_exec (current_cpu, idesc, 0, referenced, in_sr, in_dr, out_dr);
2664 model_m32r2_trap (SIM_CPU *current_cpu, void *sem_arg)
2666 #define FLD(f) abuf->fields.sfmt_trap.f
2667 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
2668 const IDESC * UNUSED idesc = abuf->idesc;
2672 int UNUSED insn_referenced = abuf->written;
2676 cycles += m32r2f_model_m32r2_u_exec (current_cpu, idesc, 0, referenced, in_sr, in_dr, out_dr);
2683 model_m32r2_unlock (SIM_CPU *current_cpu, void *sem_arg)
2685 #define FLD(f) abuf->fields.sfmt_st_plus.f
2686 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
2687 const IDESC * UNUSED idesc = abuf->idesc;
2691 int UNUSED insn_referenced = abuf->written;
2694 cycles += m32r2f_model_m32r2_u_load (current_cpu, idesc, 0, referenced, in_sr, out_dr);
2701 model_m32r2_satb (SIM_CPU *current_cpu, void *sem_arg)
2703 #define FLD(f) abuf->fields.sfmt_ld_plus.f
2704 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
2705 const IDESC * UNUSED idesc = abuf->idesc;
2709 int UNUSED insn_referenced = abuf->written;
2713 in_sr = FLD (in_sr);
2714 out_dr = FLD (out_dr);
2715 referenced |= 1 << 0;
2716 referenced |= 1 << 2;
2717 cycles += m32r2f_model_m32r2_u_exec (current_cpu, idesc, 0, referenced, in_sr, in_dr, out_dr);
2724 model_m32r2_sath (SIM_CPU *current_cpu, void *sem_arg)
2726 #define FLD(f) abuf->fields.sfmt_ld_plus.f
2727 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
2728 const IDESC * UNUSED idesc = abuf->idesc;
2732 int UNUSED insn_referenced = abuf->written;
2736 in_sr = FLD (in_sr);
2737 out_dr = FLD (out_dr);
2738 referenced |= 1 << 0;
2739 referenced |= 1 << 2;
2740 cycles += m32r2f_model_m32r2_u_exec (current_cpu, idesc, 0, referenced, in_sr, in_dr, out_dr);
2747 model_m32r2_sat (SIM_CPU *current_cpu, void *sem_arg)
2749 #define FLD(f) abuf->fields.sfmt_ld_plus.f
2750 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
2751 const IDESC * UNUSED idesc = abuf->idesc;
2755 int UNUSED insn_referenced = abuf->written;
2759 in_sr = FLD (in_sr);
2760 out_dr = FLD (out_dr);
2761 if (insn_referenced & (1 << 1)) referenced |= 1 << 0;
2762 referenced |= 1 << 2;
2763 cycles += m32r2f_model_m32r2_u_exec (current_cpu, idesc, 0, referenced, in_sr, in_dr, out_dr);
2770 model_m32r2_pcmpbz (SIM_CPU *current_cpu, void *sem_arg)
2772 #define FLD(f) abuf->fields.sfmt_st_plus.f
2773 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
2774 const IDESC * UNUSED idesc = abuf->idesc;
2778 int UNUSED insn_referenced = abuf->written;
2781 in_src2 = FLD (in_src2);
2782 referenced |= 1 << 1;
2783 cycles += m32r2f_model_m32r2_u_cmp (current_cpu, idesc, 0, referenced, in_src1, in_src2);
2790 model_m32r2_sadd (SIM_CPU *current_cpu, void *sem_arg)
2792 #define FLD(f) abuf->fields.sfmt_empty.f
2793 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
2794 const IDESC * UNUSED idesc = abuf->idesc;
2798 int UNUSED insn_referenced = abuf->written;
2801 cycles += m32r2f_model_m32r2_u_mac (current_cpu, idesc, 0, referenced, in_src1, in_src2);
2808 model_m32r2_macwu1 (SIM_CPU *current_cpu, void *sem_arg)
2810 #define FLD(f) abuf->fields.sfmt_st_plus.f
2811 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
2812 const IDESC * UNUSED idesc = abuf->idesc;
2816 int UNUSED insn_referenced = abuf->written;
2819 in_src1 = FLD (in_src1);
2820 in_src2 = FLD (in_src2);
2821 referenced |= 1 << 0;
2822 referenced |= 1 << 1;
2823 cycles += m32r2f_model_m32r2_u_mac (current_cpu, idesc, 0, referenced, in_src1, in_src2);
2830 model_m32r2_msblo (SIM_CPU *current_cpu, void *sem_arg)
2832 #define FLD(f) abuf->fields.sfmt_st_plus.f
2833 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
2834 const IDESC * UNUSED idesc = abuf->idesc;
2838 int UNUSED insn_referenced = abuf->written;
2841 in_src1 = FLD (in_src1);
2842 in_src2 = FLD (in_src2);
2843 referenced |= 1 << 0;
2844 referenced |= 1 << 1;
2845 cycles += m32r2f_model_m32r2_u_mac (current_cpu, idesc, 0, referenced, in_src1, in_src2);
2852 model_m32r2_mulwu1 (SIM_CPU *current_cpu, void *sem_arg)
2854 #define FLD(f) abuf->fields.sfmt_st_plus.f
2855 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
2856 const IDESC * UNUSED idesc = abuf->idesc;
2860 int UNUSED insn_referenced = abuf->written;
2863 in_src1 = FLD (in_src1);
2864 in_src2 = FLD (in_src2);
2865 referenced |= 1 << 0;
2866 referenced |= 1 << 1;
2867 cycles += m32r2f_model_m32r2_u_mac (current_cpu, idesc, 0, referenced, in_src1, in_src2);
2874 model_m32r2_maclh1 (SIM_CPU *current_cpu, void *sem_arg)
2876 #define FLD(f) abuf->fields.sfmt_st_plus.f
2877 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
2878 const IDESC * UNUSED idesc = abuf->idesc;
2882 int UNUSED insn_referenced = abuf->written;
2885 in_src1 = FLD (in_src1);
2886 in_src2 = FLD (in_src2);
2887 referenced |= 1 << 0;
2888 referenced |= 1 << 1;
2889 cycles += m32r2f_model_m32r2_u_mac (current_cpu, idesc, 0, referenced, in_src1, in_src2);
2896 model_m32r2_sc (SIM_CPU *current_cpu, void *sem_arg)
2898 #define FLD(f) abuf->fields.sfmt_empty.f
2899 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
2900 const IDESC * UNUSED idesc = abuf->idesc;
2904 int UNUSED insn_referenced = abuf->written;
2908 cycles += m32r2f_model_m32r2_u_exec (current_cpu, idesc, 0, referenced, in_sr, in_dr, out_dr);
2915 model_m32r2_snc (SIM_CPU *current_cpu, void *sem_arg)
2917 #define FLD(f) abuf->fields.sfmt_empty.f
2918 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
2919 const IDESC * UNUSED idesc = abuf->idesc;
2923 int UNUSED insn_referenced = abuf->written;
2927 cycles += m32r2f_model_m32r2_u_exec (current_cpu, idesc, 0, referenced, in_sr, in_dr, out_dr);
2934 model_m32r2_clrpsw (SIM_CPU *current_cpu, void *sem_arg)
2936 #define FLD(f) abuf->fields.sfmt_clrpsw.f
2937 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
2938 const IDESC * UNUSED idesc = abuf->idesc;
2942 int UNUSED insn_referenced = abuf->written;
2946 cycles += m32r2f_model_m32r2_u_exec (current_cpu, idesc, 0, referenced, in_sr, in_dr, out_dr);
2953 model_m32r2_setpsw (SIM_CPU *current_cpu, void *sem_arg)
2955 #define FLD(f) abuf->fields.sfmt_clrpsw.f
2956 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
2957 const IDESC * UNUSED idesc = abuf->idesc;
2961 int UNUSED insn_referenced = abuf->written;
2965 cycles += m32r2f_model_m32r2_u_exec (current_cpu, idesc, 0, referenced, in_sr, in_dr, out_dr);
2972 model_m32r2_bset (SIM_CPU *current_cpu, void *sem_arg)
2974 #define FLD(f) abuf->fields.sfmt_bset.f
2975 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
2976 const IDESC * UNUSED idesc = abuf->idesc;
2980 int UNUSED insn_referenced = abuf->written;
2984 in_sr = FLD (in_sr);
2985 referenced |= 1 << 0;
2986 cycles += m32r2f_model_m32r2_u_exec (current_cpu, idesc, 0, referenced, in_sr, in_dr, out_dr);
2993 model_m32r2_bclr (SIM_CPU *current_cpu, void *sem_arg)
2995 #define FLD(f) abuf->fields.sfmt_bset.f
2996 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
2997 const IDESC * UNUSED idesc = abuf->idesc;
3001 int UNUSED insn_referenced = abuf->written;
3005 in_sr = FLD (in_sr);
3006 referenced |= 1 << 0;
3007 cycles += m32r2f_model_m32r2_u_exec (current_cpu, idesc, 0, referenced, in_sr, in_dr, out_dr);
3014 model_m32r2_btst (SIM_CPU *current_cpu, void *sem_arg)
3016 #define FLD(f) abuf->fields.sfmt_bset.f
3017 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
3018 const IDESC * UNUSED idesc = abuf->idesc;
3022 int UNUSED insn_referenced = abuf->written;
3026 in_sr = FLD (in_sr);
3027 referenced |= 1 << 0;
3028 cycles += m32r2f_model_m32r2_u_exec (current_cpu, idesc, 0, referenced, in_sr, in_dr, out_dr);
3034 /* We assume UNIT_NONE == 0 because the tables don't always terminate
3037 /* Model timing data for `m32r2'. */
3039 static const INSN_TIMING m32r2_timing[] = {
3040 { M32R2F_INSN_X_INVALID, 0, { { (int) UNIT_M32R2_U_EXEC, 1, 1 } } },
3041 { M32R2F_INSN_X_AFTER, 0, { { (int) UNIT_M32R2_U_EXEC, 1, 1 } } },
3042 { M32R2F_INSN_X_BEFORE, 0, { { (int) UNIT_M32R2_U_EXEC, 1, 1 } } },
3043 { M32R2F_INSN_X_CTI_CHAIN, 0, { { (int) UNIT_M32R2_U_EXEC, 1, 1 } } },
3044 { M32R2F_INSN_X_CHAIN, 0, { { (int) UNIT_M32R2_U_EXEC, 1, 1 } } },
3045 { M32R2F_INSN_X_BEGIN, 0, { { (int) UNIT_M32R2_U_EXEC, 1, 1 } } },
3046 { M32R2F_INSN_ADD, model_m32r2_add, { { (int) UNIT_M32R2_U_EXEC, 1, 1 } } },
3047 { M32R2F_INSN_ADD3, model_m32r2_add3, { { (int) UNIT_M32R2_U_EXEC, 1, 1 } } },
3048 { M32R2F_INSN_AND, model_m32r2_and, { { (int) UNIT_M32R2_U_EXEC, 1, 1 } } },
3049 { M32R2F_INSN_AND3, model_m32r2_and3, { { (int) UNIT_M32R2_U_EXEC, 1, 1 } } },
3050 { M32R2F_INSN_OR, model_m32r2_or, { { (int) UNIT_M32R2_U_EXEC, 1, 1 } } },
3051 { M32R2F_INSN_OR3, model_m32r2_or3, { { (int) UNIT_M32R2_U_EXEC, 1, 1 } } },
3052 { M32R2F_INSN_XOR, model_m32r2_xor, { { (int) UNIT_M32R2_U_EXEC, 1, 1 } } },
3053 { M32R2F_INSN_XOR3, model_m32r2_xor3, { { (int) UNIT_M32R2_U_EXEC, 1, 1 } } },
3054 { M32R2F_INSN_ADDI, model_m32r2_addi, { { (int) UNIT_M32R2_U_EXEC, 1, 1 } } },
3055 { M32R2F_INSN_ADDV, model_m32r2_addv, { { (int) UNIT_M32R2_U_EXEC, 1, 1 } } },
3056 { M32R2F_INSN_ADDV3, model_m32r2_addv3, { { (int) UNIT_M32R2_U_EXEC, 1, 1 } } },
3057 { M32R2F_INSN_ADDX, model_m32r2_addx, { { (int) UNIT_M32R2_U_EXEC, 1, 1 } } },
3058 { M32R2F_INSN_BC8, model_m32r2_bc8, { { (int) UNIT_M32R2_U_CTI, 1, 1 } } },
3059 { M32R2F_INSN_BC24, model_m32r2_bc24, { { (int) UNIT_M32R2_U_CTI, 1, 1 } } },
3060 { M32R2F_INSN_BEQ, model_m32r2_beq, { { (int) UNIT_M32R2_U_CTI, 1, 1 }, { (int) UNIT_M32R2_U_CMP, 1, 0 } } },
3061 { M32R2F_INSN_BEQZ, model_m32r2_beqz, { { (int) UNIT_M32R2_U_CTI, 1, 1 }, { (int) UNIT_M32R2_U_CMP, 1, 0 } } },
3062 { M32R2F_INSN_BGEZ, model_m32r2_bgez, { { (int) UNIT_M32R2_U_CTI, 1, 1 }, { (int) UNIT_M32R2_U_CMP, 1, 0 } } },
3063 { M32R2F_INSN_BGTZ, model_m32r2_bgtz, { { (int) UNIT_M32R2_U_CTI, 1, 1 }, { (int) UNIT_M32R2_U_CMP, 1, 0 } } },
3064 { M32R2F_INSN_BLEZ, model_m32r2_blez, { { (int) UNIT_M32R2_U_CTI, 1, 1 }, { (int) UNIT_M32R2_U_CMP, 1, 0 } } },
3065 { M32R2F_INSN_BLTZ, model_m32r2_bltz, { { (int) UNIT_M32R2_U_CTI, 1, 1 }, { (int) UNIT_M32R2_U_CMP, 1, 0 } } },
3066 { M32R2F_INSN_BNEZ, model_m32r2_bnez, { { (int) UNIT_M32R2_U_CTI, 1, 1 }, { (int) UNIT_M32R2_U_CMP, 1, 0 } } },
3067 { M32R2F_INSN_BL8, model_m32r2_bl8, { { (int) UNIT_M32R2_U_CTI, 1, 1 } } },
3068 { M32R2F_INSN_BL24, model_m32r2_bl24, { { (int) UNIT_M32R2_U_CTI, 1, 1 } } },
3069 { M32R2F_INSN_BCL8, model_m32r2_bcl8, { { (int) UNIT_M32R2_U_CTI, 1, 1 } } },
3070 { M32R2F_INSN_BCL24, model_m32r2_bcl24, { { (int) UNIT_M32R2_U_CTI, 1, 1 } } },
3071 { M32R2F_INSN_BNC8, model_m32r2_bnc8, { { (int) UNIT_M32R2_U_CTI, 1, 1 } } },
3072 { M32R2F_INSN_BNC24, model_m32r2_bnc24, { { (int) UNIT_M32R2_U_CTI, 1, 1 } } },
3073 { M32R2F_INSN_BNE, model_m32r2_bne, { { (int) UNIT_M32R2_U_CTI, 1, 1 }, { (int) UNIT_M32R2_U_CMP, 1, 0 } } },
3074 { M32R2F_INSN_BRA8, model_m32r2_bra8, { { (int) UNIT_M32R2_U_CTI, 1, 1 } } },
3075 { M32R2F_INSN_BRA24, model_m32r2_bra24, { { (int) UNIT_M32R2_U_CTI, 1, 1 } } },
3076 { M32R2F_INSN_BNCL8, model_m32r2_bncl8, { { (int) UNIT_M32R2_U_CTI, 1, 1 } } },
3077 { M32R2F_INSN_BNCL24, model_m32r2_bncl24, { { (int) UNIT_M32R2_U_CTI, 1, 1 } } },
3078 { M32R2F_INSN_CMP, model_m32r2_cmp, { { (int) UNIT_M32R2_U_CMP, 1, 1 } } },
3079 { M32R2F_INSN_CMPI, model_m32r2_cmpi, { { (int) UNIT_M32R2_U_CMP, 1, 1 } } },
3080 { M32R2F_INSN_CMPU, model_m32r2_cmpu, { { (int) UNIT_M32R2_U_CMP, 1, 1 } } },
3081 { M32R2F_INSN_CMPUI, model_m32r2_cmpui, { { (int) UNIT_M32R2_U_CMP, 1, 1 } } },
3082 { M32R2F_INSN_CMPEQ, model_m32r2_cmpeq, { { (int) UNIT_M32R2_U_CMP, 1, 1 } } },
3083 { M32R2F_INSN_CMPZ, model_m32r2_cmpz, { { (int) UNIT_M32R2_U_CMP, 1, 1 } } },
3084 { M32R2F_INSN_DIV, model_m32r2_div, { { (int) UNIT_M32R2_U_EXEC, 1, 37 } } },
3085 { M32R2F_INSN_DIVU, model_m32r2_divu, { { (int) UNIT_M32R2_U_EXEC, 1, 37 } } },
3086 { M32R2F_INSN_REM, model_m32r2_rem, { { (int) UNIT_M32R2_U_EXEC, 1, 37 } } },
3087 { M32R2F_INSN_REMU, model_m32r2_remu, { { (int) UNIT_M32R2_U_EXEC, 1, 37 } } },
3088 { M32R2F_INSN_REMH, model_m32r2_remh, { { (int) UNIT_M32R2_U_EXEC, 1, 21 } } },
3089 { M32R2F_INSN_REMUH, model_m32r2_remuh, { { (int) UNIT_M32R2_U_EXEC, 1, 21 } } },
3090 { M32R2F_INSN_REMB, model_m32r2_remb, { { (int) UNIT_M32R2_U_EXEC, 1, 21 } } },
3091 { M32R2F_INSN_REMUB, model_m32r2_remub, { { (int) UNIT_M32R2_U_EXEC, 1, 21 } } },
3092 { M32R2F_INSN_DIVUH, model_m32r2_divuh, { { (int) UNIT_M32R2_U_EXEC, 1, 21 } } },
3093 { M32R2F_INSN_DIVB, model_m32r2_divb, { { (int) UNIT_M32R2_U_EXEC, 1, 21 } } },
3094 { M32R2F_INSN_DIVUB, model_m32r2_divub, { { (int) UNIT_M32R2_U_EXEC, 1, 21 } } },
3095 { M32R2F_INSN_DIVH, model_m32r2_divh, { { (int) UNIT_M32R2_U_EXEC, 1, 21 } } },
3096 { M32R2F_INSN_JC, model_m32r2_jc, { { (int) UNIT_M32R2_U_CTI, 1, 1 } } },
3097 { M32R2F_INSN_JNC, model_m32r2_jnc, { { (int) UNIT_M32R2_U_CTI, 1, 1 } } },
3098 { M32R2F_INSN_JL, model_m32r2_jl, { { (int) UNIT_M32R2_U_CTI, 1, 1 } } },
3099 { M32R2F_INSN_JMP, model_m32r2_jmp, { { (int) UNIT_M32R2_U_CTI, 1, 1 } } },
3100 { M32R2F_INSN_LD, model_m32r2_ld, { { (int) UNIT_M32R2_U_LOAD, 1, 1 } } },
3101 { M32R2F_INSN_LD_D, model_m32r2_ld_d, { { (int) UNIT_M32R2_U_LOAD, 1, 2 } } },
3102 { M32R2F_INSN_LDB, model_m32r2_ldb, { { (int) UNIT_M32R2_U_LOAD, 1, 1 } } },
3103 { M32R2F_INSN_LDB_D, model_m32r2_ldb_d, { { (int) UNIT_M32R2_U_LOAD, 1, 2 } } },
3104 { M32R2F_INSN_LDH, model_m32r2_ldh, { { (int) UNIT_M32R2_U_LOAD, 1, 1 } } },
3105 { M32R2F_INSN_LDH_D, model_m32r2_ldh_d, { { (int) UNIT_M32R2_U_LOAD, 1, 2 } } },
3106 { M32R2F_INSN_LDUB, model_m32r2_ldub, { { (int) UNIT_M32R2_U_LOAD, 1, 1 } } },
3107 { M32R2F_INSN_LDUB_D, model_m32r2_ldub_d, { { (int) UNIT_M32R2_U_LOAD, 1, 2 } } },
3108 { M32R2F_INSN_LDUH, model_m32r2_lduh, { { (int) UNIT_M32R2_U_LOAD, 1, 1 } } },
3109 { M32R2F_INSN_LDUH_D, model_m32r2_lduh_d, { { (int) UNIT_M32R2_U_LOAD, 1, 2 } } },
3110 { M32R2F_INSN_LD_PLUS, model_m32r2_ld_plus, { { (int) UNIT_M32R2_U_LOAD, 1, 1 }, { (int) UNIT_M32R2_U_EXEC, 1, 0 } } },
3111 { M32R2F_INSN_LD24, model_m32r2_ld24, { { (int) UNIT_M32R2_U_EXEC, 1, 1 } } },
3112 { M32R2F_INSN_LDI8, model_m32r2_ldi8, { { (int) UNIT_M32R2_U_EXEC, 1, 1 } } },
3113 { M32R2F_INSN_LDI16, model_m32r2_ldi16, { { (int) UNIT_M32R2_U_EXEC, 1, 1 } } },
3114 { M32R2F_INSN_LOCK, model_m32r2_lock, { { (int) UNIT_M32R2_U_LOAD, 1, 1 } } },
3115 { M32R2F_INSN_MACHI_A, model_m32r2_machi_a, { { (int) UNIT_M32R2_U_MAC, 1, 1 } } },
3116 { M32R2F_INSN_MACLO_A, model_m32r2_maclo_a, { { (int) UNIT_M32R2_U_MAC, 1, 1 } } },
3117 { M32R2F_INSN_MACWHI_A, model_m32r2_macwhi_a, { { (int) UNIT_M32R2_U_MAC, 1, 1 } } },
3118 { M32R2F_INSN_MACWLO_A, model_m32r2_macwlo_a, { { (int) UNIT_M32R2_U_MAC, 1, 1 } } },
3119 { M32R2F_INSN_MUL, model_m32r2_mul, { { (int) UNIT_M32R2_U_EXEC, 1, 4 } } },
3120 { M32R2F_INSN_MULHI_A, model_m32r2_mulhi_a, { { (int) UNIT_M32R2_U_MAC, 1, 1 } } },
3121 { M32R2F_INSN_MULLO_A, model_m32r2_mullo_a, { { (int) UNIT_M32R2_U_MAC, 1, 1 } } },
3122 { M32R2F_INSN_MULWHI_A, model_m32r2_mulwhi_a, { { (int) UNIT_M32R2_U_MAC, 1, 1 } } },
3123 { M32R2F_INSN_MULWLO_A, model_m32r2_mulwlo_a, { { (int) UNIT_M32R2_U_MAC, 1, 1 } } },
3124 { M32R2F_INSN_MV, model_m32r2_mv, { { (int) UNIT_M32R2_U_EXEC, 1, 1 } } },
3125 { M32R2F_INSN_MVFACHI_A, model_m32r2_mvfachi_a, { { (int) UNIT_M32R2_U_EXEC, 1, 2 } } },
3126 { M32R2F_INSN_MVFACLO_A, model_m32r2_mvfaclo_a, { { (int) UNIT_M32R2_U_EXEC, 1, 2 } } },
3127 { M32R2F_INSN_MVFACMI_A, model_m32r2_mvfacmi_a, { { (int) UNIT_M32R2_U_EXEC, 1, 2 } } },
3128 { M32R2F_INSN_MVFC, model_m32r2_mvfc, { { (int) UNIT_M32R2_U_EXEC, 1, 1 } } },
3129 { M32R2F_INSN_MVTACHI_A, model_m32r2_mvtachi_a, { { (int) UNIT_M32R2_U_EXEC, 1, 1 } } },
3130 { M32R2F_INSN_MVTACLO_A, model_m32r2_mvtaclo_a, { { (int) UNIT_M32R2_U_EXEC, 1, 1 } } },
3131 { M32R2F_INSN_MVTC, model_m32r2_mvtc, { { (int) UNIT_M32R2_U_EXEC, 1, 1 } } },
3132 { M32R2F_INSN_NEG, model_m32r2_neg, { { (int) UNIT_M32R2_U_EXEC, 1, 1 } } },
3133 { M32R2F_INSN_NOP, model_m32r2_nop, { { (int) UNIT_M32R2_U_EXEC, 1, 0 } } },
3134 { M32R2F_INSN_NOT, model_m32r2_not, { { (int) UNIT_M32R2_U_EXEC, 1, 1 } } },
3135 { M32R2F_INSN_RAC_DSI, model_m32r2_rac_dsi, { { (int) UNIT_M32R2_U_MAC, 1, 1 } } },
3136 { M32R2F_INSN_RACH_DSI, model_m32r2_rach_dsi, { { (int) UNIT_M32R2_U_MAC, 1, 1 } } },
3137 { M32R2F_INSN_RTE, model_m32r2_rte, { { (int) UNIT_M32R2_U_EXEC, 1, 1 } } },
3138 { M32R2F_INSN_SETH, model_m32r2_seth, { { (int) UNIT_M32R2_U_EXEC, 1, 1 } } },
3139 { M32R2F_INSN_SLL, model_m32r2_sll, { { (int) UNIT_M32R2_U_EXEC, 1, 1 } } },
3140 { M32R2F_INSN_SLL3, model_m32r2_sll3, { { (int) UNIT_M32R2_U_EXEC, 1, 1 } } },
3141 { M32R2F_INSN_SLLI, model_m32r2_slli, { { (int) UNIT_M32R2_U_EXEC, 1, 1 } } },
3142 { M32R2F_INSN_SRA, model_m32r2_sra, { { (int) UNIT_M32R2_U_EXEC, 1, 1 } } },
3143 { M32R2F_INSN_SRA3, model_m32r2_sra3, { { (int) UNIT_M32R2_U_EXEC, 1, 1 } } },
3144 { M32R2F_INSN_SRAI, model_m32r2_srai, { { (int) UNIT_M32R2_U_EXEC, 1, 1 } } },
3145 { M32R2F_INSN_SRL, model_m32r2_srl, { { (int) UNIT_M32R2_U_EXEC, 1, 1 } } },
3146 { M32R2F_INSN_SRL3, model_m32r2_srl3, { { (int) UNIT_M32R2_U_EXEC, 1, 1 } } },
3147 { M32R2F_INSN_SRLI, model_m32r2_srli, { { (int) UNIT_M32R2_U_EXEC, 1, 1 } } },
3148 { M32R2F_INSN_ST, model_m32r2_st, { { (int) UNIT_M32R2_U_STORE, 1, 1 } } },
3149 { M32R2F_INSN_ST_D, model_m32r2_st_d, { { (int) UNIT_M32R2_U_STORE, 1, 2 } } },
3150 { M32R2F_INSN_STB, model_m32r2_stb, { { (int) UNIT_M32R2_U_STORE, 1, 1 } } },
3151 { M32R2F_INSN_STB_D, model_m32r2_stb_d, { { (int) UNIT_M32R2_U_STORE, 1, 2 } } },
3152 { M32R2F_INSN_STH, model_m32r2_sth, { { (int) UNIT_M32R2_U_STORE, 1, 1 } } },
3153 { M32R2F_INSN_STH_D, model_m32r2_sth_d, { { (int) UNIT_M32R2_U_STORE, 1, 2 } } },
3154 { M32R2F_INSN_ST_PLUS, model_m32r2_st_plus, { { (int) UNIT_M32R2_U_STORE, 1, 1 }, { (int) UNIT_M32R2_U_EXEC, 1, 0 } } },
3155 { M32R2F_INSN_STH_PLUS, model_m32r2_sth_plus, { { (int) UNIT_M32R2_U_STORE, 1, 1 }, { (int) UNIT_M32R2_U_EXEC, 1, 0 } } },
3156 { M32R2F_INSN_STB_PLUS, model_m32r2_stb_plus, { { (int) UNIT_M32R2_U_STORE, 1, 1 }, { (int) UNIT_M32R2_U_EXEC, 1, 0 } } },
3157 { M32R2F_INSN_ST_MINUS, model_m32r2_st_minus, { { (int) UNIT_M32R2_U_STORE, 1, 1 }, { (int) UNIT_M32R2_U_EXEC, 1, 0 } } },
3158 { M32R2F_INSN_SUB, model_m32r2_sub, { { (int) UNIT_M32R2_U_EXEC, 1, 1 } } },
3159 { M32R2F_INSN_SUBV, model_m32r2_subv, { { (int) UNIT_M32R2_U_EXEC, 1, 1 } } },
3160 { M32R2F_INSN_SUBX, model_m32r2_subx, { { (int) UNIT_M32R2_U_EXEC, 1, 1 } } },
3161 { M32R2F_INSN_TRAP, model_m32r2_trap, { { (int) UNIT_M32R2_U_EXEC, 1, 1 } } },
3162 { M32R2F_INSN_UNLOCK, model_m32r2_unlock, { { (int) UNIT_M32R2_U_LOAD, 1, 1 } } },
3163 { M32R2F_INSN_SATB, model_m32r2_satb, { { (int) UNIT_M32R2_U_EXEC, 1, 1 } } },
3164 { M32R2F_INSN_SATH, model_m32r2_sath, { { (int) UNIT_M32R2_U_EXEC, 1, 1 } } },
3165 { M32R2F_INSN_SAT, model_m32r2_sat, { { (int) UNIT_M32R2_U_EXEC, 1, 1 } } },
3166 { M32R2F_INSN_PCMPBZ, model_m32r2_pcmpbz, { { (int) UNIT_M32R2_U_CMP, 1, 1 } } },
3167 { M32R2F_INSN_SADD, model_m32r2_sadd, { { (int) UNIT_M32R2_U_MAC, 1, 1 } } },
3168 { M32R2F_INSN_MACWU1, model_m32r2_macwu1, { { (int) UNIT_M32R2_U_MAC, 1, 1 } } },
3169 { M32R2F_INSN_MSBLO, model_m32r2_msblo, { { (int) UNIT_M32R2_U_MAC, 1, 1 } } },
3170 { M32R2F_INSN_MULWU1, model_m32r2_mulwu1, { { (int) UNIT_M32R2_U_MAC, 1, 1 } } },
3171 { M32R2F_INSN_MACLH1, model_m32r2_maclh1, { { (int) UNIT_M32R2_U_MAC, 1, 1 } } },
3172 { M32R2F_INSN_SC, model_m32r2_sc, { { (int) UNIT_M32R2_U_EXEC, 1, 1 } } },
3173 { M32R2F_INSN_SNC, model_m32r2_snc, { { (int) UNIT_M32R2_U_EXEC, 1, 1 } } },
3174 { M32R2F_INSN_CLRPSW, model_m32r2_clrpsw, { { (int) UNIT_M32R2_U_EXEC, 1, 1 } } },
3175 { M32R2F_INSN_SETPSW, model_m32r2_setpsw, { { (int) UNIT_M32R2_U_EXEC, 1, 1 } } },
3176 { M32R2F_INSN_BSET, model_m32r2_bset, { { (int) UNIT_M32R2_U_EXEC, 1, 1 } } },
3177 { M32R2F_INSN_BCLR, model_m32r2_bclr, { { (int) UNIT_M32R2_U_EXEC, 1, 1 } } },
3178 { M32R2F_INSN_BTST, model_m32r2_btst, { { (int) UNIT_M32R2_U_EXEC, 1, 1 } } },
3181 #endif /* WITH_PROFILE_MODEL_P */
3184 m32r2_model_init (SIM_CPU *cpu)
3186 CPU_MODEL_DATA (cpu) = (void *) zalloc (sizeof (MODEL_M32R2_DATA));
3189 #if WITH_PROFILE_MODEL_P
3190 #define TIMING_DATA(td) td
3192 #define TIMING_DATA(td) 0
3195 static const SIM_MODEL m32r2_models[] =
3197 { "m32r2", & m32r2_mach, MODEL_M32R2, TIMING_DATA (& m32r2_timing[0]), m32r2_model_init },
3201 /* The properties of this cpu's implementation. */
3203 static const SIM_MACH_IMP_PROPERTIES m32r2f_imp_properties =
3215 m32r2f_prepare_run (SIM_CPU *cpu)
3217 if (CPU_IDESC (cpu) == NULL)
3218 m32r2f_init_idesc_table (cpu);
3221 static const CGEN_INSN *
3222 m32r2f_get_idata (SIM_CPU *cpu, int inum)
3224 return CPU_IDESC (cpu) [inum].idata;
3228 m32r2_init_cpu (SIM_CPU *cpu)
3230 CPU_REG_FETCH (cpu) = m32r2f_fetch_register;
3231 CPU_REG_STORE (cpu) = m32r2f_store_register;
3232 CPU_PC_FETCH (cpu) = m32r2f_h_pc_get;
3233 CPU_PC_STORE (cpu) = m32r2f_h_pc_set;
3234 CPU_GET_IDATA (cpu) = m32r2f_get_idata;
3235 CPU_MAX_INSNS (cpu) = M32R2F_INSN__MAX;
3236 CPU_INSN_NAME (cpu) = cgen_insn_name;
3237 CPU_FULL_ENGINE_FN (cpu) = m32r2f_engine_run_full;
3239 CPU_FAST_ENGINE_FN (cpu) = m32r2f_engine_run_fast;
3241 CPU_FAST_ENGINE_FN (cpu) = m32r2f_engine_run_full;
3245 const SIM_MACH m32r2_mach =
3247 "m32r2", "m32r2", MACH_M32R2,
3248 32, 32, & m32r2_models[0], & m32r2f_imp_properties,