1 /* Simulator instruction decoder for m32rbf.
3 THIS FILE IS MACHINE GENERATED WITH CGEN.
5 Copyright (C) 1996, 1997, 1998, 1999 Free Software Foundation, Inc.
7 This file is part of the GNU Simulators.
9 This program is free software; you can redistribute it and/or modify
10 it under the terms of the GNU General Public License as published by
11 the Free Software Foundation; either version 2, or (at your option)
14 This program is distributed in the hope that it will be useful,
15 but WITHOUT ANY WARRANTY; without even the implied warranty of
16 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 GNU General Public License for more details.
19 You should have received a copy of the GNU General Public License along
20 with this program; if not, write to the Free Software Foundation, Inc.,
21 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
25 #define WANT_CPU m32rbf
26 #define WANT_CPU_M32RBF
29 #include "sim-assert.h"
31 /* The instruction descriptor array.
32 This is computed at runtime. Space for it is not malloc'd to save a
33 teensy bit of cpu in the decoder. Moving it to malloc space is trivial
34 but won't be done until necessary (we don't currently support the runtime
35 addition of instructions nor an SMP machine with different cpus). */
36 static IDESC m32rbf_insn_data[M32RBF_INSN_MAX];
38 /* Commas between elements are contained in the macros.
39 Some of these are conditionally compiled out. */
41 static const struct insn_sem m32rbf_insn_sem[] =
43 { VIRTUAL_INSN_X_INVALID, M32RBF_INSN_X_INVALID, M32RBF_SFMT_EMPTY },
44 { VIRTUAL_INSN_X_AFTER, M32RBF_INSN_X_AFTER, M32RBF_SFMT_EMPTY },
45 { VIRTUAL_INSN_X_BEFORE, M32RBF_INSN_X_BEFORE, M32RBF_SFMT_EMPTY },
46 { VIRTUAL_INSN_X_CTI_CHAIN, M32RBF_INSN_X_CTI_CHAIN, M32RBF_SFMT_EMPTY },
47 { VIRTUAL_INSN_X_CHAIN, M32RBF_INSN_X_CHAIN, M32RBF_SFMT_EMPTY },
48 { VIRTUAL_INSN_X_BEGIN, M32RBF_INSN_X_BEGIN, M32RBF_SFMT_EMPTY },
49 { M32R_INSN_ADD, M32RBF_INSN_ADD, M32RBF_SFMT_ADD },
50 { M32R_INSN_ADD3, M32RBF_INSN_ADD3, M32RBF_SFMT_ADD3 },
51 { M32R_INSN_AND, M32RBF_INSN_AND, M32RBF_SFMT_ADD },
52 { M32R_INSN_AND3, M32RBF_INSN_AND3, M32RBF_SFMT_AND3 },
53 { M32R_INSN_OR, M32RBF_INSN_OR, M32RBF_SFMT_ADD },
54 { M32R_INSN_OR3, M32RBF_INSN_OR3, M32RBF_SFMT_OR3 },
55 { M32R_INSN_XOR, M32RBF_INSN_XOR, M32RBF_SFMT_ADD },
56 { M32R_INSN_XOR3, M32RBF_INSN_XOR3, M32RBF_SFMT_AND3 },
57 { M32R_INSN_ADDI, M32RBF_INSN_ADDI, M32RBF_SFMT_ADDI },
58 { M32R_INSN_ADDV, M32RBF_INSN_ADDV, M32RBF_SFMT_ADDV },
59 { M32R_INSN_ADDV3, M32RBF_INSN_ADDV3, M32RBF_SFMT_ADDV3 },
60 { M32R_INSN_ADDX, M32RBF_INSN_ADDX, M32RBF_SFMT_ADDX },
61 { M32R_INSN_BC8, M32RBF_INSN_BC8, M32RBF_SFMT_BC8 },
62 { M32R_INSN_BC24, M32RBF_INSN_BC24, M32RBF_SFMT_BC24 },
63 { M32R_INSN_BEQ, M32RBF_INSN_BEQ, M32RBF_SFMT_BEQ },
64 { M32R_INSN_BEQZ, M32RBF_INSN_BEQZ, M32RBF_SFMT_BEQZ },
65 { M32R_INSN_BGEZ, M32RBF_INSN_BGEZ, M32RBF_SFMT_BEQZ },
66 { M32R_INSN_BGTZ, M32RBF_INSN_BGTZ, M32RBF_SFMT_BEQZ },
67 { M32R_INSN_BLEZ, M32RBF_INSN_BLEZ, M32RBF_SFMT_BEQZ },
68 { M32R_INSN_BLTZ, M32RBF_INSN_BLTZ, M32RBF_SFMT_BEQZ },
69 { M32R_INSN_BNEZ, M32RBF_INSN_BNEZ, M32RBF_SFMT_BEQZ },
70 { M32R_INSN_BL8, M32RBF_INSN_BL8, M32RBF_SFMT_BL8 },
71 { M32R_INSN_BL24, M32RBF_INSN_BL24, M32RBF_SFMT_BL24 },
72 { M32R_INSN_BNC8, M32RBF_INSN_BNC8, M32RBF_SFMT_BC8 },
73 { M32R_INSN_BNC24, M32RBF_INSN_BNC24, M32RBF_SFMT_BC24 },
74 { M32R_INSN_BNE, M32RBF_INSN_BNE, M32RBF_SFMT_BEQ },
75 { M32R_INSN_BRA8, M32RBF_INSN_BRA8, M32RBF_SFMT_BRA8 },
76 { M32R_INSN_BRA24, M32RBF_INSN_BRA24, M32RBF_SFMT_BRA24 },
77 { M32R_INSN_CMP, M32RBF_INSN_CMP, M32RBF_SFMT_CMP },
78 { M32R_INSN_CMPI, M32RBF_INSN_CMPI, M32RBF_SFMT_CMPI },
79 { M32R_INSN_CMPU, M32RBF_INSN_CMPU, M32RBF_SFMT_CMP },
80 { M32R_INSN_CMPUI, M32RBF_INSN_CMPUI, M32RBF_SFMT_CMPI },
81 { M32R_INSN_DIV, M32RBF_INSN_DIV, M32RBF_SFMT_DIV },
82 { M32R_INSN_DIVU, M32RBF_INSN_DIVU, M32RBF_SFMT_DIV },
83 { M32R_INSN_REM, M32RBF_INSN_REM, M32RBF_SFMT_DIV },
84 { M32R_INSN_REMU, M32RBF_INSN_REMU, M32RBF_SFMT_DIV },
85 { M32R_INSN_JL, M32RBF_INSN_JL, M32RBF_SFMT_JL },
86 { M32R_INSN_JMP, M32RBF_INSN_JMP, M32RBF_SFMT_JMP },
87 { M32R_INSN_LD, M32RBF_INSN_LD, M32RBF_SFMT_LD },
88 { M32R_INSN_LD_D, M32RBF_INSN_LD_D, M32RBF_SFMT_LD_D },
89 { M32R_INSN_LDB, M32RBF_INSN_LDB, M32RBF_SFMT_LD },
90 { M32R_INSN_LDB_D, M32RBF_INSN_LDB_D, M32RBF_SFMT_LD_D },
91 { M32R_INSN_LDH, M32RBF_INSN_LDH, M32RBF_SFMT_LD },
92 { M32R_INSN_LDH_D, M32RBF_INSN_LDH_D, M32RBF_SFMT_LD_D },
93 { M32R_INSN_LDUB, M32RBF_INSN_LDUB, M32RBF_SFMT_LD },
94 { M32R_INSN_LDUB_D, M32RBF_INSN_LDUB_D, M32RBF_SFMT_LD_D },
95 { M32R_INSN_LDUH, M32RBF_INSN_LDUH, M32RBF_SFMT_LD },
96 { M32R_INSN_LDUH_D, M32RBF_INSN_LDUH_D, M32RBF_SFMT_LD_D },
97 { M32R_INSN_LD_PLUS, M32RBF_INSN_LD_PLUS, M32RBF_SFMT_LD_PLUS },
98 { M32R_INSN_LD24, M32RBF_INSN_LD24, M32RBF_SFMT_LD24 },
99 { M32R_INSN_LDI8, M32RBF_INSN_LDI8, M32RBF_SFMT_LDI8 },
100 { M32R_INSN_LDI16, M32RBF_INSN_LDI16, M32RBF_SFMT_LDI16 },
101 { M32R_INSN_LOCK, M32RBF_INSN_LOCK, M32RBF_SFMT_LOCK },
102 { M32R_INSN_MACHI, M32RBF_INSN_MACHI, M32RBF_SFMT_MACHI },
103 { M32R_INSN_MACLO, M32RBF_INSN_MACLO, M32RBF_SFMT_MACHI },
104 { M32R_INSN_MACWHI, M32RBF_INSN_MACWHI, M32RBF_SFMT_MACHI },
105 { M32R_INSN_MACWLO, M32RBF_INSN_MACWLO, M32RBF_SFMT_MACHI },
106 { M32R_INSN_MUL, M32RBF_INSN_MUL, M32RBF_SFMT_ADD },
107 { M32R_INSN_MULHI, M32RBF_INSN_MULHI, M32RBF_SFMT_MULHI },
108 { M32R_INSN_MULLO, M32RBF_INSN_MULLO, M32RBF_SFMT_MULHI },
109 { M32R_INSN_MULWHI, M32RBF_INSN_MULWHI, M32RBF_SFMT_MULHI },
110 { M32R_INSN_MULWLO, M32RBF_INSN_MULWLO, M32RBF_SFMT_MULHI },
111 { M32R_INSN_MV, M32RBF_INSN_MV, M32RBF_SFMT_MV },
112 { M32R_INSN_MVFACHI, M32RBF_INSN_MVFACHI, M32RBF_SFMT_MVFACHI },
113 { M32R_INSN_MVFACLO, M32RBF_INSN_MVFACLO, M32RBF_SFMT_MVFACHI },
114 { M32R_INSN_MVFACMI, M32RBF_INSN_MVFACMI, M32RBF_SFMT_MVFACHI },
115 { M32R_INSN_MVFC, M32RBF_INSN_MVFC, M32RBF_SFMT_MVFC },
116 { M32R_INSN_MVTACHI, M32RBF_INSN_MVTACHI, M32RBF_SFMT_MVTACHI },
117 { M32R_INSN_MVTACLO, M32RBF_INSN_MVTACLO, M32RBF_SFMT_MVTACHI },
118 { M32R_INSN_MVTC, M32RBF_INSN_MVTC, M32RBF_SFMT_MVTC },
119 { M32R_INSN_NEG, M32RBF_INSN_NEG, M32RBF_SFMT_MV },
120 { M32R_INSN_NOP, M32RBF_INSN_NOP, M32RBF_SFMT_NOP },
121 { M32R_INSN_NOT, M32RBF_INSN_NOT, M32RBF_SFMT_MV },
122 { M32R_INSN_RAC, M32RBF_INSN_RAC, M32RBF_SFMT_RAC },
123 { M32R_INSN_RACH, M32RBF_INSN_RACH, M32RBF_SFMT_RAC },
124 { M32R_INSN_RTE, M32RBF_INSN_RTE, M32RBF_SFMT_RTE },
125 { M32R_INSN_SETH, M32RBF_INSN_SETH, M32RBF_SFMT_SETH },
126 { M32R_INSN_SLL, M32RBF_INSN_SLL, M32RBF_SFMT_ADD },
127 { M32R_INSN_SLL3, M32RBF_INSN_SLL3, M32RBF_SFMT_SLL3 },
128 { M32R_INSN_SLLI, M32RBF_INSN_SLLI, M32RBF_SFMT_SLLI },
129 { M32R_INSN_SRA, M32RBF_INSN_SRA, M32RBF_SFMT_ADD },
130 { M32R_INSN_SRA3, M32RBF_INSN_SRA3, M32RBF_SFMT_SLL3 },
131 { M32R_INSN_SRAI, M32RBF_INSN_SRAI, M32RBF_SFMT_SLLI },
132 { M32R_INSN_SRL, M32RBF_INSN_SRL, M32RBF_SFMT_ADD },
133 { M32R_INSN_SRL3, M32RBF_INSN_SRL3, M32RBF_SFMT_SLL3 },
134 { M32R_INSN_SRLI, M32RBF_INSN_SRLI, M32RBF_SFMT_SLLI },
135 { M32R_INSN_ST, M32RBF_INSN_ST, M32RBF_SFMT_ST },
136 { M32R_INSN_ST_D, M32RBF_INSN_ST_D, M32RBF_SFMT_ST_D },
137 { M32R_INSN_STB, M32RBF_INSN_STB, M32RBF_SFMT_STB },
138 { M32R_INSN_STB_D, M32RBF_INSN_STB_D, M32RBF_SFMT_STB_D },
139 { M32R_INSN_STH, M32RBF_INSN_STH, M32RBF_SFMT_STH },
140 { M32R_INSN_STH_D, M32RBF_INSN_STH_D, M32RBF_SFMT_STH_D },
141 { M32R_INSN_ST_PLUS, M32RBF_INSN_ST_PLUS, M32RBF_SFMT_ST_PLUS },
142 { M32R_INSN_ST_MINUS, M32RBF_INSN_ST_MINUS, M32RBF_SFMT_ST_PLUS },
143 { M32R_INSN_SUB, M32RBF_INSN_SUB, M32RBF_SFMT_ADD },
144 { M32R_INSN_SUBV, M32RBF_INSN_SUBV, M32RBF_SFMT_ADDV },
145 { M32R_INSN_SUBX, M32RBF_INSN_SUBX, M32RBF_SFMT_ADDX },
146 { M32R_INSN_TRAP, M32RBF_INSN_TRAP, M32RBF_SFMT_TRAP },
147 { M32R_INSN_UNLOCK, M32RBF_INSN_UNLOCK, M32RBF_SFMT_UNLOCK },
150 static const struct insn_sem m32rbf_insn_sem_invalid = {
151 VIRTUAL_INSN_X_INVALID, M32RBF_INSN_X_INVALID, M32RBF_SFMT_EMPTY
154 /* Initialize an IDESC from the compile-time computable parts. */
157 init_idesc (SIM_CPU *cpu, IDESC *id, const struct insn_sem *t)
159 const CGEN_INSN *insn_table = CGEN_CPU_INSN_TABLE (CPU_CPU_DESC (cpu))->init_entries;
163 if ((int) t->type <= 0)
164 id->idata = & cgen_virtual_insn_table[- (int) t->type];
166 id->idata = & insn_table[t->type];
167 id->attrs = CGEN_INSN_ATTRS (id->idata);
168 /* Oh my god, a magic number. */
169 id->length = CGEN_INSN_BITSIZE (id->idata) / 8;
171 #if WITH_PROFILE_MODEL_P
172 id->timing = & MODEL_TIMING (CPU_MODEL (cpu)) [t->index];
174 SIM_DESC sd = CPU_STATE (cpu);
175 SIM_ASSERT (t->index == id->timing->num);
179 /* Semantic pointers are initialized elsewhere. */
182 /* Initialize the instruction descriptor table. */
185 m32rbf_init_idesc_table (SIM_CPU *cpu)
188 const struct insn_sem *t,*tend;
189 int tabsize = M32RBF_INSN_MAX;
190 IDESC *table = m32rbf_insn_data;
192 memset (table, 0, tabsize * sizeof (IDESC));
194 /* First set all entries to the `invalid insn'. */
195 t = & m32rbf_insn_sem_invalid;
196 for (id = table, tabend = table + tabsize; id < tabend; ++id)
197 init_idesc (cpu, id, t);
199 /* Now fill in the values for the chosen cpu. */
200 for (t = m32rbf_insn_sem, tend = t + sizeof (m32rbf_insn_sem) / sizeof (*t);
203 init_idesc (cpu, & table[t->index], t);
206 /* Link the IDESC table into the cpu. */
207 CPU_IDESC (cpu) = table;
210 /* Given an instruction, return a pointer to its IDESC entry. */
213 m32rbf_decode (SIM_CPU *current_cpu, IADDR pc,
214 CGEN_INSN_INT base_insn, CGEN_INSN_INT entire_insn,
217 /* Result of decoder. */
218 M32RBF_INSN_TYPE itype;
221 CGEN_INSN_INT insn = base_insn;
224 unsigned int val = (((insn >> 8) & (15 << 4)) | ((insn >> 4) & (15 << 0)));
227 case 0 : itype = M32RBF_INSN_SUBV; goto extract_sfmt_addv;
228 case 1 : itype = M32RBF_INSN_SUBX; goto extract_sfmt_addx;
229 case 2 : itype = M32RBF_INSN_SUB; goto extract_sfmt_add;
230 case 3 : itype = M32RBF_INSN_NEG; goto extract_sfmt_mv;
231 case 4 : itype = M32RBF_INSN_CMP; goto extract_sfmt_cmp;
232 case 5 : itype = M32RBF_INSN_CMPU; goto extract_sfmt_cmp;
233 case 8 : itype = M32RBF_INSN_ADDV; goto extract_sfmt_addv;
234 case 9 : itype = M32RBF_INSN_ADDX; goto extract_sfmt_addx;
235 case 10 : itype = M32RBF_INSN_ADD; goto extract_sfmt_add;
236 case 11 : itype = M32RBF_INSN_NOT; goto extract_sfmt_mv;
237 case 12 : itype = M32RBF_INSN_AND; goto extract_sfmt_add;
238 case 13 : itype = M32RBF_INSN_XOR; goto extract_sfmt_add;
239 case 14 : itype = M32RBF_INSN_OR; goto extract_sfmt_add;
240 case 16 : itype = M32RBF_INSN_SRL; goto extract_sfmt_add;
241 case 18 : itype = M32RBF_INSN_SRA; goto extract_sfmt_add;
242 case 20 : itype = M32RBF_INSN_SLL; goto extract_sfmt_add;
243 case 22 : itype = M32RBF_INSN_MUL; goto extract_sfmt_add;
244 case 24 : itype = M32RBF_INSN_MV; goto extract_sfmt_mv;
245 case 25 : itype = M32RBF_INSN_MVFC; goto extract_sfmt_mvfc;
246 case 26 : itype = M32RBF_INSN_MVTC; goto extract_sfmt_mvtc;
249 unsigned int val = (((insn >> 8) & (15 << 0)));
252 case 14 : itype = M32RBF_INSN_JL; goto extract_sfmt_jl;
253 case 15 : itype = M32RBF_INSN_JMP; goto extract_sfmt_jmp;
254 default : itype = M32RBF_INSN_X_INVALID; goto extract_sfmt_empty;
257 case 29 : itype = M32RBF_INSN_RTE; goto extract_sfmt_rte;
258 case 31 : itype = M32RBF_INSN_TRAP; goto extract_sfmt_trap;
259 case 32 : itype = M32RBF_INSN_STB; goto extract_sfmt_stb;
260 case 34 : itype = M32RBF_INSN_STH; goto extract_sfmt_sth;
261 case 36 : itype = M32RBF_INSN_ST; goto extract_sfmt_st;
262 case 37 : itype = M32RBF_INSN_UNLOCK; goto extract_sfmt_unlock;
263 case 38 : itype = M32RBF_INSN_ST_PLUS; goto extract_sfmt_st_plus;
264 case 39 : itype = M32RBF_INSN_ST_MINUS; goto extract_sfmt_st_plus;
265 case 40 : itype = M32RBF_INSN_LDB; goto extract_sfmt_ld;
266 case 41 : itype = M32RBF_INSN_LDUB; goto extract_sfmt_ld;
267 case 42 : itype = M32RBF_INSN_LDH; goto extract_sfmt_ld;
268 case 43 : itype = M32RBF_INSN_LDUH; goto extract_sfmt_ld;
269 case 44 : itype = M32RBF_INSN_LD; goto extract_sfmt_ld;
270 case 45 : itype = M32RBF_INSN_LOCK; goto extract_sfmt_lock;
271 case 46 : itype = M32RBF_INSN_LD_PLUS; goto extract_sfmt_ld_plus;
272 case 48 : itype = M32RBF_INSN_MULHI; goto extract_sfmt_mulhi;
273 case 49 : itype = M32RBF_INSN_MULLO; goto extract_sfmt_mulhi;
274 case 50 : itype = M32RBF_INSN_MULWHI; goto extract_sfmt_mulhi;
275 case 51 : itype = M32RBF_INSN_MULWLO; goto extract_sfmt_mulhi;
276 case 52 : itype = M32RBF_INSN_MACHI; goto extract_sfmt_machi;
277 case 53 : itype = M32RBF_INSN_MACLO; goto extract_sfmt_machi;
278 case 54 : itype = M32RBF_INSN_MACWHI; goto extract_sfmt_machi;
279 case 55 : itype = M32RBF_INSN_MACWLO; goto extract_sfmt_machi;
280 case 64 : /* fall through */
281 case 65 : /* fall through */
282 case 66 : /* fall through */
283 case 67 : /* fall through */
284 case 68 : /* fall through */
285 case 69 : /* fall through */
286 case 70 : /* fall through */
287 case 71 : /* fall through */
288 case 72 : /* fall through */
289 case 73 : /* fall through */
290 case 74 : /* fall through */
291 case 75 : /* fall through */
292 case 76 : /* fall through */
293 case 77 : /* fall through */
294 case 78 : /* fall through */
295 case 79 : itype = M32RBF_INSN_ADDI; goto extract_sfmt_addi;
296 case 80 : /* fall through */
297 case 81 : itype = M32RBF_INSN_SRLI; goto extract_sfmt_slli;
298 case 82 : /* fall through */
299 case 83 : itype = M32RBF_INSN_SRAI; goto extract_sfmt_slli;
300 case 84 : /* fall through */
301 case 85 : itype = M32RBF_INSN_SLLI; goto extract_sfmt_slli;
304 unsigned int val = (((insn >> 0) & (15 << 0)));
307 case 0 : itype = M32RBF_INSN_MVTACHI; goto extract_sfmt_mvtachi;
308 case 1 : itype = M32RBF_INSN_MVTACLO; goto extract_sfmt_mvtachi;
309 default : itype = M32RBF_INSN_X_INVALID; goto extract_sfmt_empty;
312 case 88 : itype = M32RBF_INSN_RACH; goto extract_sfmt_rac;
313 case 89 : itype = M32RBF_INSN_RAC; goto extract_sfmt_rac;
316 unsigned int val = (((insn >> 0) & (15 << 0)));
319 case 0 : itype = M32RBF_INSN_MVFACHI; goto extract_sfmt_mvfachi;
320 case 1 : itype = M32RBF_INSN_MVFACLO; goto extract_sfmt_mvfachi;
321 case 2 : itype = M32RBF_INSN_MVFACMI; goto extract_sfmt_mvfachi;
322 default : itype = M32RBF_INSN_X_INVALID; goto extract_sfmt_empty;
325 case 96 : /* fall through */
326 case 97 : /* fall through */
327 case 98 : /* fall through */
328 case 99 : /* fall through */
329 case 100 : /* fall through */
330 case 101 : /* fall through */
331 case 102 : /* fall through */
332 case 103 : /* fall through */
333 case 104 : /* fall through */
334 case 105 : /* fall through */
335 case 106 : /* fall through */
336 case 107 : /* fall through */
337 case 108 : /* fall through */
338 case 109 : /* fall through */
339 case 110 : /* fall through */
340 case 111 : itype = M32RBF_INSN_LDI8; goto extract_sfmt_ldi8;
343 unsigned int val = (((insn >> 8) & (15 << 0)));
346 case 0 : itype = M32RBF_INSN_NOP; goto extract_sfmt_nop;
347 case 12 : itype = M32RBF_INSN_BC8; goto extract_sfmt_bc8;
348 case 13 : itype = M32RBF_INSN_BNC8; goto extract_sfmt_bc8;
349 case 14 : itype = M32RBF_INSN_BL8; goto extract_sfmt_bl8;
350 case 15 : itype = M32RBF_INSN_BRA8; goto extract_sfmt_bra8;
351 default : itype = M32RBF_INSN_X_INVALID; goto extract_sfmt_empty;
354 case 113 : /* fall through */
355 case 114 : /* fall through */
356 case 115 : /* fall through */
357 case 116 : /* fall through */
358 case 117 : /* fall through */
359 case 118 : /* fall through */
360 case 119 : /* fall through */
361 case 120 : /* fall through */
362 case 121 : /* fall through */
363 case 122 : /* fall through */
364 case 123 : /* fall through */
365 case 124 : /* fall through */
366 case 125 : /* fall through */
367 case 126 : /* fall through */
370 unsigned int val = (((insn >> 8) & (15 << 0)));
373 case 12 : itype = M32RBF_INSN_BC8; goto extract_sfmt_bc8;
374 case 13 : itype = M32RBF_INSN_BNC8; goto extract_sfmt_bc8;
375 case 14 : itype = M32RBF_INSN_BL8; goto extract_sfmt_bl8;
376 case 15 : itype = M32RBF_INSN_BRA8; goto extract_sfmt_bra8;
377 default : itype = M32RBF_INSN_X_INVALID; goto extract_sfmt_empty;
380 case 132 : itype = M32RBF_INSN_CMPI; goto extract_sfmt_cmpi;
381 case 133 : itype = M32RBF_INSN_CMPUI; goto extract_sfmt_cmpi;
382 case 136 : itype = M32RBF_INSN_ADDV3; goto extract_sfmt_addv3;
383 case 138 : itype = M32RBF_INSN_ADD3; goto extract_sfmt_add3;
384 case 140 : itype = M32RBF_INSN_AND3; goto extract_sfmt_and3;
385 case 141 : itype = M32RBF_INSN_XOR3; goto extract_sfmt_and3;
386 case 142 : itype = M32RBF_INSN_OR3; goto extract_sfmt_or3;
387 case 144 : itype = M32RBF_INSN_DIV; goto extract_sfmt_div;
388 case 145 : itype = M32RBF_INSN_DIVU; goto extract_sfmt_div;
389 case 146 : itype = M32RBF_INSN_REM; goto extract_sfmt_div;
390 case 147 : itype = M32RBF_INSN_REMU; goto extract_sfmt_div;
391 case 152 : itype = M32RBF_INSN_SRL3; goto extract_sfmt_sll3;
392 case 154 : itype = M32RBF_INSN_SRA3; goto extract_sfmt_sll3;
393 case 156 : itype = M32RBF_INSN_SLL3; goto extract_sfmt_sll3;
394 case 159 : itype = M32RBF_INSN_LDI16; goto extract_sfmt_ldi16;
395 case 160 : itype = M32RBF_INSN_STB_D; goto extract_sfmt_stb_d;
396 case 162 : itype = M32RBF_INSN_STH_D; goto extract_sfmt_sth_d;
397 case 164 : itype = M32RBF_INSN_ST_D; goto extract_sfmt_st_d;
398 case 168 : itype = M32RBF_INSN_LDB_D; goto extract_sfmt_ld_d;
399 case 169 : itype = M32RBF_INSN_LDUB_D; goto extract_sfmt_ld_d;
400 case 170 : itype = M32RBF_INSN_LDH_D; goto extract_sfmt_ld_d;
401 case 171 : itype = M32RBF_INSN_LDUH_D; goto extract_sfmt_ld_d;
402 case 172 : itype = M32RBF_INSN_LD_D; goto extract_sfmt_ld_d;
403 case 176 : itype = M32RBF_INSN_BEQ; goto extract_sfmt_beq;
404 case 177 : itype = M32RBF_INSN_BNE; goto extract_sfmt_beq;
405 case 184 : itype = M32RBF_INSN_BEQZ; goto extract_sfmt_beqz;
406 case 185 : itype = M32RBF_INSN_BNEZ; goto extract_sfmt_beqz;
407 case 186 : itype = M32RBF_INSN_BLTZ; goto extract_sfmt_beqz;
408 case 187 : itype = M32RBF_INSN_BGEZ; goto extract_sfmt_beqz;
409 case 188 : itype = M32RBF_INSN_BLEZ; goto extract_sfmt_beqz;
410 case 189 : itype = M32RBF_INSN_BGTZ; goto extract_sfmt_beqz;
411 case 220 : itype = M32RBF_INSN_SETH; goto extract_sfmt_seth;
412 case 224 : /* fall through */
413 case 225 : /* fall through */
414 case 226 : /* fall through */
415 case 227 : /* fall through */
416 case 228 : /* fall through */
417 case 229 : /* fall through */
418 case 230 : /* fall through */
419 case 231 : /* fall through */
420 case 232 : /* fall through */
421 case 233 : /* fall through */
422 case 234 : /* fall through */
423 case 235 : /* fall through */
424 case 236 : /* fall through */
425 case 237 : /* fall through */
426 case 238 : /* fall through */
427 case 239 : itype = M32RBF_INSN_LD24; goto extract_sfmt_ld24;
428 case 240 : /* fall through */
429 case 241 : /* fall through */
430 case 242 : /* fall through */
431 case 243 : /* fall through */
432 case 244 : /* fall through */
433 case 245 : /* fall through */
434 case 246 : /* fall through */
435 case 247 : /* fall through */
436 case 248 : /* fall through */
437 case 249 : /* fall through */
438 case 250 : /* fall through */
439 case 251 : /* fall through */
440 case 252 : /* fall through */
441 case 253 : /* fall through */
442 case 254 : /* fall through */
445 unsigned int val = (((insn >> 8) & (15 << 0)));
448 case 12 : itype = M32RBF_INSN_BC24; goto extract_sfmt_bc24;
449 case 13 : itype = M32RBF_INSN_BNC24; goto extract_sfmt_bc24;
450 case 14 : itype = M32RBF_INSN_BL24; goto extract_sfmt_bl24;
451 case 15 : itype = M32RBF_INSN_BRA24; goto extract_sfmt_bra24;
452 default : itype = M32RBF_INSN_X_INVALID; goto extract_sfmt_empty;
455 default : itype = M32RBF_INSN_X_INVALID; goto extract_sfmt_empty;
460 /* The instruction has been decoded, now extract the fields. */
464 const IDESC *idesc = &m32rbf_insn_data[itype];
465 CGEN_INSN_INT insn = entire_insn;
466 #define FLD(f) abuf->fields.fmt_empty.f
469 /* Record the fields for the semantic handler. */
470 TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_empty", (char *) 0));
478 const IDESC *idesc = &m32rbf_insn_data[itype];
479 CGEN_INSN_INT insn = entire_insn;
480 #define FLD(f) abuf->fields.sfmt_add.f
484 f_r1 = EXTRACT_MSB0_UINT (insn, 16, 4, 4);
485 f_r2 = EXTRACT_MSB0_UINT (insn, 16, 12, 4);
487 /* Record the fields for the semantic handler. */
490 FLD (i_dr) = & CPU (h_gr)[f_r1];
491 FLD (i_sr) = & CPU (h_gr)[f_r2];
492 TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_add", "f_r1 0x%x", 'x', f_r1, "f_r2 0x%x", 'x', f_r2, "dr 0x%x", 'x', f_r1, "sr 0x%x", 'x', f_r2, (char *) 0));
494 #if WITH_PROFILE_MODEL_P
495 /* Record the fields for profiling. */
496 if (PROFILE_MODEL_P (current_cpu))
509 const IDESC *idesc = &m32rbf_insn_data[itype];
510 CGEN_INSN_INT insn = entire_insn;
511 #define FLD(f) abuf->fields.sfmt_add3.f
516 f_r1 = EXTRACT_MSB0_UINT (insn, 32, 4, 4);
517 f_r2 = EXTRACT_MSB0_UINT (insn, 32, 12, 4);
518 f_simm16 = EXTRACT_MSB0_INT (insn, 32, 16, 16);
520 /* Record the fields for the semantic handler. */
521 FLD (f_simm16) = f_simm16;
524 FLD (i_sr) = & CPU (h_gr)[f_r2];
525 FLD (i_dr) = & CPU (h_gr)[f_r1];
526 TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_add3", "f_simm16 0x%x", 'x', f_simm16, "f_r2 0x%x", 'x', f_r2, "f_r1 0x%x", 'x', f_r1, "sr 0x%x", 'x', f_r2, "dr 0x%x", 'x', f_r1, (char *) 0));
528 #if WITH_PROFILE_MODEL_P
529 /* Record the fields for profiling. */
530 if (PROFILE_MODEL_P (current_cpu))
542 const IDESC *idesc = &m32rbf_insn_data[itype];
543 CGEN_INSN_INT insn = entire_insn;
544 #define FLD(f) abuf->fields.sfmt_and3.f
549 f_r1 = EXTRACT_MSB0_UINT (insn, 32, 4, 4);
550 f_r2 = EXTRACT_MSB0_UINT (insn, 32, 12, 4);
551 f_uimm16 = EXTRACT_MSB0_UINT (insn, 32, 16, 16);
553 /* Record the fields for the semantic handler. */
555 FLD (f_uimm16) = f_uimm16;
557 FLD (i_sr) = & CPU (h_gr)[f_r2];
558 FLD (i_dr) = & CPU (h_gr)[f_r1];
559 TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_and3", "f_r2 0x%x", 'x', f_r2, "f_uimm16 0x%x", 'x', f_uimm16, "f_r1 0x%x", 'x', f_r1, "sr 0x%x", 'x', f_r2, "dr 0x%x", 'x', f_r1, (char *) 0));
561 #if WITH_PROFILE_MODEL_P
562 /* Record the fields for profiling. */
563 if (PROFILE_MODEL_P (current_cpu))
575 const IDESC *idesc = &m32rbf_insn_data[itype];
576 CGEN_INSN_INT insn = entire_insn;
577 #define FLD(f) abuf->fields.sfmt_and3.f
582 f_r1 = EXTRACT_MSB0_UINT (insn, 32, 4, 4);
583 f_r2 = EXTRACT_MSB0_UINT (insn, 32, 12, 4);
584 f_uimm16 = EXTRACT_MSB0_UINT (insn, 32, 16, 16);
586 /* Record the fields for the semantic handler. */
588 FLD (f_uimm16) = f_uimm16;
590 FLD (i_sr) = & CPU (h_gr)[f_r2];
591 FLD (i_dr) = & CPU (h_gr)[f_r1];
592 TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_or3", "f_r2 0x%x", 'x', f_r2, "f_uimm16 0x%x", 'x', f_uimm16, "f_r1 0x%x", 'x', f_r1, "sr 0x%x", 'x', f_r2, "dr 0x%x", 'x', f_r1, (char *) 0));
594 #if WITH_PROFILE_MODEL_P
595 /* Record the fields for profiling. */
596 if (PROFILE_MODEL_P (current_cpu))
608 const IDESC *idesc = &m32rbf_insn_data[itype];
609 CGEN_INSN_INT insn = entire_insn;
610 #define FLD(f) abuf->fields.sfmt_addi.f
614 f_r1 = EXTRACT_MSB0_UINT (insn, 16, 4, 4);
615 f_simm8 = EXTRACT_MSB0_INT (insn, 16, 8, 8);
617 /* Record the fields for the semantic handler. */
619 FLD (f_simm8) = f_simm8;
620 FLD (i_dr) = & CPU (h_gr)[f_r1];
621 TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_addi", "f_r1 0x%x", 'x', f_r1, "f_simm8 0x%x", 'x', f_simm8, "dr 0x%x", 'x', f_r1, (char *) 0));
623 #if WITH_PROFILE_MODEL_P
624 /* Record the fields for profiling. */
625 if (PROFILE_MODEL_P (current_cpu))
637 const IDESC *idesc = &m32rbf_insn_data[itype];
638 CGEN_INSN_INT insn = entire_insn;
639 #define FLD(f) abuf->fields.sfmt_add.f
643 f_r1 = EXTRACT_MSB0_UINT (insn, 16, 4, 4);
644 f_r2 = EXTRACT_MSB0_UINT (insn, 16, 12, 4);
646 /* Record the fields for the semantic handler. */
649 FLD (i_dr) = & CPU (h_gr)[f_r1];
650 FLD (i_sr) = & CPU (h_gr)[f_r2];
651 TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_addv", "f_r1 0x%x", 'x', f_r1, "f_r2 0x%x", 'x', f_r2, "dr 0x%x", 'x', f_r1, "sr 0x%x", 'x', f_r2, (char *) 0));
653 #if WITH_PROFILE_MODEL_P
654 /* Record the fields for profiling. */
655 if (PROFILE_MODEL_P (current_cpu))
668 const IDESC *idesc = &m32rbf_insn_data[itype];
669 CGEN_INSN_INT insn = entire_insn;
670 #define FLD(f) abuf->fields.sfmt_add3.f
675 f_r1 = EXTRACT_MSB0_UINT (insn, 32, 4, 4);
676 f_r2 = EXTRACT_MSB0_UINT (insn, 32, 12, 4);
677 f_simm16 = EXTRACT_MSB0_INT (insn, 32, 16, 16);
679 /* Record the fields for the semantic handler. */
680 FLD (f_simm16) = f_simm16;
683 FLD (i_sr) = & CPU (h_gr)[f_r2];
684 FLD (i_dr) = & CPU (h_gr)[f_r1];
685 TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_addv3", "f_simm16 0x%x", 'x', f_simm16, "f_r2 0x%x", 'x', f_r2, "f_r1 0x%x", 'x', f_r1, "sr 0x%x", 'x', f_r2, "dr 0x%x", 'x', f_r1, (char *) 0));
687 #if WITH_PROFILE_MODEL_P
688 /* Record the fields for profiling. */
689 if (PROFILE_MODEL_P (current_cpu))
701 const IDESC *idesc = &m32rbf_insn_data[itype];
702 CGEN_INSN_INT insn = entire_insn;
703 #define FLD(f) abuf->fields.sfmt_add.f
707 f_r1 = EXTRACT_MSB0_UINT (insn, 16, 4, 4);
708 f_r2 = EXTRACT_MSB0_UINT (insn, 16, 12, 4);
710 /* Record the fields for the semantic handler. */
713 FLD (i_dr) = & CPU (h_gr)[f_r1];
714 FLD (i_sr) = & CPU (h_gr)[f_r2];
715 TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_addx", "f_r1 0x%x", 'x', f_r1, "f_r2 0x%x", 'x', f_r2, "dr 0x%x", 'x', f_r1, "sr 0x%x", 'x', f_r2, (char *) 0));
717 #if WITH_PROFILE_MODEL_P
718 /* Record the fields for profiling. */
719 if (PROFILE_MODEL_P (current_cpu))
732 const IDESC *idesc = &m32rbf_insn_data[itype];
733 CGEN_INSN_INT insn = entire_insn;
734 #define FLD(f) abuf->fields.sfmt_bl8.f
737 f_disp8 = ((((EXTRACT_MSB0_INT (insn, 16, 8, 8)) << (2))) + (((pc) & (-4))));
739 /* Record the fields for the semantic handler. */
740 FLD (i_disp8) = f_disp8;
741 TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_bc8", "disp8 0x%x", 'x', f_disp8, (char *) 0));
743 #if WITH_PROFILE_MODEL_P
744 /* Record the fields for profiling. */
745 if (PROFILE_MODEL_P (current_cpu))
755 const IDESC *idesc = &m32rbf_insn_data[itype];
756 CGEN_INSN_INT insn = entire_insn;
757 #define FLD(f) abuf->fields.sfmt_bl24.f
760 f_disp24 = ((((EXTRACT_MSB0_INT (insn, 32, 8, 24)) << (2))) + (pc));
762 /* Record the fields for the semantic handler. */
763 FLD (i_disp24) = f_disp24;
764 TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_bc24", "disp24 0x%x", 'x', f_disp24, (char *) 0));
766 #if WITH_PROFILE_MODEL_P
767 /* Record the fields for profiling. */
768 if (PROFILE_MODEL_P (current_cpu))
778 const IDESC *idesc = &m32rbf_insn_data[itype];
779 CGEN_INSN_INT insn = entire_insn;
780 #define FLD(f) abuf->fields.sfmt_beq.f
785 f_r1 = EXTRACT_MSB0_UINT (insn, 32, 4, 4);
786 f_r2 = EXTRACT_MSB0_UINT (insn, 32, 12, 4);
787 f_disp16 = ((((EXTRACT_MSB0_INT (insn, 32, 16, 16)) << (2))) + (pc));
789 /* Record the fields for the semantic handler. */
792 FLD (i_disp16) = f_disp16;
793 FLD (i_src1) = & CPU (h_gr)[f_r1];
794 FLD (i_src2) = & CPU (h_gr)[f_r2];
795 TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_beq", "f_r1 0x%x", 'x', f_r1, "f_r2 0x%x", 'x', f_r2, "disp16 0x%x", 'x', f_disp16, "src1 0x%x", 'x', f_r1, "src2 0x%x", 'x', f_r2, (char *) 0));
797 #if WITH_PROFILE_MODEL_P
798 /* Record the fields for profiling. */
799 if (PROFILE_MODEL_P (current_cpu))
801 FLD (in_src1) = f_r1;
802 FLD (in_src2) = f_r2;
811 const IDESC *idesc = &m32rbf_insn_data[itype];
812 CGEN_INSN_INT insn = entire_insn;
813 #define FLD(f) abuf->fields.sfmt_beq.f
817 f_r2 = EXTRACT_MSB0_UINT (insn, 32, 12, 4);
818 f_disp16 = ((((EXTRACT_MSB0_INT (insn, 32, 16, 16)) << (2))) + (pc));
820 /* Record the fields for the semantic handler. */
822 FLD (i_disp16) = f_disp16;
823 FLD (i_src2) = & CPU (h_gr)[f_r2];
824 TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_beqz", "f_r2 0x%x", 'x', f_r2, "disp16 0x%x", 'x', f_disp16, "src2 0x%x", 'x', f_r2, (char *) 0));
826 #if WITH_PROFILE_MODEL_P
827 /* Record the fields for profiling. */
828 if (PROFILE_MODEL_P (current_cpu))
830 FLD (in_src2) = f_r2;
839 const IDESC *idesc = &m32rbf_insn_data[itype];
840 CGEN_INSN_INT insn = entire_insn;
841 #define FLD(f) abuf->fields.sfmt_bl8.f
844 f_disp8 = ((((EXTRACT_MSB0_INT (insn, 16, 8, 8)) << (2))) + (((pc) & (-4))));
846 /* Record the fields for the semantic handler. */
847 FLD (i_disp8) = f_disp8;
848 TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_bl8", "disp8 0x%x", 'x', f_disp8, (char *) 0));
850 #if WITH_PROFILE_MODEL_P
851 /* Record the fields for profiling. */
852 if (PROFILE_MODEL_P (current_cpu))
854 FLD (out_h_gr_14) = 14;
863 const IDESC *idesc = &m32rbf_insn_data[itype];
864 CGEN_INSN_INT insn = entire_insn;
865 #define FLD(f) abuf->fields.sfmt_bl24.f
868 f_disp24 = ((((EXTRACT_MSB0_INT (insn, 32, 8, 24)) << (2))) + (pc));
870 /* Record the fields for the semantic handler. */
871 FLD (i_disp24) = f_disp24;
872 TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_bl24", "disp24 0x%x", 'x', f_disp24, (char *) 0));
874 #if WITH_PROFILE_MODEL_P
875 /* Record the fields for profiling. */
876 if (PROFILE_MODEL_P (current_cpu))
878 FLD (out_h_gr_14) = 14;
887 const IDESC *idesc = &m32rbf_insn_data[itype];
888 CGEN_INSN_INT insn = entire_insn;
889 #define FLD(f) abuf->fields.sfmt_bl8.f
892 f_disp8 = ((((EXTRACT_MSB0_INT (insn, 16, 8, 8)) << (2))) + (((pc) & (-4))));
894 /* Record the fields for the semantic handler. */
895 FLD (i_disp8) = f_disp8;
896 TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_bra8", "disp8 0x%x", 'x', f_disp8, (char *) 0));
898 #if WITH_PROFILE_MODEL_P
899 /* Record the fields for profiling. */
900 if (PROFILE_MODEL_P (current_cpu))
910 const IDESC *idesc = &m32rbf_insn_data[itype];
911 CGEN_INSN_INT insn = entire_insn;
912 #define FLD(f) abuf->fields.sfmt_bl24.f
915 f_disp24 = ((((EXTRACT_MSB0_INT (insn, 32, 8, 24)) << (2))) + (pc));
917 /* Record the fields for the semantic handler. */
918 FLD (i_disp24) = f_disp24;
919 TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_bra24", "disp24 0x%x", 'x', f_disp24, (char *) 0));
921 #if WITH_PROFILE_MODEL_P
922 /* Record the fields for profiling. */
923 if (PROFILE_MODEL_P (current_cpu))
933 const IDESC *idesc = &m32rbf_insn_data[itype];
934 CGEN_INSN_INT insn = entire_insn;
935 #define FLD(f) abuf->fields.sfmt_st_plus.f
939 f_r1 = EXTRACT_MSB0_UINT (insn, 16, 4, 4);
940 f_r2 = EXTRACT_MSB0_UINT (insn, 16, 12, 4);
942 /* Record the fields for the semantic handler. */
945 FLD (i_src1) = & CPU (h_gr)[f_r1];
946 FLD (i_src2) = & CPU (h_gr)[f_r2];
947 TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_cmp", "f_r1 0x%x", 'x', f_r1, "f_r2 0x%x", 'x', f_r2, "src1 0x%x", 'x', f_r1, "src2 0x%x", 'x', f_r2, (char *) 0));
949 #if WITH_PROFILE_MODEL_P
950 /* Record the fields for profiling. */
951 if (PROFILE_MODEL_P (current_cpu))
953 FLD (in_src1) = f_r1;
954 FLD (in_src2) = f_r2;
963 const IDESC *idesc = &m32rbf_insn_data[itype];
964 CGEN_INSN_INT insn = entire_insn;
965 #define FLD(f) abuf->fields.sfmt_st_d.f
969 f_r2 = EXTRACT_MSB0_UINT (insn, 32, 12, 4);
970 f_simm16 = EXTRACT_MSB0_INT (insn, 32, 16, 16);
972 /* Record the fields for the semantic handler. */
973 FLD (f_simm16) = f_simm16;
975 FLD (i_src2) = & CPU (h_gr)[f_r2];
976 TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_cmpi", "f_simm16 0x%x", 'x', f_simm16, "f_r2 0x%x", 'x', f_r2, "src2 0x%x", 'x', f_r2, (char *) 0));
978 #if WITH_PROFILE_MODEL_P
979 /* Record the fields for profiling. */
980 if (PROFILE_MODEL_P (current_cpu))
982 FLD (in_src2) = f_r2;
991 const IDESC *idesc = &m32rbf_insn_data[itype];
992 CGEN_INSN_INT insn = entire_insn;
993 #define FLD(f) abuf->fields.sfmt_add.f
997 f_r1 = EXTRACT_MSB0_UINT (insn, 32, 4, 4);
998 f_r2 = EXTRACT_MSB0_UINT (insn, 32, 12, 4);
1000 /* Record the fields for the semantic handler. */
1003 FLD (i_dr) = & CPU (h_gr)[f_r1];
1004 FLD (i_sr) = & CPU (h_gr)[f_r2];
1005 TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_div", "f_r1 0x%x", 'x', f_r1, "f_r2 0x%x", 'x', f_r2, "dr 0x%x", 'x', f_r1, "sr 0x%x", 'x', f_r2, (char *) 0));
1007 #if WITH_PROFILE_MODEL_P
1008 /* Record the fields for profiling. */
1009 if (PROFILE_MODEL_P (current_cpu))
1013 FLD (out_dr) = f_r1;
1022 const IDESC *idesc = &m32rbf_insn_data[itype];
1023 CGEN_INSN_INT insn = entire_insn;
1024 #define FLD(f) abuf->fields.sfmt_jl.f
1027 f_r2 = EXTRACT_MSB0_UINT (insn, 16, 12, 4);
1029 /* Record the fields for the semantic handler. */
1031 FLD (i_sr) = & CPU (h_gr)[f_r2];
1032 TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_jl", "f_r2 0x%x", 'x', f_r2, "sr 0x%x", 'x', f_r2, (char *) 0));
1034 #if WITH_PROFILE_MODEL_P
1035 /* Record the fields for profiling. */
1036 if (PROFILE_MODEL_P (current_cpu))
1039 FLD (out_h_gr_14) = 14;
1048 const IDESC *idesc = &m32rbf_insn_data[itype];
1049 CGEN_INSN_INT insn = entire_insn;
1050 #define FLD(f) abuf->fields.sfmt_jl.f
1053 f_r2 = EXTRACT_MSB0_UINT (insn, 16, 12, 4);
1055 /* Record the fields for the semantic handler. */
1057 FLD (i_sr) = & CPU (h_gr)[f_r2];
1058 TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_jmp", "f_r2 0x%x", 'x', f_r2, "sr 0x%x", 'x', f_r2, (char *) 0));
1060 #if WITH_PROFILE_MODEL_P
1061 /* Record the fields for profiling. */
1062 if (PROFILE_MODEL_P (current_cpu))
1073 const IDESC *idesc = &m32rbf_insn_data[itype];
1074 CGEN_INSN_INT insn = entire_insn;
1075 #define FLD(f) abuf->fields.sfmt_ld_plus.f
1079 f_r1 = EXTRACT_MSB0_UINT (insn, 16, 4, 4);
1080 f_r2 = EXTRACT_MSB0_UINT (insn, 16, 12, 4);
1082 /* Record the fields for the semantic handler. */
1085 FLD (i_sr) = & CPU (h_gr)[f_r2];
1086 FLD (i_dr) = & CPU (h_gr)[f_r1];
1087 TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_ld", "f_r2 0x%x", 'x', f_r2, "f_r1 0x%x", 'x', f_r1, "sr 0x%x", 'x', f_r2, "dr 0x%x", 'x', f_r1, (char *) 0));
1089 #if WITH_PROFILE_MODEL_P
1090 /* Record the fields for profiling. */
1091 if (PROFILE_MODEL_P (current_cpu))
1094 FLD (out_dr) = f_r1;
1103 const IDESC *idesc = &m32rbf_insn_data[itype];
1104 CGEN_INSN_INT insn = entire_insn;
1105 #define FLD(f) abuf->fields.sfmt_add3.f
1110 f_r1 = EXTRACT_MSB0_UINT (insn, 32, 4, 4);
1111 f_r2 = EXTRACT_MSB0_UINT (insn, 32, 12, 4);
1112 f_simm16 = EXTRACT_MSB0_INT (insn, 32, 16, 16);
1114 /* Record the fields for the semantic handler. */
1115 FLD (f_simm16) = f_simm16;
1118 FLD (i_sr) = & CPU (h_gr)[f_r2];
1119 FLD (i_dr) = & CPU (h_gr)[f_r1];
1120 TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_ld_d", "f_simm16 0x%x", 'x', f_simm16, "f_r2 0x%x", 'x', f_r2, "f_r1 0x%x", 'x', f_r1, "sr 0x%x", 'x', f_r2, "dr 0x%x", 'x', f_r1, (char *) 0));
1122 #if WITH_PROFILE_MODEL_P
1123 /* Record the fields for profiling. */
1124 if (PROFILE_MODEL_P (current_cpu))
1127 FLD (out_dr) = f_r1;
1134 extract_sfmt_ld_plus:
1136 const IDESC *idesc = &m32rbf_insn_data[itype];
1137 CGEN_INSN_INT insn = entire_insn;
1138 #define FLD(f) abuf->fields.sfmt_ld_plus.f
1142 f_r1 = EXTRACT_MSB0_UINT (insn, 16, 4, 4);
1143 f_r2 = EXTRACT_MSB0_UINT (insn, 16, 12, 4);
1145 /* Record the fields for the semantic handler. */
1148 FLD (i_sr) = & CPU (h_gr)[f_r2];
1149 FLD (i_dr) = & CPU (h_gr)[f_r1];
1150 TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_ld_plus", "f_r2 0x%x", 'x', f_r2, "f_r1 0x%x", 'x', f_r1, "sr 0x%x", 'x', f_r2, "dr 0x%x", 'x', f_r1, (char *) 0));
1152 #if WITH_PROFILE_MODEL_P
1153 /* Record the fields for profiling. */
1154 if (PROFILE_MODEL_P (current_cpu))
1157 FLD (out_dr) = f_r1;
1158 FLD (out_sr) = f_r2;
1167 const IDESC *idesc = &m32rbf_insn_data[itype];
1168 CGEN_INSN_INT insn = entire_insn;
1169 #define FLD(f) abuf->fields.sfmt_ld24.f
1173 f_r1 = EXTRACT_MSB0_UINT (insn, 32, 4, 4);
1174 f_uimm24 = EXTRACT_MSB0_UINT (insn, 32, 8, 24);
1176 /* Record the fields for the semantic handler. */
1178 FLD (i_uimm24) = f_uimm24;
1179 FLD (i_dr) = & CPU (h_gr)[f_r1];
1180 TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_ld24", "f_r1 0x%x", 'x', f_r1, "uimm24 0x%x", 'x', f_uimm24, "dr 0x%x", 'x', f_r1, (char *) 0));
1182 #if WITH_PROFILE_MODEL_P
1183 /* Record the fields for profiling. */
1184 if (PROFILE_MODEL_P (current_cpu))
1186 FLD (out_dr) = f_r1;
1195 const IDESC *idesc = &m32rbf_insn_data[itype];
1196 CGEN_INSN_INT insn = entire_insn;
1197 #define FLD(f) abuf->fields.sfmt_addi.f
1201 f_r1 = EXTRACT_MSB0_UINT (insn, 16, 4, 4);
1202 f_simm8 = EXTRACT_MSB0_INT (insn, 16, 8, 8);
1204 /* Record the fields for the semantic handler. */
1205 FLD (f_simm8) = f_simm8;
1207 FLD (i_dr) = & CPU (h_gr)[f_r1];
1208 TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_ldi8", "f_simm8 0x%x", 'x', f_simm8, "f_r1 0x%x", 'x', f_r1, "dr 0x%x", 'x', f_r1, (char *) 0));
1210 #if WITH_PROFILE_MODEL_P
1211 /* Record the fields for profiling. */
1212 if (PROFILE_MODEL_P (current_cpu))
1214 FLD (out_dr) = f_r1;
1223 const IDESC *idesc = &m32rbf_insn_data[itype];
1224 CGEN_INSN_INT insn = entire_insn;
1225 #define FLD(f) abuf->fields.sfmt_add3.f
1229 f_r1 = EXTRACT_MSB0_UINT (insn, 32, 4, 4);
1230 f_simm16 = EXTRACT_MSB0_INT (insn, 32, 16, 16);
1232 /* Record the fields for the semantic handler. */
1233 FLD (f_simm16) = f_simm16;
1235 FLD (i_dr) = & CPU (h_gr)[f_r1];
1236 TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_ldi16", "f_simm16 0x%x", 'x', f_simm16, "f_r1 0x%x", 'x', f_r1, "dr 0x%x", 'x', f_r1, (char *) 0));
1238 #if WITH_PROFILE_MODEL_P
1239 /* Record the fields for profiling. */
1240 if (PROFILE_MODEL_P (current_cpu))
1242 FLD (out_dr) = f_r1;
1251 const IDESC *idesc = &m32rbf_insn_data[itype];
1252 CGEN_INSN_INT insn = entire_insn;
1253 #define FLD(f) abuf->fields.sfmt_ld_plus.f
1257 f_r1 = EXTRACT_MSB0_UINT (insn, 16, 4, 4);
1258 f_r2 = EXTRACT_MSB0_UINT (insn, 16, 12, 4);
1260 /* Record the fields for the semantic handler. */
1263 FLD (i_sr) = & CPU (h_gr)[f_r2];
1264 FLD (i_dr) = & CPU (h_gr)[f_r1];
1265 TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_lock", "f_r2 0x%x", 'x', f_r2, "f_r1 0x%x", 'x', f_r1, "sr 0x%x", 'x', f_r2, "dr 0x%x", 'x', f_r1, (char *) 0));
1267 #if WITH_PROFILE_MODEL_P
1268 /* Record the fields for profiling. */
1269 if (PROFILE_MODEL_P (current_cpu))
1272 FLD (out_dr) = f_r1;
1281 const IDESC *idesc = &m32rbf_insn_data[itype];
1282 CGEN_INSN_INT insn = entire_insn;
1283 #define FLD(f) abuf->fields.sfmt_st_plus.f
1287 f_r1 = EXTRACT_MSB0_UINT (insn, 16, 4, 4);
1288 f_r2 = EXTRACT_MSB0_UINT (insn, 16, 12, 4);
1290 /* Record the fields for the semantic handler. */
1293 FLD (i_src1) = & CPU (h_gr)[f_r1];
1294 FLD (i_src2) = & CPU (h_gr)[f_r2];
1295 TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_machi", "f_r1 0x%x", 'x', f_r1, "f_r2 0x%x", 'x', f_r2, "src1 0x%x", 'x', f_r1, "src2 0x%x", 'x', f_r2, (char *) 0));
1297 #if WITH_PROFILE_MODEL_P
1298 /* Record the fields for profiling. */
1299 if (PROFILE_MODEL_P (current_cpu))
1301 FLD (in_src1) = f_r1;
1302 FLD (in_src2) = f_r2;
1311 const IDESC *idesc = &m32rbf_insn_data[itype];
1312 CGEN_INSN_INT insn = entire_insn;
1313 #define FLD(f) abuf->fields.sfmt_st_plus.f
1317 f_r1 = EXTRACT_MSB0_UINT (insn, 16, 4, 4);
1318 f_r2 = EXTRACT_MSB0_UINT (insn, 16, 12, 4);
1320 /* Record the fields for the semantic handler. */
1323 FLD (i_src1) = & CPU (h_gr)[f_r1];
1324 FLD (i_src2) = & CPU (h_gr)[f_r2];
1325 TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_mulhi", "f_r1 0x%x", 'x', f_r1, "f_r2 0x%x", 'x', f_r2, "src1 0x%x", 'x', f_r1, "src2 0x%x", 'x', f_r2, (char *) 0));
1327 #if WITH_PROFILE_MODEL_P
1328 /* Record the fields for profiling. */
1329 if (PROFILE_MODEL_P (current_cpu))
1331 FLD (in_src1) = f_r1;
1332 FLD (in_src2) = f_r2;
1341 const IDESC *idesc = &m32rbf_insn_data[itype];
1342 CGEN_INSN_INT insn = entire_insn;
1343 #define FLD(f) abuf->fields.sfmt_ld_plus.f
1347 f_r1 = EXTRACT_MSB0_UINT (insn, 16, 4, 4);
1348 f_r2 = EXTRACT_MSB0_UINT (insn, 16, 12, 4);
1350 /* Record the fields for the semantic handler. */
1353 FLD (i_sr) = & CPU (h_gr)[f_r2];
1354 FLD (i_dr) = & CPU (h_gr)[f_r1];
1355 TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_mv", "f_r2 0x%x", 'x', f_r2, "f_r1 0x%x", 'x', f_r1, "sr 0x%x", 'x', f_r2, "dr 0x%x", 'x', f_r1, (char *) 0));
1357 #if WITH_PROFILE_MODEL_P
1358 /* Record the fields for profiling. */
1359 if (PROFILE_MODEL_P (current_cpu))
1362 FLD (out_dr) = f_r1;
1369 extract_sfmt_mvfachi:
1371 const IDESC *idesc = &m32rbf_insn_data[itype];
1372 CGEN_INSN_INT insn = entire_insn;
1373 #define FLD(f) abuf->fields.sfmt_seth.f
1376 f_r1 = EXTRACT_MSB0_UINT (insn, 16, 4, 4);
1378 /* Record the fields for the semantic handler. */
1380 FLD (i_dr) = & CPU (h_gr)[f_r1];
1381 TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_mvfachi", "f_r1 0x%x", 'x', f_r1, "dr 0x%x", 'x', f_r1, (char *) 0));
1383 #if WITH_PROFILE_MODEL_P
1384 /* Record the fields for profiling. */
1385 if (PROFILE_MODEL_P (current_cpu))
1387 FLD (out_dr) = f_r1;
1396 const IDESC *idesc = &m32rbf_insn_data[itype];
1397 CGEN_INSN_INT insn = entire_insn;
1398 #define FLD(f) abuf->fields.sfmt_ld_plus.f
1402 f_r1 = EXTRACT_MSB0_UINT (insn, 16, 4, 4);
1403 f_r2 = EXTRACT_MSB0_UINT (insn, 16, 12, 4);
1405 /* Record the fields for the semantic handler. */
1408 FLD (i_dr) = & CPU (h_gr)[f_r1];
1409 TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_mvfc", "f_r2 0x%x", 'x', f_r2, "f_r1 0x%x", 'x', f_r1, "dr 0x%x", 'x', f_r1, (char *) 0));
1411 #if WITH_PROFILE_MODEL_P
1412 /* Record the fields for profiling. */
1413 if (PROFILE_MODEL_P (current_cpu))
1415 FLD (out_dr) = f_r1;
1422 extract_sfmt_mvtachi:
1424 const IDESC *idesc = &m32rbf_insn_data[itype];
1425 CGEN_INSN_INT insn = entire_insn;
1426 #define FLD(f) abuf->fields.sfmt_st_plus.f
1429 f_r1 = EXTRACT_MSB0_UINT (insn, 16, 4, 4);
1431 /* Record the fields for the semantic handler. */
1433 FLD (i_src1) = & CPU (h_gr)[f_r1];
1434 TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_mvtachi", "f_r1 0x%x", 'x', f_r1, "src1 0x%x", 'x', f_r1, (char *) 0));
1436 #if WITH_PROFILE_MODEL_P
1437 /* Record the fields for profiling. */
1438 if (PROFILE_MODEL_P (current_cpu))
1440 FLD (in_src1) = f_r1;
1449 const IDESC *idesc = &m32rbf_insn_data[itype];
1450 CGEN_INSN_INT insn = entire_insn;
1451 #define FLD(f) abuf->fields.sfmt_ld_plus.f
1455 f_r1 = EXTRACT_MSB0_UINT (insn, 16, 4, 4);
1456 f_r2 = EXTRACT_MSB0_UINT (insn, 16, 12, 4);
1458 /* Record the fields for the semantic handler. */
1461 FLD (i_sr) = & CPU (h_gr)[f_r2];
1462 TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_mvtc", "f_r2 0x%x", 'x', f_r2, "f_r1 0x%x", 'x', f_r1, "sr 0x%x", 'x', f_r2, (char *) 0));
1464 #if WITH_PROFILE_MODEL_P
1465 /* Record the fields for profiling. */
1466 if (PROFILE_MODEL_P (current_cpu))
1477 const IDESC *idesc = &m32rbf_insn_data[itype];
1478 CGEN_INSN_INT insn = entire_insn;
1479 #define FLD(f) abuf->fields.fmt_empty.f
1482 /* Record the fields for the semantic handler. */
1483 TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_nop", (char *) 0));
1491 const IDESC *idesc = &m32rbf_insn_data[itype];
1492 CGEN_INSN_INT insn = entire_insn;
1493 #define FLD(f) abuf->fields.fmt_empty.f
1496 /* Record the fields for the semantic handler. */
1497 TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_rac", (char *) 0));
1505 const IDESC *idesc = &m32rbf_insn_data[itype];
1506 CGEN_INSN_INT insn = entire_insn;
1507 #define FLD(f) abuf->fields.fmt_empty.f
1510 /* Record the fields for the semantic handler. */
1511 TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_rte", (char *) 0));
1513 #if WITH_PROFILE_MODEL_P
1514 /* Record the fields for profiling. */
1515 if (PROFILE_MODEL_P (current_cpu))
1525 const IDESC *idesc = &m32rbf_insn_data[itype];
1526 CGEN_INSN_INT insn = entire_insn;
1527 #define FLD(f) abuf->fields.sfmt_seth.f
1531 f_r1 = EXTRACT_MSB0_UINT (insn, 32, 4, 4);
1532 f_hi16 = EXTRACT_MSB0_UINT (insn, 32, 16, 16);
1534 /* Record the fields for the semantic handler. */
1535 FLD (f_hi16) = f_hi16;
1537 FLD (i_dr) = & CPU (h_gr)[f_r1];
1538 TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_seth", "f_hi16 0x%x", 'x', f_hi16, "f_r1 0x%x", 'x', f_r1, "dr 0x%x", 'x', f_r1, (char *) 0));
1540 #if WITH_PROFILE_MODEL_P
1541 /* Record the fields for profiling. */
1542 if (PROFILE_MODEL_P (current_cpu))
1544 FLD (out_dr) = f_r1;
1553 const IDESC *idesc = &m32rbf_insn_data[itype];
1554 CGEN_INSN_INT insn = entire_insn;
1555 #define FLD(f) abuf->fields.sfmt_add3.f
1560 f_r1 = EXTRACT_MSB0_UINT (insn, 32, 4, 4);
1561 f_r2 = EXTRACT_MSB0_UINT (insn, 32, 12, 4);
1562 f_simm16 = EXTRACT_MSB0_INT (insn, 32, 16, 16);
1564 /* Record the fields for the semantic handler. */
1565 FLD (f_simm16) = f_simm16;
1568 FLD (i_sr) = & CPU (h_gr)[f_r2];
1569 FLD (i_dr) = & CPU (h_gr)[f_r1];
1570 TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_sll3", "f_simm16 0x%x", 'x', f_simm16, "f_r2 0x%x", 'x', f_r2, "f_r1 0x%x", 'x', f_r1, "sr 0x%x", 'x', f_r2, "dr 0x%x", 'x', f_r1, (char *) 0));
1572 #if WITH_PROFILE_MODEL_P
1573 /* Record the fields for profiling. */
1574 if (PROFILE_MODEL_P (current_cpu))
1577 FLD (out_dr) = f_r1;
1586 const IDESC *idesc = &m32rbf_insn_data[itype];
1587 CGEN_INSN_INT insn = entire_insn;
1588 #define FLD(f) abuf->fields.sfmt_slli.f
1592 f_r1 = EXTRACT_MSB0_UINT (insn, 16, 4, 4);
1593 f_uimm5 = EXTRACT_MSB0_UINT (insn, 16, 11, 5);
1595 /* Record the fields for the semantic handler. */
1597 FLD (f_uimm5) = f_uimm5;
1598 FLD (i_dr) = & CPU (h_gr)[f_r1];
1599 TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_slli", "f_r1 0x%x", 'x', f_r1, "f_uimm5 0x%x", 'x', f_uimm5, "dr 0x%x", 'x', f_r1, (char *) 0));
1601 #if WITH_PROFILE_MODEL_P
1602 /* Record the fields for profiling. */
1603 if (PROFILE_MODEL_P (current_cpu))
1606 FLD (out_dr) = f_r1;
1615 const IDESC *idesc = &m32rbf_insn_data[itype];
1616 CGEN_INSN_INT insn = entire_insn;
1617 #define FLD(f) abuf->fields.sfmt_st_plus.f
1621 f_r1 = EXTRACT_MSB0_UINT (insn, 16, 4, 4);
1622 f_r2 = EXTRACT_MSB0_UINT (insn, 16, 12, 4);
1624 /* Record the fields for the semantic handler. */
1627 FLD (i_src1) = & CPU (h_gr)[f_r1];
1628 FLD (i_src2) = & CPU (h_gr)[f_r2];
1629 TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_st", "f_r1 0x%x", 'x', f_r1, "f_r2 0x%x", 'x', f_r2, "src1 0x%x", 'x', f_r1, "src2 0x%x", 'x', f_r2, (char *) 0));
1631 #if WITH_PROFILE_MODEL_P
1632 /* Record the fields for profiling. */
1633 if (PROFILE_MODEL_P (current_cpu))
1635 FLD (in_src1) = f_r1;
1636 FLD (in_src2) = f_r2;
1645 const IDESC *idesc = &m32rbf_insn_data[itype];
1646 CGEN_INSN_INT insn = entire_insn;
1647 #define FLD(f) abuf->fields.sfmt_st_d.f
1652 f_r1 = EXTRACT_MSB0_UINT (insn, 32, 4, 4);
1653 f_r2 = EXTRACT_MSB0_UINT (insn, 32, 12, 4);
1654 f_simm16 = EXTRACT_MSB0_INT (insn, 32, 16, 16);
1656 /* Record the fields for the semantic handler. */
1657 FLD (f_simm16) = f_simm16;
1660 FLD (i_src1) = & CPU (h_gr)[f_r1];
1661 FLD (i_src2) = & CPU (h_gr)[f_r2];
1662 TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_st_d", "f_simm16 0x%x", 'x', f_simm16, "f_r1 0x%x", 'x', f_r1, "f_r2 0x%x", 'x', f_r2, "src1 0x%x", 'x', f_r1, "src2 0x%x", 'x', f_r2, (char *) 0));
1664 #if WITH_PROFILE_MODEL_P
1665 /* Record the fields for profiling. */
1666 if (PROFILE_MODEL_P (current_cpu))
1668 FLD (in_src1) = f_r1;
1669 FLD (in_src2) = f_r2;
1678 const IDESC *idesc = &m32rbf_insn_data[itype];
1679 CGEN_INSN_INT insn = entire_insn;
1680 #define FLD(f) abuf->fields.sfmt_st_plus.f
1684 f_r1 = EXTRACT_MSB0_UINT (insn, 16, 4, 4);
1685 f_r2 = EXTRACT_MSB0_UINT (insn, 16, 12, 4);
1687 /* Record the fields for the semantic handler. */
1690 FLD (i_src1) = & CPU (h_gr)[f_r1];
1691 FLD (i_src2) = & CPU (h_gr)[f_r2];
1692 TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_stb", "f_r1 0x%x", 'x', f_r1, "f_r2 0x%x", 'x', f_r2, "src1 0x%x", 'x', f_r1, "src2 0x%x", 'x', f_r2, (char *) 0));
1694 #if WITH_PROFILE_MODEL_P
1695 /* Record the fields for profiling. */
1696 if (PROFILE_MODEL_P (current_cpu))
1698 FLD (in_src1) = f_r1;
1699 FLD (in_src2) = f_r2;
1708 const IDESC *idesc = &m32rbf_insn_data[itype];
1709 CGEN_INSN_INT insn = entire_insn;
1710 #define FLD(f) abuf->fields.sfmt_st_d.f
1715 f_r1 = EXTRACT_MSB0_UINT (insn, 32, 4, 4);
1716 f_r2 = EXTRACT_MSB0_UINT (insn, 32, 12, 4);
1717 f_simm16 = EXTRACT_MSB0_INT (insn, 32, 16, 16);
1719 /* Record the fields for the semantic handler. */
1720 FLD (f_simm16) = f_simm16;
1723 FLD (i_src1) = & CPU (h_gr)[f_r1];
1724 FLD (i_src2) = & CPU (h_gr)[f_r2];
1725 TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_stb_d", "f_simm16 0x%x", 'x', f_simm16, "f_r1 0x%x", 'x', f_r1, "f_r2 0x%x", 'x', f_r2, "src1 0x%x", 'x', f_r1, "src2 0x%x", 'x', f_r2, (char *) 0));
1727 #if WITH_PROFILE_MODEL_P
1728 /* Record the fields for profiling. */
1729 if (PROFILE_MODEL_P (current_cpu))
1731 FLD (in_src1) = f_r1;
1732 FLD (in_src2) = f_r2;
1741 const IDESC *idesc = &m32rbf_insn_data[itype];
1742 CGEN_INSN_INT insn = entire_insn;
1743 #define FLD(f) abuf->fields.sfmt_st_plus.f
1747 f_r1 = EXTRACT_MSB0_UINT (insn, 16, 4, 4);
1748 f_r2 = EXTRACT_MSB0_UINT (insn, 16, 12, 4);
1750 /* Record the fields for the semantic handler. */
1753 FLD (i_src1) = & CPU (h_gr)[f_r1];
1754 FLD (i_src2) = & CPU (h_gr)[f_r2];
1755 TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_sth", "f_r1 0x%x", 'x', f_r1, "f_r2 0x%x", 'x', f_r2, "src1 0x%x", 'x', f_r1, "src2 0x%x", 'x', f_r2, (char *) 0));
1757 #if WITH_PROFILE_MODEL_P
1758 /* Record the fields for profiling. */
1759 if (PROFILE_MODEL_P (current_cpu))
1761 FLD (in_src1) = f_r1;
1762 FLD (in_src2) = f_r2;
1771 const IDESC *idesc = &m32rbf_insn_data[itype];
1772 CGEN_INSN_INT insn = entire_insn;
1773 #define FLD(f) abuf->fields.sfmt_st_d.f
1778 f_r1 = EXTRACT_MSB0_UINT (insn, 32, 4, 4);
1779 f_r2 = EXTRACT_MSB0_UINT (insn, 32, 12, 4);
1780 f_simm16 = EXTRACT_MSB0_INT (insn, 32, 16, 16);
1782 /* Record the fields for the semantic handler. */
1783 FLD (f_simm16) = f_simm16;
1786 FLD (i_src1) = & CPU (h_gr)[f_r1];
1787 FLD (i_src2) = & CPU (h_gr)[f_r2];
1788 TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_sth_d", "f_simm16 0x%x", 'x', f_simm16, "f_r1 0x%x", 'x', f_r1, "f_r2 0x%x", 'x', f_r2, "src1 0x%x", 'x', f_r1, "src2 0x%x", 'x', f_r2, (char *) 0));
1790 #if WITH_PROFILE_MODEL_P
1791 /* Record the fields for profiling. */
1792 if (PROFILE_MODEL_P (current_cpu))
1794 FLD (in_src1) = f_r1;
1795 FLD (in_src2) = f_r2;
1802 extract_sfmt_st_plus:
1804 const IDESC *idesc = &m32rbf_insn_data[itype];
1805 CGEN_INSN_INT insn = entire_insn;
1806 #define FLD(f) abuf->fields.sfmt_st_plus.f
1810 f_r1 = EXTRACT_MSB0_UINT (insn, 16, 4, 4);
1811 f_r2 = EXTRACT_MSB0_UINT (insn, 16, 12, 4);
1813 /* Record the fields for the semantic handler. */
1816 FLD (i_src1) = & CPU (h_gr)[f_r1];
1817 FLD (i_src2) = & CPU (h_gr)[f_r2];
1818 TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_st_plus", "f_r1 0x%x", 'x', f_r1, "f_r2 0x%x", 'x', f_r2, "src1 0x%x", 'x', f_r1, "src2 0x%x", 'x', f_r2, (char *) 0));
1820 #if WITH_PROFILE_MODEL_P
1821 /* Record the fields for profiling. */
1822 if (PROFILE_MODEL_P (current_cpu))
1824 FLD (in_src1) = f_r1;
1825 FLD (in_src2) = f_r2;
1826 FLD (out_src2) = f_r2;
1835 const IDESC *idesc = &m32rbf_insn_data[itype];
1836 CGEN_INSN_INT insn = entire_insn;
1837 #define FLD(f) abuf->fields.sfmt_trap.f
1840 f_uimm4 = EXTRACT_MSB0_UINT (insn, 16, 12, 4);
1842 /* Record the fields for the semantic handler. */
1843 FLD (f_uimm4) = f_uimm4;
1844 TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_trap", "f_uimm4 0x%x", 'x', f_uimm4, (char *) 0));
1846 #if WITH_PROFILE_MODEL_P
1847 /* Record the fields for profiling. */
1848 if (PROFILE_MODEL_P (current_cpu))
1856 extract_sfmt_unlock:
1858 const IDESC *idesc = &m32rbf_insn_data[itype];
1859 CGEN_INSN_INT insn = entire_insn;
1860 #define FLD(f) abuf->fields.sfmt_st_plus.f
1864 f_r1 = EXTRACT_MSB0_UINT (insn, 16, 4, 4);
1865 f_r2 = EXTRACT_MSB0_UINT (insn, 16, 12, 4);
1867 /* Record the fields for the semantic handler. */
1870 FLD (i_src1) = & CPU (h_gr)[f_r1];
1871 FLD (i_src2) = & CPU (h_gr)[f_r2];
1872 TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_unlock", "f_r1 0x%x", 'x', f_r1, "f_r2 0x%x", 'x', f_r2, "src1 0x%x", 'x', f_r1, "src2 0x%x", 'x', f_r2, (char *) 0));
1874 #if WITH_PROFILE_MODEL_P
1875 /* Record the fields for profiling. */
1876 if (PROFILE_MODEL_P (current_cpu))
1878 FLD (in_src1) = f_r1;
1879 FLD (in_src2) = f_r2;