* Makefile.in (SIM_EXTRA_DEPS): Add cpu-opc.h.
[platform/upstream/binutils.git] / sim / m32r / Makefile.in
1 # Makefile template for Configure for the m32r simulator
2 # Copyright (C) 1996, 1997, 1998 Free Software Foundation, Inc.
3 # Contributed by Cygnus Support.
4 #
5 # This file is part of GDB, the GNU debugger.
6 #
7 # This program is free software; you can redistribute it and/or modify
8 # it under the terms of the GNU General Public License as published by
9 # the Free Software Foundation; either version 2 of the License, or
10 # (at your option) any later version.
11 #
12 # This program is distributed in the hope that it will be useful,
13 # but WITHOUT ANY WARRANTY; without even the implied warranty of
14 # MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
15 # GNU General Public License for more details.
16 #
17 # You should have received a copy of the GNU General Public License along
18 # with this program; if not, write to the Free Software Foundation, Inc.,
19 # 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
20
21 ## COMMON_PRE_CONFIG_FRAG
22
23 M32R_OBJS = m32r.o cpu.o decode.o extract.o sem.o model.o mloop.o
24 # start-sanitize-m32rx
25 M32RX_OBJS = m32rx.o cpux.o decodex.o semx.o modelx.o mloopx.o
26 # end-sanitize-m32rx
27
28 SIM_OBJS = \
29         $(SIM_NEW_COMMON_OBJS) \
30         sim-engine.o \
31         sim-hload.o \
32         sim-hrw.o \
33         sim-model.o \
34         sim-reason.o \
35         cgen-utils.o cgen-trace.o cgen-scache.o \
36         sim-if.o arch.o \
37         $(start-sanitize-m32rx) \
38         $(M32RX_OBJS) \
39         $(end-sanitize-m32rx) \
40         $(M32R_OBJS)
41
42 # Extra headers included by sim-main.h.
43 SIM_EXTRA_DEPS = \
44         $(srcdir)/../common/cgen-types.h \
45         $(srcdir)/../common/cgen-sim.h \
46         $(srcdir)/../common/cgen-trace.h \
47         arch.h cpuall.h m32r-sim.h cpu-opc.h
48
49 SIM_EXTRA_CFLAGS =
50
51 SIM_RUN_OBJS = nrun.o
52 SIM_EXTRA_CLEAN = m32r-clean
53
54 # This selects the m32r newlib/libgloss syscall definitions.
55 NL_TARGET = -DNL_TARGET_m32r
56
57 ## COMMON_POST_CONFIG_FRAG
58
59 arch = m32r
60
61 MAIN_INCLUDE_DEPS = \
62         sim-main.h \
63         $(srcdir)/../common/sim-config.h \
64         $(srcdir)/../common/sim-base.h \
65         $(srcdir)/../common/sim-basics.h \
66         $(srcdir)/../common/sim-module.h \
67         $(srcdir)/../common/sim-trace.h \
68         $(srcdir)/../common/sim-profile.h \
69         tconfig.h
70 INCLUDE_DEPS = $(MAIN_INCLUDE_DEPS) $(SIM_EXTRA_DEPS) cpu-sim.h
71 OPS_INCLUDE_DEPS = \
72         $(srcdir)/../common/cgen-mem.h \
73         $(srcdir)/../common/cgen-ops.h
74
75 sim-if.o: sim-if.c $(INCLUDE_DEPS) $(srcdir)/../common/sim-core.h
76
77 arch.o: arch.c $(INCLUDE_DEPS)
78
79 # M32R objs
80
81 m32r.o: m32r.c $(INCLUDE_DEPS) $(OPS_INCLUDE_DEPS) cpu.h
82
83 # FIXME: Use of `mono' is wip.
84 mloop.c: $(srcdir)/../common/genmloop.sh mloop.in Makefile
85         rm -f mloop.c
86         $(SHELL) $(srcdir)/../common/genmloop.sh $(SHELL) \
87                 -mono -scache -fast m32r $(srcdir)/mloop.in \
88                 | sed -e 's/@cpu@/m32r/' -e 's/@CPU@/M32R/' >mloop.c
89 mloop.o: mloop.c sem-switch.c $(INCLUDE_DEPS) $(OPS_INCLUDE_DEPS) cpu.h
90
91 cpu.o: cpu.c $(INCLUDE_DEPS) $(OPS_INCLUDE_DEPS) cpu.h
92 decode.o: decode.c decode.h $(INCLUDE_DEPS) $(OPS_INCLUDE_DEPS) cpu.h
93 extract.o: extract.c decode.h $(INCLUDE_DEPS) $(OPS_INCLUDE_DEPS) cpu.h
94         $(CC) -c $(srcdir)/extract.c $(ALL_CFLAGS) -DSCACHE_P
95 sem.o: sem.c decode.h $(INCLUDE_DEPS) $(OPS_INCLUDE_DEPS) cpu.h
96         $(CC) -c $(srcdir)/sem.c $(ALL_CFLAGS) -DSCACHE_P
97 model.o: model.c $(INCLUDE_DEPS) cpu.h
98
99 #sem-cache.o: sem.c decode.h $(INCLUDE_DEPS) $(OPS_INCLUDE_DEPS) cpu.h
100 #       $(CC) -c $(srcdir)/sem.c -o sem-cache.o -DSCACHE_P $(ALL_CFLAGS)
101
102 # start-sanitize-m32rx
103 # M32RX objs
104
105 m32rx.o: m32rx.c $(INCLUDE_DEPS) $(OPS_INCLUDE_DEPS) cpux.h
106
107 # FIXME: Use of `mono' is wip.
108 mloopx.c: $(srcdir)/../common/genmloop.sh mloopx.in Makefile
109         rm -f mloopx.c
110         $(SHELL) $(srcdir)/../common/genmloop.sh $(SHELL) \
111                 -mono -no-scache -no-fast -parallel \
112                 m32r $(srcdir)/mloopx.in \
113                 | sed -e 's/@cpu@/m32rx/' -e 's/@CPU@/M32RX/' >mloopx.c
114 mloopx.o: mloopx.c readx.c $(INCLUDE_DEPS) $(OPS_INCLUDE_DEPS) cpux.h
115
116 cpux.o: cpux.c $(INCLUDE_DEPS) $(OPS_INCLUDE_DEPS) cpux.h
117 decodex.o: decodex.c decodex.h $(INCLUDE_DEPS) $(OPS_INCLUDE_DEPS) cpux.h
118 semx.o: semx.c decodex.h $(INCLUDE_DEPS) $(OPS_INCLUDE_DEPS) cpux.h
119 modelx.o: modelx.c $(INCLUDE_DEPS) cpux.h
120 # end-sanitize-m32rx
121
122 m32r-clean:
123         rm -f mloop.c stamp-arch stamp-cpu stamp-decode
124 # start-sanitize-m32rx
125         rm -f mloopx.c stamp-xcpu stamp-xdecode
126 # end-sanitize-m32rx
127         rm -f tmp-*
128
129 # start-sanitize-cygnus
130 # cgen support
131 # For now, require developers to configure with --enable-maintainer-mode.
132 # ??? Do we need to use a different option?
133
134 stamp-arch: $(CGEN_MAIN_SCM) $(srccgen)/m32r.cpu
135         $(MAKE) cgen-arch
136         touch stamp-arch
137 arch.h arch.c cpuall.h: @MAINT@ stamp-arch
138         @true
139
140 stamp-cpu: $(CGEN_MAIN_SCM) $(CGEN_CPU_SCM) $(srccgen)/m32r.cpu
141         $(MAKE) cgen-cpu cpu=m32r mach=m32r SUFFIX= FLAGS="with-scache,with-profile fn" EXTRAFILES="$(CGEN_CPU_EXTR) $(CGEN_CPU_SEM) $(CGEN_CPU_SEMSW)"
142         touch stamp-cpu
143 cpu.h extract.c sem.c sem-switch.c model.c: @MAINT@ stamp-cpu
144         @true
145
146 stamp-decode: $(CGEN_MAIN_SCM) $(CGEN_DECODE_SCM) $(srccgen)/m32r.cpu
147         $(MAKE) cgen-decode cpu=m32r mach=m32r SUFFIX= FLAGS="with-scache,with-profile fn"
148         touch stamp-decode
149 decode.h decode.c: @MAINT@ stamp-decode
150         @true
151 # start-sanitize-cygnus
152
153 # start-sanitize-m32rx
154 stamp-xcpu: $(CGEN_MAIN_SCM) $(CGEN_CPU_SCM) $(srccgen)/m32r.cpu
155         $(MAKE) cgen-cpu cpu=m32rx mach=m32rx SUFFIX=x FLAGS="" EXTRAFILES="$(CGEN_CPU_READ) $(CGEN_CPU_SEM)"
156         touch stamp-xcpu
157 cpux.h readx.c semx.c modelx.c: @MAINT@ stamp-xcpu
158         @true
159
160 stamp-xdecode: $(CGEN_MAIN_SCM) $(CGEN_DECODE_SCM) $(srccgen)/m32r.cpu
161         $(MAKE) cgen-decode cpu=m32rx mach=m32rx SUFFIX=x
162         touch stamp-xdecode
163 decodex.h decodex.c: @MAINT@ stamp-xdecode
164         @true
165 # end-sanitize-m32rx