1 2005-02-21 Corinna Vinschen <vinschen@redhat.com>
3 * iq2000.c: Eliminate need to include gdb/sim-iq2000.h.
5 2005-02-18 Corinna Vinschen <vinschen@redhat.com>
7 * configure.ac: Rename from configure.in and pull up to autoconf 2.59.
8 * configure: Regenerate.
10 2002-03-18 Jeff Johnston <jjohnstn@redhat.com>
12 * sem-switch.c: Regenerated.
15 2002-01-28 Jeff Johnston <jjohnstn@redhat.com>
17 * arch.c: Regenerated.
25 * sem-switch.c: Ditto.
28 2001-11-16 Jeff Johnston <jjohnstn@redhat.com>
30 * decode.c: Regenerated after putting orui into machine-specific
34 * sem-switch.c: Ditto.
37 2001-11-13 Jeff Johnston <jjohnstn@redhat.com>
39 * cpu.h: Regenerated after changing jump and branch operands
40 so that no bit masking is performed.
42 * iq2000.c (get_h_pc): Change to return h_pc directly.
43 (set_h_pc): Change to always set the insn mask bit.
44 * sim-if.c (iq2000bf_disassemble_insn): Change to pass the
46 (sim_create_inferior): Changed so starting address is taken
47 directly from link. If not specified, start address is
48 0 with insn mask set on.
50 2001-11-08 Jeff Johnston <jjohnstn@redhat.com>
52 * cpu.h: Regenerated after making jump operand UINT.
55 2001-10-31 Jeff Johnston <jjohnstn@redhat.com>
57 * sem-switch.c: Regenerated after fixing lb, lbu, lh, lw,
58 sb, sh, and sw insns handling of offset operand.
61 2001-10-30 Jeff Johnston <jjohnstn@redhat.com>
66 * sem-switch.c: Ditto.
68 * iq2000.c (get_h_pc): New routine.
70 (fetch_str): Translate cpu data addresses to data area.
72 (iq2000bf_fetch_register): Use get_h_pc.
73 (iq2000bf_store_register): Use set_h_pc.
74 * mloop.in: Change all calls to GETIMEMxxx to use CPU2INSN
75 on the pc value passed first.
76 * sim-if.c (iq2000bf_disassemble_insn): New function.
77 (sim_open): Add extra memory region for insn memory vs data memory.
78 Also change disassembler to be iq2000bf_disassemble_insn.
79 (sim_create_inferior): Translate start address using INSN2CPU macro.
80 * sim-main.h (CPU2INSN, CPU2DATA, INSN2CPU, DATA2CPU): New macros
81 to translate between Harvard and cpu addresses.
83 2001-10-26 Jeff Johnston <jjohnstn@redhat.com>
85 * sem-switch.c: Regenerated after reverting addiu
89 2001-10-25 Jeff Johnston <jjohnstn@redhat.com>
91 * Makefile.in: Add -UHAVE_CPU_IQ10 for time-being until
92 iq10 simulator merged here.
93 * cpu.h: Regenerated after fixing addiu insn.
98 * sem-switch.c: Ditto.
101 2001-09-12 Stan Cox <scox@redhat.com>
103 * iq2000/{cpu.c, cpu.h, decode.c, decode.h, model.c, sem-switch.c,
105 * iq2000.c (do_syscall): Support system traps.
107 2001-07-05 Ben Elliston <bje@redhat.com>
109 * Makefile.in (stamp-arch): Use $(CGEN_CPU_DIR).
110 (stamp-cpu): Likewise.
112 2001-04-02 Ben Elliston <bje@redhat.com>
114 * arch.c, arch.h: Regnerate to track recent cgen improvements.
115 * cpu.c, cpu.h, cpuall.h, decode.c, decode.h: Likewise.
116 * model.c, sem-switch.c, sem.c: Likewise.
118 2001-01-22 Ben Elliston <bje@redhat.com>
120 * cpu.h, decode.c, decode.h, model.c: Regenerate.
121 * sem.c, sem-switch.c: Likewise.
123 * arch.c, arch.h, cpu.c, cpu.h, cpuall.h: Regenerate.
124 * decode.c, decode.h, model.c, sem.c, sem-switch.c: Likewise.
126 2000-07-05 Ben Elliston <bje@redhat.com>
128 * configure: Regenerated to track ../common/aclocal.m4 changes.
130 2000-07-04 Ben Elliston <bje@redhat.com>
132 * sem.c, sem-switch.c: Regenerate.
134 * iq2000.c (do_break): Use sim_engine_halt ().
135 * arch.c, decode.c, decode.h, sem.c, sem-switch.c: Regenerate.
137 2000-07-03 Ben Elliston <bje@redhat.com>
139 * iq2000.c (do_syscall): Examine syscall register (nominally %11).
140 (do_break): Handle breakpoints.
141 * tconfig.in (SIM_HAVE_BREAKPOINTS): Define.
142 (SIM_BREAKPOINT, SIM_BREAKPOINT_SIZE): Likewise.
144 2000-06-29 Andrew Cagney <cagney@redhat.com>
146 * iq2000.c (iq2000bf_fetch_register): Implement.
147 (iq2000bf_store_register): Ditto.
149 2000-05-17 Ben Elliston <bje@redhat.com>
151 * mloop.in (extract-simple, extract-scache): Use SEM_SKIP_COMPILE
152 to set the skip count for the (skip ..) rtx.
153 (extract-pbb): Likewise.
154 (extract-pbb): Include the delay slot instruction of all CTI
155 instructions in the pbb, not just those that may nullify their
156 delay slot (eg. likely branches).
158 * sem.c, sem-switch.c: Regenerate.
160 2000-05-16 Ben Elliston <bje@redhat.com>
162 * arch.c, cpu.c, cpu.h, decode.c, decode.h: Regenerate.
163 * sem.c, sem-switch.c: Likewise.
164 * mloop.in (extract-pbb): Prohibit branch instructions in the
165 delay slot of branch likely instructions.
167 2000-05-16 Ben Elliston <bje@redhat.com>
169 * Makefile.in: New file.
170 * configure.in: Ditto.
172 * config.in, configure: Generate.
173 * arch.c, arch.h, cpu.c, cpu.h, cpuall.h: Ditto.
174 * decode.c, decode.h: Ditto.
175 * model.c, sem-switch.c, sem.c: Ditto.
176 * mloop.in: New file.
178 * iq2000-sim.h: Ditto.