sim/iq2000/ChangeLog

   1 2006-06-05  Daniel Jacobowitz  <dan@codesourcery.com>
   2
   3         * configure: Regenerated.
   4
   5 2006-05-31  Daniel Jacobowitz  <dan@codesourcery.com>
   6
   7         * configure: Regenerated.
   8
   9 2005-03-23  Mark Kettenis  <kettenis@gnu.org>
  10
  11         * configure: Regenerate.
  12
  13 2005-02-21  Corinna Vinschen  <vinschen@redhat.com>
  14
  15         * iq2000.c: Eliminate need to include gdb/sim-iq2000.h.
  16
  17 2005-02-18  Corinna Vinschen  <vinschen@redhat.com>
  18
  19         * configure.ac: Rename from configure.in and pull up to autoconf 2.59.
  20         * configure: Regenerate.
  21
  22 2002-03-18  Jeff Johnston  <jjohnstn@redhat.com>
  23
  24         * sem-switch.c: Regenerated.
  25         * sem.c: Ditto.
  26
  27 2002-01-28  Jeff Johnston  <jjohnstn@redhat.com>
  28
  29         * arch.c: Regenerated.
  30         * arch.h: Ditto.
  31         * cpu.c: Ditto.
  32         * cpu.h: Ditto.
  33         * cpuall.h: Ditto.
  34         * decode.c: Ditto.
  35         * decode.h: Ditto.
  36         * model.c: Ditto.
  37         * sem-switch.c: Ditto.
  38         * sem.c: Ditto.
  39
  40 2001-11-16  Jeff Johnston  <jjohnstn@redhat.com>
  41
  42         * decode.c: Regenerated after putting orui into machine-specific
  43         files.
  44         * decode.h: Ditto.
  45         * model.c: Ditto.
  46         * sem-switch.c: Ditto.
  47         * sem.c: Ditto.
  48
  49 2001-11-13  Jeff Johnston  <jjohnstn@redhat.com>
  50
  51         * cpu.h: Regenerated after changing jump and branch operands
  52         so that no bit masking is performed.
  53         * decode.c: Ditto.
  54         * iq2000.c (get_h_pc): Change to return h_pc directly.
  55         (set_h_pc): Change to always set the insn mask bit.
  56         * sim-if.c (iq2000bf_disassemble_insn): Change to pass the
  57         pc untouched.
  58         (sim_create_inferior): Changed so starting address is taken
  59         directly from link.  If not specified, start address is
  60         0 with insn mask set on.
  61
  62 2001-11-08  Jeff Johnston  <jjohnstn@redhat.com>
  63
  64         * cpu.h: Regenerated after making jump operand UINT.
  65         * decode.c: Ditto.
  66
  67 2001-10-31  Jeff Johnston  <jjohnstn@redhat.com>
  68
  69         * sem-switch.c: Regenerated after fixing lb, lbu, lh, lw,
  70         sb, sh, and sw insns handling of offset operand.
  71         * sem.c: Ditto.
  72
  73 2001-10-30  Jeff Johnston  <jjohnstn@redhat.com>
  74
  75         * cpu.c: Regenerated.
  76         * cpu.h: Ditto.
  77         * decode.c: Ditto.
  78         * sem-switch.c: Ditto.
  79         * sem.c: Ditto.
  80         * iq2000.c (get_h_pc): New routine.
  81         (set_h_pc): Ditto.
  82         (fetch_str): Translate cpu data addresses to data area.
  83         (do_syscall): Ditto.
  84         (iq2000bf_fetch_register): Use get_h_pc.
  85         (iq2000bf_store_register): Use set_h_pc.
  86         * mloop.in: Change all calls to GETIMEMxxx to use CPU2INSN
  87         on the pc value passed first.
  88         * sim-if.c (iq2000bf_disassemble_insn): New function.
  89         (sim_open): Add extra memory region for insn memory vs data memory.
  90         Also change disassembler to be iq2000bf_disassemble_insn.
  91         (sim_create_inferior): Translate start address using INSN2CPU macro.
  92         * sim-main.h (CPU2INSN, CPU2DATA, INSN2CPU, DATA2CPU): New macros
  93         to translate between Harvard and cpu addresses.
  94
  95 2001-10-26  Jeff Johnston  <jjohnstn@redhat.com>
  96
  97         * sem-switch.c: Regenerated after reverting addiu
  98         change.
  99         * sem.c: Ditto.
 100
 101 2001-10-25  Jeff Johnston  <jjohnstn@redhat.com>
 102
 103         * Makefile.in: Add -UHAVE_CPU_IQ10 for time-being until
 104         iq10 simulator merged here.
 105         * cpu.h: Regenerated after fixing addiu insn.
 106         * cpuall.h: Ditto.
 107         * decode.c: Ditto.
 108         * decode.h: Ditto.
 109         * model.c: Ditto.
 110         * sem-switch.c: Ditto.
 111         * sem.c: Ditto.
 112
 113 2001-09-12  Stan Cox  <scox@redhat.com>
 114
 115         * iq2000/{cpu.c, cpu.h, decode.c, decode.h, model.c, sem-switch.c,
 116         sem.c}: Regen'd.
 117         * iq2000.c (do_syscall): Support system traps.
 118
 119 2001-07-05  Ben Elliston  <bje@redhat.com>
 120
 121         * Makefile.in (stamp-arch): Use $(CGEN_CPU_DIR).
 122         (stamp-cpu): Likewise.
 123
 124 2001-04-02  Ben Elliston  <bje@redhat.com>
 125
 126         * arch.c, arch.h: Regnerate to track recent cgen improvements.
 127         * cpu.c, cpu.h, cpuall.h, decode.c, decode.h: Likewise.
 128         * model.c, sem-switch.c, sem.c: Likewise.
 129
 130 2001-01-22  Ben Elliston  <bje@redhat.com>
 131
 132         * cpu.h, decode.c, decode.h, model.c: Regenerate.
 133         * sem.c, sem-switch.c: Likewise.
 134
 135         * arch.c, arch.h, cpu.c, cpu.h, cpuall.h: Regenerate.
 136         * decode.c, decode.h, model.c, sem.c, sem-switch.c: Likewise.
 137
 138 2000-07-05  Ben Elliston  <bje@redhat.com>
 139
 140         * configure: Regenerated to track ../common/aclocal.m4 changes.
 141
 142 2000-07-04  Ben Elliston  <bje@redhat.com>
 143
 144         * sem.c, sem-switch.c: Regenerate.
 145
 146         * iq2000.c (do_break): Use sim_engine_halt ().
 147         * arch.c, decode.c, decode.h, sem.c, sem-switch.c: Regenerate.
 148
 149 2000-07-03  Ben Elliston  <bje@redhat.com>
 150
 151         * iq2000.c (do_syscall): Examine syscall register (nominally %11).
 152         (do_break): Handle breakpoints.
 153         * tconfig.in (SIM_HAVE_BREAKPOINTS): Define.
 154         (SIM_BREAKPOINT, SIM_BREAKPOINT_SIZE): Likewise.
 155
 156 2000-06-29  Andrew Cagney  <cagney@redhat.com>
 157
 158         * iq2000.c (iq2000bf_fetch_register): Implement.
 159         (iq2000bf_store_register): Ditto.
 160
 161 2000-05-17  Ben Elliston  <bje@redhat.com>
 162
 163         * mloop.in (extract-simple, extract-scache): Use SEM_SKIP_COMPILE
 164         to set the skip count for the (skip ..) rtx.
 165         (extract-pbb): Likewise.
 166         (extract-pbb): Include the delay slot instruction of all CTI
 167         instructions in the pbb, not just those that may nullify their
 168         delay slot (eg. likely branches).
 169
 170         * sem.c, sem-switch.c: Regenerate.
 171
 172 2000-05-16  Ben Elliston  <bje@redhat.com>
 173
 174         * arch.c, cpu.c, cpu.h, decode.c, decode.h: Regenerate.
 175         * sem.c, sem-switch.c: Likewise.
 176         * mloop.in (extract-pbb): Prohibit branch instructions in the
 177         delay slot of branch likely instructions.
 178
 179 2000-05-16  Ben Elliston  <bje@redhat.com>
 180
 181         * Makefile.in: New file.
 182         * configure.in: Ditto.
 183         * acconfig.h: Ditto.
 184         * config.in, configure: Generate.
 185         * arch.c, arch.h, cpu.c, cpu.h, cpuall.h: Ditto.
 186         * decode.c, decode.h: Ditto.
 187         * model.c, sem-switch.c, sem.c: Ditto.
 188         * mloop.in: New file.
 189         * iq2000.c: Ditto.
 190         * iq2000-sim.h: Ditto.
 191         * sim-if.c: Ditto.
 192         * sim-main.h: Ditto.
 193         * tconfig.in: Ditto