sim/iq2000/ChangeLog

   1 2006-05-31  Daniel Jacobowitz  <dan@codesourcery.com>
   2
   3         * configure: Regenerated.
   4
   5 2005-03-23  Mark Kettenis  <kettenis@gnu.org>
   6
   7         * configure: Regenerate.
   8
   9 2005-02-21  Corinna Vinschen  <vinschen@redhat.com>
  10
  11         * iq2000.c: Eliminate need to include gdb/sim-iq2000.h.
  12
  13 2005-02-18  Corinna Vinschen  <vinschen@redhat.com>
  14
  15         * configure.ac: Rename from configure.in and pull up to autoconf 2.59.
  16         * configure: Regenerate.
  17
  18 2002-03-18  Jeff Johnston  <jjohnstn@redhat.com>
  19
  20         * sem-switch.c: Regenerated.
  21         * sem.c: Ditto.
  22
  23 2002-01-28  Jeff Johnston  <jjohnstn@redhat.com>
  24
  25         * arch.c: Regenerated.
  26         * arch.h: Ditto.
  27         * cpu.c: Ditto.
  28         * cpu.h: Ditto.
  29         * cpuall.h: Ditto.
  30         * decode.c: Ditto.
  31         * decode.h: Ditto.
  32         * model.c: Ditto.
  33         * sem-switch.c: Ditto.
  34         * sem.c: Ditto.
  35
  36 2001-11-16  Jeff Johnston  <jjohnstn@redhat.com>
  37
  38         * decode.c: Regenerated after putting orui into machine-specific
  39         files.
  40         * decode.h: Ditto.
  41         * model.c: Ditto.
  42         * sem-switch.c: Ditto.
  43         * sem.c: Ditto.
  44
  45 2001-11-13  Jeff Johnston  <jjohnstn@redhat.com>
  46
  47         * cpu.h: Regenerated after changing jump and branch operands
  48         so that no bit masking is performed.
  49         * decode.c: Ditto.
  50         * iq2000.c (get_h_pc): Change to return h_pc directly.
  51         (set_h_pc): Change to always set the insn mask bit.
  52         * sim-if.c (iq2000bf_disassemble_insn): Change to pass the
  53         pc untouched.
  54         (sim_create_inferior): Changed so starting address is taken
  55         directly from link.  If not specified, start address is
  56         0 with insn mask set on.
  57
  58 2001-11-08  Jeff Johnston  <jjohnstn@redhat.com>
  59
  60         * cpu.h: Regenerated after making jump operand UINT.
  61         * decode.c: Ditto.
  62
  63 2001-10-31  Jeff Johnston  <jjohnstn@redhat.com>
  64
  65         * sem-switch.c: Regenerated after fixing lb, lbu, lh, lw,
  66         sb, sh, and sw insns handling of offset operand.
  67         * sem.c: Ditto.
  68
  69 2001-10-30  Jeff Johnston  <jjohnstn@redhat.com>
  70
  71         * cpu.c: Regenerated.
  72         * cpu.h: Ditto.
  73         * decode.c: Ditto.
  74         * sem-switch.c: Ditto.
  75         * sem.c: Ditto.
  76         * iq2000.c (get_h_pc): New routine.
  77         (set_h_pc): Ditto.
  78         (fetch_str): Translate cpu data addresses to data area.
  79         (do_syscall): Ditto.
  80         (iq2000bf_fetch_register): Use get_h_pc.
  81         (iq2000bf_store_register): Use set_h_pc.
  82         * mloop.in: Change all calls to GETIMEMxxx to use CPU2INSN
  83         on the pc value passed first.
  84         * sim-if.c (iq2000bf_disassemble_insn): New function.
  85         (sim_open): Add extra memory region for insn memory vs data memory.
  86         Also change disassembler to be iq2000bf_disassemble_insn.
  87         (sim_create_inferior): Translate start address using INSN2CPU macro.
  88         * sim-main.h (CPU2INSN, CPU2DATA, INSN2CPU, DATA2CPU): New macros
  89         to translate between Harvard and cpu addresses.
  90
  91 2001-10-26  Jeff Johnston  <jjohnstn@redhat.com>
  92
  93         * sem-switch.c: Regenerated after reverting addiu
  94         change.
  95         * sem.c: Ditto.
  96
  97 2001-10-25  Jeff Johnston  <jjohnstn@redhat.com>
  98
  99         * Makefile.in: Add -UHAVE_CPU_IQ10 for time-being until
 100         iq10 simulator merged here.
 101         * cpu.h: Regenerated after fixing addiu insn.
 102         * cpuall.h: Ditto.
 103         * decode.c: Ditto.
 104         * decode.h: Ditto.
 105         * model.c: Ditto.
 106         * sem-switch.c: Ditto.
 107         * sem.c: Ditto.
 108
 109 2001-09-12  Stan Cox  <scox@redhat.com>
 110
 111         * iq2000/{cpu.c, cpu.h, decode.c, decode.h, model.c, sem-switch.c,
 112         sem.c}: Regen'd.
 113         * iq2000.c (do_syscall): Support system traps.
 114
 115 2001-07-05  Ben Elliston  <bje@redhat.com>
 116
 117         * Makefile.in (stamp-arch): Use $(CGEN_CPU_DIR).
 118         (stamp-cpu): Likewise.
 119
 120 2001-04-02  Ben Elliston  <bje@redhat.com>
 121
 122         * arch.c, arch.h: Regnerate to track recent cgen improvements.
 123         * cpu.c, cpu.h, cpuall.h, decode.c, decode.h: Likewise.
 124         * model.c, sem-switch.c, sem.c: Likewise.
 125
 126 2001-01-22  Ben Elliston  <bje@redhat.com>
 127
 128         * cpu.h, decode.c, decode.h, model.c: Regenerate.
 129         * sem.c, sem-switch.c: Likewise.
 130
 131         * arch.c, arch.h, cpu.c, cpu.h, cpuall.h: Regenerate.
 132         * decode.c, decode.h, model.c, sem.c, sem-switch.c: Likewise.
 133
 134 2000-07-05  Ben Elliston  <bje@redhat.com>
 135
 136         * configure: Regenerated to track ../common/aclocal.m4 changes.
 137
 138 2000-07-04  Ben Elliston  <bje@redhat.com>
 139
 140         * sem.c, sem-switch.c: Regenerate.
 141
 142         * iq2000.c (do_break): Use sim_engine_halt ().
 143         * arch.c, decode.c, decode.h, sem.c, sem-switch.c: Regenerate.
 144
 145 2000-07-03  Ben Elliston  <bje@redhat.com>
 146
 147         * iq2000.c (do_syscall): Examine syscall register (nominally %11).
 148         (do_break): Handle breakpoints.
 149         * tconfig.in (SIM_HAVE_BREAKPOINTS): Define.
 150         (SIM_BREAKPOINT, SIM_BREAKPOINT_SIZE): Likewise.
 151
 152 2000-06-29  Andrew Cagney  <cagney@redhat.com>
 153
 154         * iq2000.c (iq2000bf_fetch_register): Implement.
 155         (iq2000bf_store_register): Ditto.
 156
 157 2000-05-17  Ben Elliston  <bje@redhat.com>
 158
 159         * mloop.in (extract-simple, extract-scache): Use SEM_SKIP_COMPILE
 160         to set the skip count for the (skip ..) rtx.
 161         (extract-pbb): Likewise.
 162         (extract-pbb): Include the delay slot instruction of all CTI
 163         instructions in the pbb, not just those that may nullify their
 164         delay slot (eg. likely branches).
 165
 166         * sem.c, sem-switch.c: Regenerate.
 167
 168 2000-05-16  Ben Elliston  <bje@redhat.com>
 169
 170         * arch.c, cpu.c, cpu.h, decode.c, decode.h: Regenerate.
 171         * sem.c, sem-switch.c: Likewise.
 172         * mloop.in (extract-pbb): Prohibit branch instructions in the
 173         delay slot of branch likely instructions.
 174
 175 2000-05-16  Ben Elliston  <bje@redhat.com>
 176
 177         * Makefile.in: New file.
 178         * configure.in: Ditto.
 179         * acconfig.h: Ditto.
 180         * config.in, configure: Generate.
 181         * arch.c, arch.h, cpu.c, cpu.h, cpuall.h: Ditto.
 182         * decode.c, decode.h: Ditto.
 183         * model.c, sem-switch.c, sem.c: Ditto.
 184         * mloop.in: New file.
 185         * iq2000.c: Ditto.
 186         * iq2000-sim.h: Ditto.
 187         * sim-if.c: Ditto.
 188         * sim-main.h: Ditto.
 189         * tconfig.in: Ditto