1 /* The IGEN simulator generator for GDB, the GNU Debugger.
3 Copyright 2002 Free Software Foundation, Inc.
5 Contributed by Andrew Cagney.
7 This file is part of GDB.
9 This program is free software; you can redistribute it and/or modify
10 it under the terms of the GNU General Public License as published by
11 the Free Software Foundation; either version 2 of the License, or
12 (at your option) any later version.
14 This program is distributed in the hope that it will be useful,
15 but WITHOUT ANY WARRANTY; without even the implied warranty of
16 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 GNU General Public License for more details.
19 You should have received a copy of the GNU General Public License
20 along with this program; if not, write to the Free Software
21 Foundation, Inc., 59 Temple Place - Suite 330,
22 Boston, MA 02111-1307, USA. */
26 typedef unsigned64 insn_uint;
29 /* Common among most entries:
31 All non instruction records have the format:
42 record_type_field = 1,
43 old_record_type_field = 2,
44 record_filter_flags_field = 2,
45 record_filter_models_field = 3,
51 Include the specified file.
64 include_filename_field = 4,
72 Valid options are: hi-bit-nr (default 0), insn-bit-size (default
73 32), insn-specifying-widths (default true), multi-sim (default false).
86 | "insn-specifying-widths"
102 These update the global options structure. */
106 option_name_field = 4,
113 /* Macro definitions:
126 [ <name> { "," <arg-list> } ]
133 macro_name_field = 4,
141 /* Functions and internal routins:
143 NB: <filter-models> and <function-models> are equivalent.
162 "*" [ <processor-list> ]
172 [ ":" <parameter-list> ]
181 function_typedef_field = 4,
183 function_param_field,
188 function_model_name_field = 0,
189 nr_function_model_fields = 1,
193 old_function_typedef_field = 0,
194 old_function_type_field = 2,
195 old_function_name_field = 4,
196 old_function_param_field = 5,
197 nr_old_function_fields = 5, /* parameter-list is optional */
201 typedef struct _function_entry function_entry;
202 struct _function_entry {
211 function_entry *next;
215 typedef void function_entry_handler
217 function_entry *function,
220 extern void function_entry_traverse
222 function_entry *functions,
223 function_entry_handler *handler,
235 ":" <field-name> { "," <field-name> }
240 <cache-macro-type> ::=
248 | <ident> "_is_" <integer>
251 A cache entry is defined (for an instruction) when all
252 <field-name>s are present as named opcode fields within the
255 SCRATCH and CACHE macros are defined during the cache fill stage
256 while CACHE and COMPUTE macros are defined during the instruction
262 cache_typedef_field = 4,
264 cache_original_fields_field,
265 cache_expression_field,
275 typedef struct _cache_entry cache_entry;
276 struct _cache_entry {
280 cache_entry_type entry_type;
282 filter *original_fields;
292 <model-processor> ::=
298 ":" <function-unit-data>
336 nr_model_macro_fields = 4,
337 nr_model_data_fields = 4,
338 nr_model_static_fields = nr_function_fields,
339 nr_model_internal_fields = nr_function_fields,
340 nr_model_function_fields = nr_function_fields,
343 typedef struct _model_data model_data;
353 model_name_field = 4,
354 model_full_name_field,
355 model_unit_data_field,
356 nr_model_processor_fields,
359 typedef struct _model_entry model_entry;
360 struct _model_entry {
370 typedef struct _model_table model_table;
371 struct _model_table {
377 function_entry *statics;
378 function_entry *internals;
379 function_entry *functions;
384 /* Instruction format:
386 An instruction is composed of a sequence of N bit instruction
387 words. Each word broken into a number of instruction fields.
388 Those fields being constant (ex. an opcode) or variable (register
392 <insn-field> { "," <insn-field> } ;
395 ( <binary-value-implying-width>
396 | <field-name-implying-width>
397 | [ <start-or-width> "." ] <field>
399 { [ "!" | "=" ] [ <value> | <field-name> ] }
407 | "0b" <binary-value>
413 typedef enum _insn_field_cond_type {
414 insn_field_cond_value,
415 insn_field_cond_field,
416 } insn_field_cond_type;
417 typedef enum _insn_field_cond_test {
420 } insn_field_cond_test;
421 typedef struct _insn_field_cond insn_field_cond;
422 struct _insn_field_cond {
423 insn_field_cond_type type;
424 insn_field_cond_test test;
426 struct _insn_field_entry *field;
428 insn_field_cond *next;
432 typedef enum _insn_field_type {
440 typedef struct _insn_field_entry insn_field_entry;
441 struct _insn_field_entry {
446 insn_field_type type;
450 insn_field_cond *conditions;
451 insn_field_entry *next;
452 insn_field_entry *prev;
455 typedef struct _insn_bit_entry insn_bit_entry;
456 struct _insn_bit_entry {
459 insn_field_entry *field;
465 typedef struct _insn_entry insn_entry; /* forward */
467 typedef struct _insn_word_entry insn_word_entry;
468 struct _insn_word_entry {
469 /* list of sub-fields making up the instruction. bit provides
470 faster access to the field data for bit N. */
471 insn_field_entry *first;
472 insn_field_entry *last;
473 insn_bit_entry *bit[max_insn_bit_size];
474 /* set of all the string fields */
476 /* For multi-word instructions, The Nth word (from zero). */
477 insn_word_entry *next;
482 /* Instruction model:
484 Provides scheduling and other data for the code modeling the
488 "*" [ <processor-list> ]
489 ":" [ <function-unit-data> ]
494 <processor> { "," <processor>" }
497 If the <processor-list> is empty, the model is made the default for
503 insn_model_name_field = 0,
504 insn_model_unit_data_field = 1,
505 nr_insn_model_fields = 1,
508 typedef struct _insn_model_entry insn_model_entry;
509 struct _insn_model_entry {
515 insn_model_entry *next;
520 /* Instruction mnemonic:
522 List of assembler mnemonics for the instruction.
525 "\"" <assembler-mnemonic> "\""
526 [ ":" <conditional-expression> ]
530 An assembler mnemonic string has the syntax:
532 <assembler-mnemonic> ::=
533 ( [ "%" <format-spec> ] "<" <func> [ "#" <param-list> ] ">"
538 Where, for instance, the text is translated into a printf format
541 "<FUNC>" : "%ld", (long) FUNC
542 "%<FUNC>..." : "%...", FUNC
543 "%s<FUNC>" : "%s", <%s>FUNC (SD_, FUNC)
544 "%s<FUNC#P1,P2>" : "%s", <%s>FUNC (SD_, P1,P2)
545 "%lx<FUNC>" : "%lx", (unsigned long) FUNC
546 "%08lx<FUNC>" : "%08lx", (unsigned long) FUNC
548 And "<%s>FUNC" denotes a function declared using the "%s" record
558 insn_mnemonic_format_field = 0,
559 insn_mnemonic_condition_field = 1,
560 nr_insn_mnemonic_fields = 1,
563 typedef struct _insn_mnemonic_entry insn_mnemonic_entry;
564 struct _insn_mnemonic_entry {
569 insn_mnemonic_entry *next;
577 <insn-word> { "+" <insn-word> }
591 insn_format_name_field = 1,
592 insn_filter_flags_field = 2,
593 insn_options_field = 3,
599 /* typedef struct _insn_entry insn_entry; */
602 filter *flags; /* filtered by options.filters */
606 /* the words that make up the instruction. Word provides direct
607 access to word N. Pseudo instructions can be identified by
610 insn_word_entry *words;
611 insn_word_entry **word;
612 /* a set of all the fields from all the words */
614 /* an array of processor models, missing models are NULL! */
616 insn_model_entry *models;
617 insn_model_entry **model;
619 /* list of assember formats */
621 insn_mnemonic_entry *mnemonics;
628 /* Instruction table:
632 typedef struct _insn_table insn_table;
638 function_entry *functions;
639 insn_entry *illegal_insn;
645 extern insn_table *load_insn_table
649 typedef void insn_entry_handler
655 extern void insn_table_traverse_insn
658 insn_entry_handler *handler,
665 extern void print_insn_words
677 insn_field_entry *field,
684 insn_word_entry *word,