2 * Simulator for the Hitachi H8/300 architecture.
4 * Written by Steve Chamberlain of Cygnus Support. sac@cygnus.com
6 * This file is part of H8/300 sim
9 * THIS SOFTWARE IS NOT COPYRIGHTED
11 * Cygnus offers the following for use in the public domain. Cygnus makes no
12 * warranty with regard to the software or its performance and the user
13 * accepts the software "AS IS" with all faults.
15 * CYGNUS DISCLAIMS ANY WARRANTIES, EXPRESS OR IMPLIED, WITH REGARD TO THIS
16 * SOFTWARE INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY
17 * AND FITNESS FOR A PARTICULAR PURPOSE.
29 #include <sys/param.h>
33 #include "remote-sim.h"
39 #define X(op, size) op*4+size
41 #define SP (h8300hmode ? SL:SW)
54 #define h8_opcodes ops
56 #include "opcode/h8300.h"
60 #define LOW_BYTE(x) ((x) & 0xff)
61 #define HIGH_BYTE(x) (((x)>>8) & 0xff)
62 #define P(X,Y) ((X<<8) | Y)
64 #define BUILDSR() cpu.ccr = (N << 3) | (Z << 2) | (V<<1) | C;
67 c = (cpu.ccr >> 0) & 1;\
68 v = (cpu.ccr >> 1) & 1;\
69 nz = !((cpu.ccr >> 2) & 1);\
70 n = (cpu.ccr >> 3) & 1;
72 #ifdef __CHAR_IS_SIGNED__
73 #define SEXTCHAR(x) ((char)(x))
77 #define SEXTCHAR(x) ((x & 0x80) ? (x | ~0xff): x & 0xff)
80 #define UEXTCHAR(x) ((x) & 0xff)
81 #define UEXTSHORT(x) ((x) & 0xffff)
82 #define SEXTSHORT(x) ((short)(x))
84 static cpu_state_type cpu;
87 /* start-sanitize-h8s */
89 /* end-sanitize-h8s */
91 static int memory_size;
122 return h8300hmode ? SL : SW;
135 return X (OP_IMM, SP);
137 return X (OP_REG, SP);
141 return X (OP_MEM, SP);
148 decode (addr, data, dst)
161 struct h8_opcode *q = h8_opcodes;
165 /* Find the exact opcode/arg combo */
169 unsigned int len = 0;
175 op_type looking_for = *nib;
176 int thisnib = data[len >> 1];
178 thisnib = (len & 1) ? (thisnib & 0xf) : ((thisnib >> 4) & 0xf);
180 if (looking_for < 16 && looking_for >= 0)
182 if (looking_for != thisnib)
187 if ((int) looking_for & (int) B31)
189 if (!(((int) thisnib & 0x8) != 0))
191 looking_for = (op_type) ((int) looking_for & ~(int)
195 if ((int) looking_for & (int) B30)
197 if (!(((int) thisnib & 0x8) == 0))
199 looking_for = (op_type) ((int) looking_for & ~(int) B30);
201 if (looking_for & DBIT)
203 if ((looking_for & 5) != (thisnib & 5))
205 abs = (thisnib & 0x8) ? 2 : 1;
207 else if (looking_for & (REG | IND | INC | DEC))
209 if (looking_for & REG)
212 * Can work out size from the
215 size = bitfrom (looking_for);
217 if (looking_for & SRC)
226 else if (looking_for & L_16)
228 abs = (data[len >> 1]) * 256 + data[(len + 2) >> 1];
230 if (looking_for & (PCREL | DISP))
235 else if (looking_for & ABSJMP)
242 else if (looking_for & MEMIND)
246 else if (looking_for & L_32)
249 abs = (data[i] << 24)
250 | (data[i + 1] << 16)
256 else if (looking_for & L_24)
259 abs = (data[i] << 16) | (data[i + 1] << 8) | (data[i + 2]);
262 else if (looking_for & IGNORE)
266 else if (looking_for & DISPREG)
268 rdisp = thisnib & 0x7;
270 else if (looking_for & KBIT)
285 else if (looking_for & L_8)
289 if (looking_for & PCREL)
291 abs = SEXTCHAR (data[len >> 1]);
293 else if (looking_for & ABS8MEM)
296 abs = h8300hmode ? ~0xff0000ff : ~0xffff00ff;
297 abs |= data[len >> 1] & 0xff ;
301 abs = data[len >> 1] & 0xff;
304 else if (looking_for & L_3)
310 else if (looking_for == E)
314 /* Fill in the args */
316 op_type *args = q->args.nib;
322 int rn = (x & DST) ? rd : rs;
336 p->type = X (OP_IMM, size);
339 else if (x & (IMM | KBIT | DBIT))
341 p->type = X (OP_IMM, size);
346 /* Reset the size, some
347 ops (like mul) have two sizes */
350 p->type = X (OP_REG, size);
355 p->type = X (OP_INC, size);
360 p->type = X (OP_DEC, size);
365 p->type = X (OP_DISP, size);
369 else if (x & (ABS | ABSJMP | ABS8MEM))
371 p->type = X (OP_DISP, size);
377 p->type = X (OP_MEM, size);
382 p->type = X (OP_PCREL, size);
383 p->literal = abs + addr + 2;
389 p->type = X (OP_IMM, SP);
394 p->type = X (OP_DISP, size);
396 p->reg = rdisp & 0x7;
403 printf ("Hmmmm %x", x);
410 * But a jmp or a jsr gets
411 * automagically lvalued, since we
412 * branch to their address not their
415 if (q->how == O (O_JSR, SB)
416 || q->how == O (O_JMP, SB))
418 dst->src.type = lvalue (dst->src.type, dst->src.reg);
421 if (dst->dst.type == -1)
424 dst->opcode = q->how;
425 dst->cycles = q->time;
427 /* And a jsr to 0xc4 is turned into a magic trap */
429 if (dst->opcode == O (O_JSR, SB))
431 if (dst->src.literal == 0xc4)
433 dst->opcode = O (O_SYSCALL, SB);
437 dst->next_pc = addr + len / 2;
442 printf ("Dont understand %x \n", looking_for);
454 dst->opcode = O (O_ILL, SB);
463 /* find the next cache entry to use */
465 idx = cpu.cache_top + 1;
467 if (idx >= cpu.csize)
473 /* Throw away its old meaning */
474 cpu.cache_idx[cpu.cache[idx].oldpc] = 0;
476 /* set to new address */
477 cpu.cache[idx].oldpc = pc;
479 /* fill in instruction info */
480 decode (pc, cpu.memory + pc, cpu.cache + idx);
482 /* point to new cache entry */
483 cpu.cache_idx[pc] = idx;
487 static unsigned char *breg[18];
488 static unsigned short *wreg[18];
489 static unsigned int *lreg[18];
491 #define GET_B_REG(x) *(breg[x])
492 #define SET_B_REG(x,y) (*(breg[x])) = (y)
493 #define GET_W_REG(x) *(wreg[x])
494 #define SET_W_REG(x,y) (*(wreg[x])) = (y)
496 #define GET_L_REG(x) *(lreg[x])
497 #define SET_L_REG(x,y) (*(lreg[x])) = (y)
499 #define GET_MEMORY_L(x) \
501 ? ((cpu.memory[x+0] << 24) | (cpu.memory[x+1] << 16) \
502 | (cpu.memory[x+2] << 8) | cpu.memory[x+3]) \
503 : ((cpu.eightbit[(x+0) & 0xff] << 24) | (cpu.eightbit[(x+1) & 0xff] << 16) \
504 | (cpu.eightbit[(x+2) & 0xff] << 8) | cpu.eightbit[(x+3) & 0xff]))
506 #define GET_MEMORY_W(x) \
508 ? ((cpu.memory[x+0] << 8) | (cpu.memory[x+1] << 0)) \
509 : ((cpu.eightbit[(x+0) & 0xff] << 8) | (cpu.eightbit[(x+1) & 0xff] << 0)))
512 #define GET_MEMORY_B(x) \
513 (x < memory_size ? (cpu.memory[x]) : (cpu.eightbit[x & 0xff]))
515 #define SET_MEMORY_L(x,y) \
516 { register unsigned char *_p; register int __y = y; \
517 _p = (x < memory_size ? cpu.memory+x : cpu.eightbit + (x & 0xff)); \
518 _p[0] = (__y)>>24; _p[1] = (__y)>>16; \
519 _p[2] = (__y)>>8; _p[3] = (__y)>>0;}
521 #define SET_MEMORY_W(x,y) \
522 { register unsigned char *_p; register int __y = y; \
523 _p = (x < memory_size ? cpu.memory+x : cpu.eightbit + (x & 0xff)); \
524 _p[0] = (__y)>>8; _p[1] =(__y);}
526 #define SET_MEMORY_B(x,y) \
527 (x < memory_size ? (cpu.memory[(x)] = y) : (cpu.eightbit[x & 0xff] = y))
534 int abs = arg->literal;
541 return GET_B_REG (rn);
543 return GET_W_REG (rn);
545 return GET_L_REG (rn);
556 r = GET_MEMORY_B (t);
565 r = GET_MEMORY_W (t);
573 r = GET_MEMORY_L (t);
580 case X (OP_DISP, SB):
581 t = GET_L_REG (rn) + abs;
583 return GET_MEMORY_B (t);
585 case X (OP_DISP, SW):
586 t = GET_L_REG (rn) + abs;
588 return GET_MEMORY_W (t);
590 case X (OP_DISP, SL):
591 t = GET_L_REG (rn) + abs;
593 return GET_MEMORY_L (t);
596 t = GET_MEMORY_L (abs);
601 t = GET_MEMORY_W (abs);
619 int abs = arg->literal;
635 t = GET_L_REG (rn) - 1;
642 t = (GET_L_REG (rn) - 2) & cpu.mask;
648 t = (GET_L_REG (rn) - 4) & cpu.mask;
653 case X (OP_DISP, SB):
654 t = GET_L_REG (rn) + abs;
659 case X (OP_DISP, SW):
660 t = GET_L_REG (rn) + abs;
665 case X (OP_DISP, SL):
666 t = GET_L_REG (rn) + abs;
703 memory_size = H8300H_MSIZE;
705 memory_size = H8300_MSIZE;
706 cpu.memory = (unsigned char *) calloc (sizeof (char), memory_size);
707 cpu.cache_idx = (unsigned short *) calloc (sizeof (short), memory_size);
708 cpu.eightbit = (unsigned char *) calloc (sizeof (char), 256);
710 /* `msize' must be a power of two */
711 if ((memory_size & (memory_size - 1)) != 0)
713 cpu.mask = memory_size - 1;
715 for (i = 0; i < 9; i++)
720 for (i = 0; i < 8; i++)
722 unsigned char *p = (unsigned char *) (cpu.regs + i);
723 unsigned char *e = (unsigned char *) (cpu.regs + i + 1);
724 unsigned short *q = (unsigned short *) (cpu.regs + i);
725 unsigned short *u = (unsigned short *) (cpu.regs + i + 1);
726 cpu.regs[i] = 0x00112233;
752 lreg[i] = &cpu.regs[i];
755 lreg[8] = &cpu.regs[8];
757 /* initialize the seg registers */
764 control_c (sig, code, scp, addr)
770 cpu.exception = SIGINT;
779 mop (code, bsize, sign)
792 bsize ? SEXTCHAR (GET_W_REG (code->dst.reg)) :
793 SEXTSHORT (GET_W_REG (code->dst.reg));
795 bsize ? SEXTCHAR (GET_B_REG (code->src.reg)) :
796 SEXTSHORT (GET_W_REG (code->src.reg));
800 multiplicand = bsize ? UEXTCHAR (GET_W_REG (code->dst.reg)) :
801 UEXTSHORT (GET_W_REG (code->dst.reg));
803 bsize ? UEXTCHAR (GET_B_REG (code->src.reg)) :
804 UEXTSHORT (GET_W_REG (code->src.reg));
807 result = multiplier * multiplicand;
811 n = result & (bsize ? 0x8000 : 0x80000000);
812 nz = result & (bsize ? 0xffff : 0xffffffff);
816 SET_W_REG (code->dst.reg, result);
820 SET_L_REG (code->dst.reg, result);
822 /* return ((n==1) << 1) | (nz==1); */
826 #define OSHIFTS(name, how) \
831 rd = GET_B_REG (code->src.reg); \
839 rd = GET_W_REG (code->src.reg); \
846 int hm = 0x80000000; \
847 rd = GET_L_REG (code->src.reg); \
852 #define OBITOP(name,f, s, op) \
857 if (f) ea = fetch (&code->dst); \
858 m=1<< fetch(&code->src); \
860 if(s) store (&code->dst,ea); goto next; \
864 sim_resume (step, siggnal)
869 int tick_start = get_now ();
882 prev = signal (SIGINT, control_c);
886 cpu.exception = SIGTRAP;
895 /* The PC should never be odd. */
909 cidx = cpu.cache_idx[pc];
910 code = cpu.cache + cidx;
913 #define ALUOP(STORE, NAME, HOW) \
914 case O(NAME,SB): HOW; if(STORE)goto alu8;else goto just_flags_alu8; \
915 case O(NAME, SW): HOW; if(STORE)goto alu16;else goto just_flags_alu16; \
916 case O(NAME,SL): HOW; if(STORE)goto alu32;else goto just_flags_alu32;
919 #define LOGOP(NAME, HOW) \
920 case O(NAME,SB): HOW; goto log8;\
921 case O(NAME, SW): HOW; goto log16;\
922 case O(NAME,SL): HOW; goto log32;
929 printf ("%x %d %s\n", pc, code->opcode,
930 code->op ? code->op->name : "**");
932 cpu.stats[code->opcode]++;
936 cycles += code->cycles;
938 switch (code->opcode)
942 * This opcode is a fake for when we get to an
943 * instruction which hasnt been compiled
951 rd = fetch (&code->dst);
952 ea = fetch (&code->src);
958 rd = fetch (&code->dst);
959 ea = fetch (&code->src);
964 #define EA ea = fetch(&code->src);
965 #define RD_EA ea = fetch(&code->src); rd = fetch(&code->dst);
967 ALUOP (1, O_SUB, RD_EA;
976 rd = GET_B_REG (code->dst.reg);
977 ea = fetch (&code->src);
981 rd = GET_W_REG (code->dst.reg);
982 ea = fetch (&code->src);
986 rd = GET_L_REG (code->dst.reg);
987 ea = fetch (&code->src);
1002 case O (O_MOV_TO_MEM, SB):
1003 res = GET_B_REG (code->src.reg);
1005 case O (O_MOV_TO_MEM, SW):
1006 res = GET_W_REG (code->src.reg);
1008 case O (O_MOV_TO_MEM, SL):
1009 res = GET_L_REG (code->src.reg);
1013 case O (O_MOV_TO_REG, SB):
1014 res = fetch (&code->src);
1015 SET_B_REG (code->dst.reg, res);
1016 goto just_flags_log8;
1017 case O (O_MOV_TO_REG, SW):
1018 res = fetch (&code->src);
1019 SET_W_REG (code->dst.reg, res);
1020 goto just_flags_log16;
1021 case O (O_MOV_TO_REG, SL):
1022 res = fetch (&code->src);
1023 SET_L_REG (code->dst.reg, res);
1024 goto just_flags_log32;
1027 case O (O_ADDS, SL):
1028 SET_L_REG (code->dst.reg,
1029 GET_L_REG (code->dst.reg)
1030 + code->src.literal);
1034 case O (O_SUBS, SL):
1035 SET_L_REG (code->dst.reg,
1036 GET_L_REG (code->dst.reg)
1037 - code->src.literal);
1041 rd = fetch (&code->dst);
1042 ea = fetch (&code->src);
1045 goto just_flags_alu8;
1048 rd = fetch (&code->dst);
1049 ea = fetch (&code->src);
1052 goto just_flags_alu16;
1055 rd = fetch (&code->dst);
1056 ea = fetch (&code->src);
1059 goto just_flags_alu32;
1063 rd = GET_B_REG (code->src.reg);
1066 SET_B_REG (code->src.reg, res);
1067 goto just_flags_inc8;
1070 rd = GET_W_REG (code->dst.reg);
1071 ea = -code->src.literal;
1073 SET_W_REG (code->dst.reg, res);
1074 goto just_flags_inc16;
1077 rd = GET_L_REG (code->dst.reg);
1078 ea = -code->src.literal;
1080 SET_L_REG (code->dst.reg, res);
1081 goto just_flags_inc32;
1085 rd = GET_B_REG (code->src.reg);
1088 SET_B_REG (code->src.reg, res);
1089 goto just_flags_inc8;
1092 rd = GET_W_REG (code->dst.reg);
1093 ea = code->src.literal;
1095 SET_W_REG (code->dst.reg, res);
1096 goto just_flags_inc16;
1099 rd = GET_L_REG (code->dst.reg);
1100 ea = code->src.literal;
1102 SET_L_REG (code->dst.reg, res);
1103 goto just_flags_inc32;
1106 #define GET_CCR(x) BUILDSR();x = cpu.ccr
1108 case O (O_ANDC, SB):
1110 ea = code->src.literal;
1116 ea = code->src.literal;
1120 case O (O_XORC, SB):
1122 ea = code->src.literal;
1163 if (((Z || (N ^ V)) == 0))
1169 if (((Z || (N ^ V)) == 1))
1203 case O (O_SYSCALL, SB):
1204 printf ("%c", cpu.regs[2]);
1207 OSHIFTS (O_NOT, rd = ~rd; v = 0;);
1208 OSHIFTS (O_SHLL, c = rd & hm; v = 0;
1210 OSHIFTS (O_SHLR, c = rd & 1; v = 0;
1211 rd = (unsigned int) rd >> 1);
1212 OSHIFTS (O_SHAL, c = rd & hm;
1213 v = (rd & hm) != ((rd & (hm >> 1)) << 1);
1215 OSHIFTS (O_SHAR, t = rd & hm;
1221 OSHIFTS (O_ROTL, c = rd & hm;
1225 OSHIFTS (O_ROTR, c = rd & 1;
1227 rd = (unsigned int) rd >> 1;
1229 OSHIFTS (O_ROTXL, t = rd & hm;
1235 OSHIFTS (O_ROTXR, t = rd & 1;
1236 rd = (unsigned int) rd >> 1;
1237 if (C) rd |= hm; c = t;
1242 pc = fetch (&code->src);
1250 pc = fetch (&code->src);
1257 SET_MEMORY_L (tmp, code->next_pc);
1262 SET_MEMORY_W (tmp, code->next_pc);
1269 pc = code->src.literal;
1280 pc = GET_MEMORY_L (tmp);
1285 pc = GET_MEMORY_W (tmp);
1294 cpu.exception = SIGILL;
1296 case O (O_SLEEP, SB):
1297 /* The format of r0 is defined by devo/include/wait.h.
1298 cpu.exception handling needs some cleanup: we need to make the
1299 the handling of normal exits vs signals, etc. more sensible. */
1300 if (! WIFEXITED (cpu.regs[0]) && WIFSIGNALED (cpu.regs[0]))
1301 cpu.exception = SIGILL;
1303 cpu.exception = SIGTRAP;
1306 cpu.exception = SIGTRAP;
1309 OBITOP (O_BNOT, 1, 1, ea ^= m);
1310 OBITOP (O_BTST, 1, 0, nz = ea & m);
1311 OBITOP (O_BCLR, 1, 1, ea &= ~m);
1312 OBITOP (O_BSET, 1, 1, ea |= m);
1313 OBITOP (O_BLD, 1, 0, c = ea & m);
1314 OBITOP (O_BILD, 1, 0, c = !(ea & m));
1315 OBITOP (O_BST, 1, 1, ea &= ~m;
1317 OBITOP (O_BIST, 1, 1, ea &= ~m;
1319 OBITOP (O_BAND, 1, 0, c = (ea & m) && C);
1320 OBITOP (O_BIAND, 1, 0, c = !(ea & m) && C);
1321 OBITOP (O_BOR, 1, 0, c = (ea & m) || C);
1322 OBITOP (O_BIOR, 1, 0, c = !(ea & m) || C);
1323 OBITOP (O_BXOR, 1, 0, c = (ea & m) != C);
1324 OBITOP (O_BIXOR, 1, 0, c = !(ea & m) != C);
1327 #define MOP(bsize, signed) mop(code, bsize,signed); goto next;
1329 case O (O_MULS, SB):
1332 case O (O_MULS, SW):
1335 case O (O_MULU, SB):
1338 case O (O_MULU, SW):
1343 case O (O_DIVU, SB):
1345 rd = GET_W_REG (code->dst.reg);
1346 ea = GET_B_REG (code->src.reg);
1349 tmp = (unsigned)rd % ea;
1350 rd = (unsigned)rd / ea;
1352 SET_W_REG (code->dst.reg, (rd & 0xff) | (tmp << 8));
1358 case O (O_DIVU, SW):
1360 rd = GET_L_REG (code->dst.reg);
1361 ea = GET_W_REG (code->src.reg);
1366 tmp = (unsigned)rd % ea;
1367 rd = (unsigned)rd / ea;
1369 SET_L_REG (code->dst.reg, (rd & 0xffff) | (tmp << 16));
1373 case O (O_DIVS, SB):
1376 rd = SEXTSHORT (GET_W_REG (code->dst.reg));
1377 ea = SEXTCHAR (GET_B_REG (code->src.reg));
1380 tmp = (int) rd % (int) ea;
1381 rd = (int) rd / (int) ea;
1387 SET_W_REG (code->dst.reg, (rd & 0xff) | (tmp << 8));
1390 case O (O_DIVS, SW):
1392 rd = GET_L_REG (code->dst.reg);
1393 ea = SEXTSHORT (GET_W_REG (code->src.reg));
1396 tmp = (int) rd % (int) ea;
1397 rd = (int) rd / (int) ea;
1398 n = rd & 0x80000000;
1403 SET_L_REG (code->dst.reg, (rd & 0xffff) | (tmp << 16));
1406 case O (O_EXTS, SW):
1407 rd = GET_B_REG (code->src.reg + 8) & 0xff; /* Yes, src, not dst. */
1408 ea = rd & 0x80 ? -256 : 0;
1411 case O (O_EXTS, SL):
1412 rd = GET_W_REG (code->src.reg) & 0xffff;
1413 ea = rd & 0x8000 ? -65536 : 0;
1416 case O (O_EXTU, SW):
1417 rd = GET_B_REG (code->src.reg + 8) & 0xff;
1421 case O (O_EXTU, SL):
1422 rd = GET_W_REG (code->src.reg) & 0xffff;
1430 /* start-sanitize-h8s */
1433 int nregs, firstreg, i;
1435 nregs = GET_MEMORY_B (pc + 1);
1438 firstreg = GET_MEMORY_B (pc + 3);
1440 for (i = firstreg; i <= firstreg + nregs; i++)
1443 SET_MEMORY_L (cpu.regs[7], cpu.regs[i]);
1450 int nregs, firstreg, i;
1452 nregs = GET_MEMORY_B (pc + 1);
1455 firstreg = GET_MEMORY_B (pc + 3);
1457 for (i = firstreg; i >= firstreg - nregs; i--)
1459 cpu.regs[i] = GET_MEMORY_L (cpu.regs[7]);
1465 /* end-sanitize-h8s */
1467 cpu.exception = SIGILL;
1479 /* When a branch works */
1480 pc = code->src.literal;
1483 /* Set the cond codes from res */
1486 /* Set the flags after an 8 bit inc/dec operation */
1490 v = (rd & 0x7f) == 0x7f;
1494 /* Set the flags after an 16 bit inc/dec operation */
1498 v = (rd & 0x7fff) == 0x7fff;
1502 /* Set the flags after an 32 bit inc/dec operation */
1504 n = res & 0x80000000;
1505 nz = res & 0xffffffff;
1506 v = (rd & 0x7fffffff) == 0x7fffffff;
1511 /* Set flags after an 8 bit shift op, carry,overflow set in insn */
1514 SET_B_REG (code->src.reg, rd);
1518 /* Set flags after an 16 bit shift op, carry,overflow set in insn */
1521 SET_W_REG (code->src.reg, rd);
1525 /* Set flags after an 32 bit shift op, carry,overflow set in insn */
1526 n = (rd & 0x80000000);
1527 nz = rd & 0xffffffff;
1528 SET_L_REG (code->src.reg, rd);
1532 store (&code->dst, res);
1534 /* flags after a 32bit logical operation */
1535 n = res & 0x80000000;
1536 nz = res & 0xffffffff;
1541 store (&code->dst, res);
1543 /* flags after a 16bit logical operation */
1551 store (&code->dst, res);
1559 SET_B_REG (code->dst.reg, res);
1564 switch (code->opcode / 4)
1567 v = ((rd & 0x80) == (ea & 0x80)
1568 && (rd & 0x80) != (res & 0x80));
1572 v = ((rd & 0x80) != (-ea & 0x80)
1573 && (rd & 0x80) != (res & 0x80));
1582 SET_W_REG (code->dst.reg, res);
1586 c = (res & 0x10000);
1587 switch (code->opcode / 4)
1590 v = ((rd & 0x8000) == (ea & 0x8000)
1591 && (rd & 0x8000) != (res & 0x8000));
1595 v = ((rd & 0x8000) != (-ea & 0x8000)
1596 && (rd & 0x8000) != (res & 0x8000));
1605 SET_L_REG (code->dst.reg, res);
1607 n = res & 0x80000000;
1608 nz = res & 0xffffffff;
1609 switch (code->opcode / 4)
1612 v = ((rd & 0x80000000) == (ea & 0x80000000)
1613 && (rd & 0x80000000) != (res & 0x80000000));
1614 c = ((unsigned) res < (unsigned) rd) || ((unsigned) res < (unsigned) ea);
1618 v = ((rd & 0x80000000) != (-ea & 0x80000000)
1619 && (rd & 0x80000000) != (res & 0x80000000));
1620 c = (unsigned) rd < (unsigned) -ea;
1623 v = (rd == 0x80000000);
1634 /* if (cpu.regs[8] ) abort(); */
1637 /* Poll after every 100th insn, */
1638 if (poll_count++ > 100)
1641 if (win32pollquit())
1647 #if defined(__GO32__)
1648 /* Poll after every 100th insn, */
1649 if (poll_count++ > 100)
1661 while (!cpu.exception);
1662 cpu.ticks += get_now () - tick_start;
1663 cpu.cycles += cycles;
1669 signal (SIGINT, prev);
1674 sim_write (addr, buffer, size)
1676 unsigned char *buffer;
1684 for (i = 0; i < size; i++)
1686 if (addr < memory_size)
1688 cpu.memory[addr + i] = buffer[i];
1689 cpu.cache_idx[addr + i] = 0;
1692 cpu.eightbit[(addr + i) & 0xff] = buffer[i];
1698 sim_read (addr, buffer, size)
1700 unsigned char *buffer;
1706 if (addr < memory_size)
1707 memcpy (buffer, cpu.memory + addr, size);
1709 memcpy (buffer, cpu.eightbit + (addr & 0xff), size);
1723 #define SP_REGNUM R7_REGNUM /* Contains address of top of stack */
1724 #define FP_REGNUM R6_REGNUM /* Contains address of executing
1727 #define CCR_REGNUM 8 /* Contains processor status */
1728 #define PC_REGNUM 9 /* Contains program counter */
1730 #define CYCLE_REGNUM 10
1731 #define INST_REGNUM 11
1732 #define TICK_REGNUM 12
1736 sim_store_register (rn, value)
1738 unsigned char *value;
1743 longval = (value[0] << 24) | (value[1] << 16) | (value[2] << 8) | value[3];
1744 shortval = (value[0] << 8) | (value[1]);
1745 intval = h8300hmode ? longval : shortval;
1763 cpu.regs[rn] = intval;
1769 cpu.cycles = longval;
1773 cpu.insts = longval;
1777 cpu.ticks = longval;
1783 sim_fetch_register (rn, buf)
1825 if (h8300hmode || longreg)
1840 sim_stop_reason (reason, sigrc)
1841 enum sim_stop *reason;
1844 *reason = sim_stopped;
1845 *sigrc = cpu.exception;
1854 cpu.cache = (decoded_inst *) malloc (sizeof (decoded_inst) * n);
1855 memset (cpu.cache, 0, sizeof (decoded_inst) * n);
1864 double timetaken = (double) cpu.ticks / (double) now_persec ();
1865 double virttime = cpu.cycles / 10.0e6;
1867 printf_filtered ("\n\n#instructions executed %10d\n", cpu.insts);
1868 printf_filtered ("#cycles (v approximate) %10d\n", cpu.cycles);
1869 printf_filtered ("#real time taken %10.4f\n", timetaken);
1870 printf_filtered ("#virtual time taked %10.4f\n", virttime);
1871 if (timetaken != 0.0)
1872 printf_filtered ("#simulation ratio %10.4f\n", virttime / timetaken);
1873 printf_filtered ("#compiles %10d\n", cpu.compiles);
1874 printf_filtered ("#cache size %10d\n", cpu.csize);
1880 for (i = 0; i < O_LAST; i++)
1883 printf_filtered ("%d: %d\n", i, cpu.stats[i]);
1889 /* Indicate whether the cpu is an h8/300 or h8/300h.
1890 FLAG is non-zero for the h8/300h. */
1913 sim_close (quitting)
1919 /* Called by gdb to load a program into memory. */
1922 sim_load (prog, from_tty)
1928 /* See if the file is for the h8/300 or h8/300h. */
1929 /* ??? This may not be the most efficient way. The z8k simulator
1930 does this via a different mechanism (INIT_EXTRA_SYMTAB_INFO). */
1931 if ((abfd = bfd_openr (prog, "coff-h8300")) != 0)
1933 if (bfd_check_format (abfd, bfd_object))
1935 set_h8300h (abfd->arch_info->mach == bfd_mach_h8300h
1936 /* start-sanitize-h8s */
1937 || abfd->arch_info->mach == bfd_mach_h8300s
1938 /* end-sanitize-h8s */
1944 /* If we're using gdb attached to the simulator, then we have to
1945 reallocate memory for the simulator.
1947 When gdb first starts, it calls fetch_registers (among other
1948 functions), which in turn calls init_pointers, which allocates
1951 The problem is when we do that, we don't know whether we're
1952 debugging an h8/300 or h8/300h program.
1954 This is the first point at which we can make that determination,
1955 so we just reallocate memory now; this will also allow us to handle
1956 switching between h8/300 and h8/300h programs without exiting
1959 memory_size = H8300H_MSIZE;
1961 memory_size = H8300_MSIZE;
1966 free (cpu.cache_idx);
1968 free (cpu.eightbit);
1970 cpu.memory = (unsigned char *) calloc (sizeof (char), memory_size);
1971 cpu.cache_idx = (unsigned short *) calloc (sizeof (short), memory_size);
1972 cpu.eightbit = (unsigned char *) calloc (sizeof (char), 256);
1974 /* `msize' must be a power of two */
1975 if ((memory_size & (memory_size - 1)) != 0)
1977 cpu.mask = memory_size - 1;
1979 /* Return non-zero so gdb will handle it. */
1984 sim_create_inferior (start_address, argv, env)
1985 SIM_ADDR start_address;
1989 cpu.pc = start_address;
1993 sim_do_command (cmd)
1996 printf_filtered ("This simulator does not accept any commands.\n");
2002 sim_set_callbacks (ptr)
2003 struct host_callback_struct *ptr;