2 * Simulator for the Hitachi H8/300 architecture.
4 * Written by Steve Chamberlain of Cygnus Support. sac@cygnus.com
6 * This file is part of H8/300 sim
9 * THIS SOFTWARE IS NOT COPYRIGHTED
11 * Cygnus offers the following for use in the public domain. Cygnus makes no
12 * warranty with regard to the software or its performance and the user
13 * accepts the software "AS IS" with all faults.
15 * CYGNUS DISCLAIMS ANY WARRANTIES, EXPRESS OR IMPLIED, WITH REGARD TO THIS
16 * SOFTWARE INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY
17 * AND FITNESS FOR A PARTICULAR PURPOSE.
30 #ifdef HAVE_SYS_PARAM_H
31 #include <sys/param.h>
35 #include "gdb/callback.h"
36 #include "gdb/remote-sim.h"
37 #include "gdb/sim-h8300.h"
39 #include "sys/types.h"
47 host_callback *sim_callback;
49 static SIM_OPEN_KIND sim_kind;
52 /* FIXME: Needs to live in header file.
53 This header should also include the things in remote-sim.h.
54 One could move this to remote-sim.h but this function isn't needed
56 void sim_set_simcache_size PARAMS ((int));
58 #define X(op, size) op * 4 + size
60 #define SP (h8300hmode ? SL : SW)
74 #define h8_opcodes ops
76 #include "opcode/h8300.h"
80 /* The rate at which to call the host's poll_quit callback. */
82 #define POLL_QUIT_INTERVAL 0x80000
84 #define LOW_BYTE(x) ((x) & 0xff)
85 #define HIGH_BYTE(x) (((x) >> 8) & 0xff)
86 #define P(X,Y) ((X << 8) | Y)
89 cpu.ccr = ((I << 7) | (UI << 6) | (H << 5) | (U << 4) \
90 | (N << 3) | (Z << 2) | (V << 1) | C);
93 if (h8300smode) cpu.exr = (trace<<7) | intMask;
96 c = (cpu.ccr >> 0) & 1;\
97 v = (cpu.ccr >> 1) & 1;\
98 nz = !((cpu.ccr >> 2) & 1);\
99 n = (cpu.ccr >> 3) & 1;\
100 u = (cpu.ccr >> 4) & 1;\
101 h = (cpu.ccr >> 5) & 1;\
102 ui = ((cpu.ccr >> 6) & 1);\
103 intMaskBit = (cpu.ccr >> 7) & 1;
108 trace = (cpu.exr >> 7) & 1; \
109 intMask = cpu.exr & 7; \
112 #ifdef __CHAR_IS_SIGNED__
113 #define SEXTCHAR(x) ((char) (x))
117 #define SEXTCHAR(x) ((x & 0x80) ? (x | ~0xff) : x & 0xff)
120 #define UEXTCHAR(x) ((x) & 0xff)
121 #define UEXTSHORT(x) ((x) & 0xffff)
122 #define SEXTSHORT(x) ((short) (x))
124 static cpu_state_type cpu;
129 static int memory_size;
134 return time (0); /* WinXX HAS UNIX like 'time', so why not using it? */
155 return h8300hmode ? SL : SW;
160 lvalue (int x, int rn)
167 return X (OP_IMM, SP);
169 return X (OP_REG, SP);
172 return X (OP_MEM, SP);
175 abort (); /* ?? May be something more usefull? */
191 decode (int addr, unsigned char *data, decoded_inst *dst)
205 /* Find the exact opcode/arg combo. */
206 for (q = h8_opcodes; q->name; q++)
208 op_type *nib = q->data.nib;
209 unsigned int len = 0;
213 op_type looking_for = *nib;
214 int thisnib = data[len >> 1];
216 thisnib = (len & 1) ? (thisnib & 0xf) : ((thisnib >> 4) & 0xf);
218 if (looking_for < 16 && looking_for >= 0)
220 if (looking_for != thisnib)
225 if ((int) looking_for & (int) B31)
227 if (!(((int) thisnib & 0x8) != 0))
230 looking_for = (op_type) ((int) looking_for & ~(int) B31);
234 if ((int) looking_for & (int) B30)
236 if (!(((int) thisnib & 0x8) == 0))
239 looking_for = (op_type) ((int) looking_for & ~(int) B30);
242 if (looking_for & DBIT)
244 /* Exclude adds/subs by looking at bit 0 and 2, and
245 make sure the operand size, either w or l,
246 matches by looking at bit 1. */
247 if ((looking_for & 7) != (thisnib & 7))
250 abs = (thisnib & 0x8) ? 2 : 1;
252 else if (looking_for & (REG | IND | INC | DEC))
254 if (looking_for & REG)
256 /* Can work out size from the register. */
257 size = bitfrom (looking_for);
259 if (looking_for & SRC)
264 else if (looking_for & L_16)
266 abs = (data[len >> 1]) * 256 + data[(len + 2) >> 1];
268 if (looking_for & (PCREL | DISP))
273 else if (looking_for & ABSJMP)
275 abs = (data[1] << 16) | (data[2] << 8) | (data[3]);
277 else if (looking_for & MEMIND)
281 else if (looking_for & L_32)
285 abs = (data[i] << 24)
286 | (data[i + 1] << 16)
292 else if (looking_for & L_24)
296 abs = (data[i] << 16) | (data[i + 1] << 8) | (data[i + 2]);
299 else if (looking_for & IGNORE)
303 else if (looking_for & DISPREG)
305 rdisp = thisnib & 0x7;
307 else if (looking_for & KBIT)
324 else if (looking_for & L_8)
328 if (looking_for & PCREL)
330 abs = SEXTCHAR (data[len >> 1]);
332 else if (looking_for & ABS8MEM)
335 abs = h8300hmode ? ~0xff0000ff : ~0xffff00ff;
336 abs |= data[len >> 1] & 0xff;
340 abs = data[len >> 1] & 0xff;
343 else if (looking_for & L_3)
349 else if (looking_for == E)
353 /* Fill in the args. */
355 op_type *args = q->args.nib;
361 int rn = (x & DST) ? rd : rs;
371 p->type = X (OP_IMM, size);
374 else if (x & (IMM | KBIT | DBIT))
376 p->type = X (OP_IMM, size);
382 Some ops (like mul) have two sizes. */
385 p->type = X (OP_REG, size);
390 p->type = X (OP_INC, size);
395 p->type = X (OP_DEC, size);
400 p->type = X (OP_DISP, size);
404 else if (x & (ABS | ABSJMP | ABS8MEM))
406 p->type = X (OP_DISP, size);
412 p->type = X (OP_MEM, size);
417 p->type = X (OP_PCREL, size);
418 p->literal = abs + addr + 2;
424 p->type = X (OP_IMM, SP);
429 p->type = X (OP_DISP, size);
431 p->reg = rdisp & 0x7;
442 printf ("Hmmmm %x", x);
448 /* But a jmp or a jsr gets automagically lvalued,
449 since we branch to their address not their
451 if (q->how == O (O_JSR, SB)
452 || q->how == O (O_JMP, SB))
454 dst->src.type = lvalue (dst->src.type, dst->src.reg);
457 if (dst->dst.type == -1)
460 dst->opcode = q->how;
461 dst->cycles = q->time;
463 /* And a jsr to these locations are turned into magic
466 if (dst->opcode == O (O_JSR, SB))
468 switch (dst->src.literal)
471 dst->opcode = O (O_SYS_OPEN, SB);
474 dst->opcode = O (O_SYS_READ, SB);
477 dst->opcode = O (O_SYS_WRITE, SB);
480 dst->opcode = O (O_SYS_LSEEK, SB);
483 dst->opcode = O (O_SYS_CLOSE, SB);
486 dst->opcode = O (O_SYS_STAT, SB);
489 dst->opcode = O (O_SYS_FSTAT, SB);
492 dst->opcode = O (O_SYS_CMDLINE, SB);
495 /* End of Processing for system calls. */
498 dst->next_pc = addr + len / 2;
502 printf ("Don't understand %x \n", looking_for);
513 /* Fell off the end. */
514 dst->opcode = O (O_ILL, SB);
522 /* Find the next cache entry to use. */
523 idx = cpu.cache_top + 1;
525 if (idx >= cpu.csize)
531 /* Throw away its old meaning. */
532 cpu.cache_idx[cpu.cache[idx].oldpc] = 0;
534 /* Set to new address. */
535 cpu.cache[idx].oldpc = pc;
537 /* Fill in instruction info. */
538 decode (pc, cpu.memory + pc, cpu.cache + idx);
540 /* Point to new cache entry. */
541 cpu.cache_idx[pc] = idx;
545 static unsigned char *breg[18];
546 static unsigned short *wreg[18];
547 static unsigned int *lreg[18];
549 #define GET_B_REG(x) *(breg[x])
550 #define SET_B_REG(x,y) (*(breg[x])) = (y)
551 #define GET_W_REG(x) *(wreg[x])
552 #define SET_W_REG(x,y) (*(wreg[x])) = (y)
554 #define GET_L_REG(x) *(lreg[x])
555 #define SET_L_REG(x,y) (*(lreg[x])) = (y)
557 #define GET_MEMORY_L(x) \
559 ? ((cpu.memory[x+0] << 24) | (cpu.memory[x+1] << 16) \
560 | (cpu.memory[x+2] << 8) | cpu.memory[x+3]) \
561 : ((cpu.eightbit[(x+0) & 0xff] << 24) | (cpu.eightbit[(x+1) & 0xff] << 16) \
562 | (cpu.eightbit[(x+2) & 0xff] << 8) | cpu.eightbit[(x+3) & 0xff]))
564 #define GET_MEMORY_W(x) \
566 ? ((cpu.memory[x+0] << 8) | (cpu.memory[x+1] << 0)) \
567 : ((cpu.eightbit[(x+0) & 0xff] << 8) | (cpu.eightbit[(x+1) & 0xff] << 0)))
570 #define GET_MEMORY_B(x) \
571 (x < memory_size ? (cpu.memory[x]) : (cpu.eightbit[x & 0xff]))
573 #define SET_MEMORY_L(x,y) \
574 { register unsigned char *_p; register int __y = y; \
575 _p = (x < memory_size ? cpu.memory+x : cpu.eightbit + (x & 0xff)); \
576 _p[0] = (__y)>>24; _p[1] = (__y)>>16; \
577 _p[2] = (__y)>>8; _p[3] = (__y)>>0;}
579 #define SET_MEMORY_W(x,y) \
580 { register unsigned char *_p; register int __y = y; \
581 _p = (x < memory_size ? cpu.memory+x : cpu.eightbit + (x & 0xff)); \
582 _p[0] = (__y)>>8; _p[1] =(__y);}
584 #define SET_MEMORY_B(x,y) \
585 (x < memory_size ? (cpu.memory[(x)] = y) : (cpu.eightbit[x & 0xff] = y))
591 int abs = arg->literal;
598 return GET_B_REG (rn);
600 return GET_W_REG (rn);
602 return GET_L_REG (rn);
613 r = GET_MEMORY_B (t);
622 r = GET_MEMORY_W (t);
630 r = GET_MEMORY_L (t);
637 case X (OP_DISP, SB):
638 t = GET_L_REG (rn) + abs;
640 return GET_MEMORY_B (t);
642 case X (OP_DISP, SW):
643 t = GET_L_REG (rn) + abs;
645 return GET_MEMORY_W (t);
647 case X (OP_DISP, SL):
648 t = GET_L_REG (rn) + abs;
650 return GET_MEMORY_L (t);
653 t = GET_MEMORY_L (abs);
658 t = GET_MEMORY_W (abs);
663 abort (); /* ?? May be something more usefull? */
670 store (ea_type *arg, int n)
673 int abs = arg->literal;
689 t = GET_L_REG (rn) - 1;
696 t = (GET_L_REG (rn) - 2) & cpu.mask;
702 t = (GET_L_REG (rn) - 4) & cpu.mask;
707 case X (OP_DISP, SB):
708 t = GET_L_REG (rn) + abs;
713 case X (OP_DISP, SW):
714 t = GET_L_REG (rn) + abs;
719 case X (OP_DISP, SL):
720 t = GET_L_REG (rn) + abs;
756 memory_size = H8300S_MSIZE;
758 memory_size = H8300H_MSIZE;
760 memory_size = H8300_MSIZE;
761 cpu.memory = (unsigned char *) calloc (sizeof (char), memory_size);
762 cpu.cache_idx = (unsigned short *) calloc (sizeof (short), memory_size);
763 cpu.eightbit = (unsigned char *) calloc (sizeof (char), 256);
765 /* `msize' must be a power of two. */
766 if ((memory_size & (memory_size - 1)) != 0)
768 cpu.mask = memory_size - 1;
770 for (i = 0; i < 9; i++)
775 for (i = 0; i < 8; i++)
777 unsigned char *p = (unsigned char *) (cpu.regs + i);
778 unsigned char *e = (unsigned char *) (cpu.regs + i + 1);
779 unsigned short *q = (unsigned short *) (cpu.regs + i);
780 unsigned short *u = (unsigned short *) (cpu.regs + i + 1);
781 cpu.regs[i] = 0x00112233;
794 wreg[i] = wreg[i + 8] = 0;
807 if (wreg[i] == 0 || wreg[i + 8] == 0)
810 lreg[i] = &cpu.regs[i];
813 lreg[8] = &cpu.regs[8];
815 /* Initialize the seg registers. */
817 sim_set_simcache_size (CSIZE);
824 cpu.state = SIM_STATE_STOPPED;
825 cpu.exception = SIGINT;
835 #define I (intMaskBit != 0)
838 mop (decoded_inst *code, int bsize, int sign)
848 bsize ? SEXTCHAR (GET_W_REG (code->dst.reg)) :
849 SEXTSHORT (GET_W_REG (code->dst.reg));
851 bsize ? SEXTCHAR (GET_B_REG (code->src.reg)) :
852 SEXTSHORT (GET_W_REG (code->src.reg));
856 multiplicand = bsize ? UEXTCHAR (GET_W_REG (code->dst.reg)) :
857 UEXTSHORT (GET_W_REG (code->dst.reg));
859 bsize ? UEXTCHAR (GET_B_REG (code->src.reg)) :
860 UEXTSHORT (GET_W_REG (code->src.reg));
863 result = multiplier * multiplicand;
867 n = result & (bsize ? 0x8000 : 0x80000000);
868 nz = result & (bsize ? 0xffff : 0xffffffff);
872 SET_W_REG (code->dst.reg, result);
876 SET_L_REG (code->dst.reg, result);
879 return ((n == 1) << 1) | (nz == 1);
883 #define ONOT(name, how) \
888 rd = GET_B_REG (code->src.reg); \
896 rd = GET_W_REG (code->src.reg); \
903 int hm = 0x80000000; \
904 rd = GET_L_REG (code->src.reg); \
909 #define OSHIFTS(name, how1, how2) \
914 rd = GET_B_REG (code->src.reg); \
915 if ((GET_MEMORY_B (pc + 1) & 0x40) == 0) \
929 rd = GET_W_REG (code->src.reg); \
930 if ((GET_MEMORY_B (pc + 1) & 0x40) == 0) \
943 int hm = 0x80000000; \
944 rd = GET_L_REG (code->src.reg); \
945 if ((GET_MEMORY_B (pc + 1) & 0x40) == 0) \
956 #define OBITOP(name,f, s, op) \
961 if (f) ea = fetch (&code->dst); \
962 m=1<< fetch (&code->src); \
964 if (s) store (&code->dst,ea); goto next; \
968 sim_stop (SIM_DESC sd)
970 cpu.state = SIM_STATE_STOPPED;
971 cpu.exception = SIGINT;
984 #define SP_REGNUM R7_REGNUM /* Contains address of top of stack */
985 #define FP_REGNUM R6_REGNUM /* Contains address of executing
988 #define CCR_REGNUM 8 /* Contains processor status */
989 #define PC_REGNUM 9 /* Contains program counter */
991 #define CYCLE_REGNUM 10
993 #define EXR_REGNUM 11
994 #define INST_REGNUM 12
995 #define TICK_REGNUM 13
998 sim_resume (SIM_DESC sd, int step, int siggnal)
1003 int tick_start = get_now ();
1012 int c, nz, v, n, u, h, ui, intMaskBit;
1017 prev = signal (SIGINT, control_c);
1021 cpu.state = SIM_STATE_STOPPED;
1022 cpu.exception = SIGTRAP;
1026 cpu.state = SIM_STATE_RUNNING;
1032 /* The PC should never be odd. */
1048 cidx = cpu.cache_idx[pc];
1049 code = cpu.cache + cidx;
1052 #define ALUOP(STORE, NAME, HOW) \
1053 case O (NAME, SB): HOW; if (STORE) goto alu8; else goto just_flags_alu8; \
1054 case O (NAME, SW): HOW; if (STORE) goto alu16; else goto just_flags_alu16; \
1055 case O (NAME, SL): HOW; if (STORE) goto alu32; else goto just_flags_alu32;
1058 #define LOGOP(NAME, HOW) \
1059 case O (NAME, SB): HOW; goto log8; \
1060 case O (NAME, SW): HOW; goto log16; \
1061 case O (NAME, SL): HOW; goto log32;
1068 printf ("%x %d %s\n", pc, code->opcode,
1069 code->op ? code->op->name : "**");
1071 cpu.stats[code->opcode]++;
1077 cycles += code->cycles;
1081 switch (code->opcode)
1085 * This opcode is a fake for when we get to an
1086 * instruction which hasnt been compiled
1093 case O (O_SUBX, SB):
1094 rd = fetch (&code->dst);
1095 ea = fetch (&code->src);
1100 case O (O_ADDX, SB):
1101 rd = fetch (&code->dst);
1102 ea = fetch (&code->src);
1107 #define EA ea = fetch (&code->src);
1108 #define RD_EA ea = fetch (&code->src); rd = fetch (&code->dst);
1110 ALUOP (1, O_SUB, RD_EA;
1113 ALUOP (1, O_NEG, EA;
1119 rd = GET_B_REG (code->dst.reg);
1120 ea = fetch (&code->src);
1124 rd = GET_W_REG (code->dst.reg);
1125 ea = fetch (&code->src);
1129 rd = GET_L_REG (code->dst.reg);
1130 ea = fetch (&code->src);
1135 LOGOP (O_AND, RD_EA;
1141 LOGOP (O_XOR, RD_EA;
1145 case O (O_MOV_TO_MEM, SB):
1146 res = GET_B_REG (code->src.reg);
1148 case O (O_MOV_TO_MEM, SW):
1149 res = GET_W_REG (code->src.reg);
1151 case O (O_MOV_TO_MEM, SL):
1152 res = GET_L_REG (code->src.reg);
1156 case O (O_MOV_TO_REG, SB):
1157 res = fetch (&code->src);
1158 SET_B_REG (code->dst.reg, res);
1159 goto just_flags_log8;
1160 case O (O_MOV_TO_REG, SW):
1161 res = fetch (&code->src);
1162 SET_W_REG (code->dst.reg, res);
1163 goto just_flags_log16;
1164 case O (O_MOV_TO_REG, SL):
1165 res = fetch (&code->src);
1166 SET_L_REG (code->dst.reg, res);
1167 goto just_flags_log32;
1169 case O (O_EEPMOV, SB):
1170 case O (O_EEPMOV, SW):
1171 if (h8300hmode || h8300smode)
1173 register unsigned char *_src, *_dst;
1174 unsigned int count = ((code->opcode == O (O_EEPMOV, SW))
1175 ? cpu.regs[R4_REGNUM] & 0xffff
1176 : cpu.regs[R4_REGNUM] & 0xff);
1178 _src = (cpu.regs[R5_REGNUM] < memory_size
1179 ? cpu.memory + cpu.regs[R5_REGNUM]
1180 : cpu.eightbit + (cpu.regs[R5_REGNUM] & 0xff));
1181 if ((_src + count) >= (cpu.memory + memory_size))
1183 if ((_src + count) >= (cpu.eightbit + 0x100))
1186 _dst = (cpu.regs[R6_REGNUM] < memory_size
1187 ? cpu.memory + cpu.regs[R6_REGNUM]
1188 : cpu.eightbit + (cpu.regs[R6_REGNUM] & 0xff));
1189 if ((_dst + count) >= (cpu.memory + memory_size))
1191 if ((_dst + count) >= (cpu.eightbit + 0x100))
1194 memcpy (_dst, _src, count);
1196 cpu.regs[R5_REGNUM] += count;
1197 cpu.regs[R6_REGNUM] += count;
1198 cpu.regs[R4_REGNUM] &= ((code->opcode == O (O_EEPMOV, SW))
1199 ? (~0xffff) : (~0xff));
1200 cycles += 2 * count;
1205 case O (O_ADDS, SL):
1206 SET_L_REG (code->dst.reg,
1207 GET_L_REG (code->dst.reg)
1208 + code->src.literal);
1212 case O (O_SUBS, SL):
1213 SET_L_REG (code->dst.reg,
1214 GET_L_REG (code->dst.reg)
1215 - code->src.literal);
1219 rd = fetch (&code->dst);
1220 ea = fetch (&code->src);
1223 goto just_flags_alu8;
1226 rd = fetch (&code->dst);
1227 ea = fetch (&code->src);
1230 goto just_flags_alu16;
1233 rd = fetch (&code->dst);
1234 ea = fetch (&code->src);
1237 goto just_flags_alu32;
1241 rd = GET_B_REG (code->src.reg);
1244 SET_B_REG (code->src.reg, res);
1245 goto just_flags_inc8;
1248 rd = GET_W_REG (code->dst.reg);
1249 ea = -code->src.literal;
1251 SET_W_REG (code->dst.reg, res);
1252 goto just_flags_inc16;
1255 rd = GET_L_REG (code->dst.reg);
1256 ea = -code->src.literal;
1258 SET_L_REG (code->dst.reg, res);
1259 goto just_flags_inc32;
1263 rd = GET_B_REG (code->src.reg);
1266 SET_B_REG (code->src.reg, res);
1267 goto just_flags_inc8;
1270 rd = GET_W_REG (code->dst.reg);
1271 ea = code->src.literal;
1273 SET_W_REG (code->dst.reg, res);
1274 goto just_flags_inc16;
1277 rd = GET_L_REG (code->dst.reg);
1278 ea = code->src.literal;
1280 SET_L_REG (code->dst.reg, res);
1281 goto just_flags_inc32;
1283 #define GET_CCR(x) BUILDSR();x = cpu.ccr
1284 #define GET_EXR(x) BUILDEXR ();x = cpu.exr
1288 res = fetch (&code->src);
1292 if (code->src.type == OP_CCR)
1296 else if (code->src.type == OP_EXR && h8300smode)
1302 store (&code->dst, res);
1305 case O (O_ANDC, SB):
1306 if (code->dst.type == OP_CCR)
1310 else if (code->dst.type == OP_EXR && h8300smode)
1316 ea = code->src.literal;
1321 if (code->dst.type == OP_CCR)
1325 else if (code->dst.type == OP_EXR && h8300smode)
1331 ea = code->src.literal;
1335 case O (O_XORC, SB):
1336 if (code->dst.type == OP_CCR)
1340 else if (code->dst.type == OP_EXR && h8300smode)
1346 ea = code->src.literal;
1387 if (((Z || (N ^ V)) == 0))
1393 if (((Z || (N ^ V)) == 1))
1427 /* Trap for Command Line setup. */
1428 case O (O_SYS_CMDLINE, SB):
1430 int i = 0; /* Loop counter. */
1431 int j = 0; /* Loop counter. */
1432 int ind_arg_len = 0; /* Length of each argument. */
1433 int no_of_args = 0; /* The no. or cmdline args. */
1434 int current_location = 0; /* Location of string. */
1435 int old_sp = 0; /* The Initial Stack Pointer. */
1436 int no_of_slots = 0; /* No. of slots required on the stack
1437 for storing cmdline args. */
1438 int sp_move = 0; /* No. of locations by which the stack needs
1440 int new_sp = 0; /* The final stack pointer location passed
1442 int *argv_ptrs; /* Pointers of argv strings to be stored. */
1443 int argv_ptrs_location = 0; /* Location of pointers to cmdline
1444 args on the stack. */
1445 int char_ptr_size = 0; /* Size of a character pointer on
1447 int addr_cmdline = 0; /* Memory location where cmdline has
1449 int size_cmdline = 0; /* Size of cmdline. */
1451 /* Set the address of 256 free locations where command line is
1453 addr_cmdline = cmdline_location();
1454 cpu.regs[0] = addr_cmdline;
1456 /* Counting the no. of commandline arguments. */
1457 for (i = 0; ptr_command_line[i] != NULL; i++)
1460 /* No. of arguments in the command line. */
1463 /* Current location is just a temporary variable,which we are
1464 setting to the point to the start of our commandline string. */
1465 current_location = addr_cmdline;
1467 /* Allocating space for storing pointers of the command line
1469 argv_ptrs = (int *) malloc (sizeof (int) * no_of_args);
1471 /* Setting char_ptr_size to the sizeof (char *) on the different
1473 if (h8300hmode || h8300smode)
1482 for (i = 0; i < no_of_args; i++)
1486 /* The size of the commandline argument. */
1487 ind_arg_len = (strlen (ptr_command_line[i]) + 1);
1489 /* The total size of the command line string. */
1490 size_cmdline += ind_arg_len;
1492 /* As we have only 256 bytes, we need to provide a graceful
1493 exit. Anyways, a program using command line arguments
1494 where we cannot store all the command line arguments
1495 given may behave unpredictably. */
1496 if (size_cmdline >= 256)
1503 /* current_location points to the memory where the next
1504 commandline argument is stored. */
1505 argv_ptrs[i] = current_location;
1506 for (j = 0; j < ind_arg_len; j++)
1508 SET_MEMORY_B ((current_location +
1509 (sizeof (char) * j)),
1510 *(ptr_command_line[i] +
1511 sizeof (char) * j));
1514 /* Setting current_location to the starting of next
1516 current_location += ind_arg_len;
1520 /* This is the original position of the stack pointer. */
1521 old_sp = cpu.regs[7];
1523 /* We need space from the stack to store the pointers to argvs. */
1524 /* As we will infringe on the stack, we need to shift the stack
1525 pointer so that the data is not overwritten. We calculate how
1526 much space is required. */
1527 sp_move = (no_of_args) * (char_ptr_size);
1529 /* The final position of stack pointer, we have thus taken some
1530 space from the stack. */
1531 new_sp = old_sp - sp_move;
1533 /* Temporary variable holding value where the argv pointers need
1535 argv_ptrs_location = new_sp;
1537 /* The argv pointers are stored at sequential locations. As per
1539 for (i = 0; i < no_of_args; i++)
1541 /* Saving the argv pointer. */
1542 if (h8300hmode || h8300smode)
1544 SET_MEMORY_L (argv_ptrs_location, argv_ptrs[i]);
1548 SET_MEMORY_W (argv_ptrs_location, argv_ptrs[i]);
1551 /* The next location where the pointer to the next argv
1552 string has to be stored. */
1553 argv_ptrs_location += char_ptr_size;
1556 /* Required by POSIX, Setting 0x0 at the end of the list of argv
1558 if (h8300hmode || h8300smode)
1560 SET_MEMORY_L (old_sp, 0x0);
1564 SET_MEMORY_W (old_sp, 0x0);
1567 /* Freeing allocated memory. */
1569 for (i = 0; i <= no_of_args; i++)
1571 free (ptr_command_line[i]);
1573 free (ptr_command_line);
1575 /* The no. of argv arguments are returned in Reg 0. */
1576 cpu.regs[0] = no_of_args;
1577 /* The Pointer to argv in Register 1. */
1578 cpu.regs[1] = new_sp;
1579 /* Setting the stack pointer to the new value. */
1580 cpu.regs[7] = new_sp;
1584 /* System call processing starts. */
1585 case O (O_SYS_OPEN, SB):
1587 int len = 0; /* Length of filename. */
1588 char *filename; /* Filename would go here. */
1589 char temp_char; /* Temporary character */
1590 int mode = 0; /* Mode bits for the file. */
1591 int open_return; /* Return value of open, file descriptor. */
1592 int i; /* Loop counter */
1593 int filename_ptr; /* Pointer to filename in cpu memory. */
1595 /* Setting filename_ptr to first argument of open. */
1596 filename_ptr = h8300hmode ? GET_L_REG (0) : GET_W_REG (0);
1598 /* Trying to get mode. */
1599 if (h8300hmode || h8300smode)
1601 mode = GET_MEMORY_L (cpu.regs[7] + 4);
1605 mode = GET_MEMORY_W (cpu.regs[7] + 2);
1608 /* Trying to find the length of the filename. */
1609 temp_char = GET_MEMORY_B (cpu.regs[0]);
1612 while (temp_char != '\0')
1614 temp_char = GET_MEMORY_B (filename_ptr + len);
1618 /* Allocating space for the filename. */
1619 filename = (char *) malloc (sizeof (char) * len);
1621 /* String copying the filename from memory. */
1622 for (i = 0; i < len; i++)
1624 temp_char = GET_MEMORY_B (filename_ptr + i);
1625 filename[i] = temp_char;
1628 /* Callback to open and return the file descriptor. */
1629 open_return = sim_callback->open (sim_callback, filename, mode);
1631 /* Return value in register 0. */
1632 cpu.regs[0] = open_return;
1634 /* Freeing memory used for filename. */
1639 case O (O_SYS_READ, SB):
1641 char *char_ptr; /* Where characters read would be stored. */
1642 int fd; /* File descriptor */
1643 int buf_size; /* BUF_SIZE parameter in read. */
1644 int i = 0; /* Temporary Loop counter */
1645 int read_return = 0; /* Return value from callback to
1648 fd = h8300hmode ? GET_L_REG (0) : GET_W_REG (0);
1649 buf_size = h8300hmode ? GET_L_REG (2) : GET_W_REG (2);
1651 char_ptr = (char *) malloc (sizeof (char) * buf_size);
1653 /* Callback to read and return the no. of characters read. */
1655 sim_callback->read (sim_callback, fd, char_ptr, buf_size);
1657 /* The characters read are stored in cpu memory. */
1658 for (i = 0; i < buf_size; i++)
1660 SET_MEMORY_B ((cpu.regs[1] + (sizeof (char) * i)),
1661 *(char_ptr + (sizeof (char) * i)));
1664 /* Return value in Register 0. */
1665 cpu.regs[0] = read_return;
1667 /* Freeing memory used as buffer. */
1672 case O (O_SYS_WRITE, SB):
1674 int fd; /* File descriptor */
1675 char temp_char; /* Temporary character */
1676 int len; /* Length of write, Parameter II to write. */
1677 int char_ptr; /* Character Pointer, Parameter I of write. */
1678 char *ptr; /* Where characters to be written are stored.
1680 int write_return; /* Return value from callback to write. */
1681 int i = 0; /* Loop counter */
1683 fd = h8300hmode ? GET_L_REG (0) : GET_W_REG (0);
1684 char_ptr = h8300hmode ? GET_L_REG (1) : GET_W_REG (1);
1685 len = h8300hmode ? GET_L_REG (2) : GET_W_REG (2);
1687 /* Allocating space for the characters to be written. */
1688 ptr = (char *) malloc (sizeof (char) * len);
1690 /* Fetching the characters from cpu memory. */
1691 for (i = 0; i < len; i++)
1693 temp_char = GET_MEMORY_B (char_ptr + i);
1697 /* Callback write and return the no. of characters written. */
1698 write_return = sim_callback->write (sim_callback, fd, ptr, len);
1700 /* Return value in Register 0. */
1701 cpu.regs[0] = write_return;
1703 /* Freeing memory used as buffer. */
1708 case O (O_SYS_LSEEK, SB):
1710 int fd; /* File descriptor */
1711 int offset; /* Offset */
1712 int origin; /* Origin */
1713 int lseek_return; /* Return value from callback to lseek. */
1715 fd = h8300hmode ? GET_L_REG (0) : GET_W_REG (0);
1716 offset = h8300hmode ? GET_L_REG (1) : GET_W_REG (1);
1717 origin = h8300hmode ? GET_L_REG (2) : GET_W_REG (2);
1719 /* Callback lseek and return offset. */
1721 sim_callback->lseek (sim_callback, fd, offset, origin);
1723 /* Return value in register 0. */
1724 cpu.regs[0] = lseek_return;
1728 case O (O_SYS_CLOSE, SB):
1730 int fd; /* File descriptor */
1731 int close_return; /* Return value from callback to close. */
1733 fd = h8300hmode ? GET_L_REG (0) : GET_W_REG (0);
1735 /* Callback close and return. */
1736 close_return = sim_callback->close (sim_callback, fd);
1738 /* Return value in register 0. */
1739 cpu.regs[0] = close_return;
1743 case O (O_SYS_FSTAT, SB):
1745 int fd; /* File descriptor */
1746 struct stat stat_rec; /* Stat record */
1747 int fstat_return; /* Return value from callback to stat. */
1748 int stat_ptr; /* Pointer to stat record. */
1749 char *temp_stat_ptr; /* Temporary stat_rec pointer. */
1751 fd = h8300hmode ? GET_L_REG (0) : GET_W_REG (0);
1753 /* Setting stat_ptr to second argument of stat. */
1754 stat_ptr = h8300hmode ? GET_L_REG (1) : GET_W_REG (1);
1756 /* Callback stat and return. */
1757 fstat_return = sim_callback->fstat (sim_callback, fd, &stat_rec);
1759 /* Have stat_ptr point to starting of stat_rec. */
1760 temp_stat_ptr = (char *) (&stat_rec);
1762 /* Setting up the stat structure returned. */
1763 SET_MEMORY_W (stat_ptr, stat_rec.st_dev);
1765 SET_MEMORY_W (stat_ptr, stat_rec.st_ino);
1767 SET_MEMORY_L (stat_ptr, stat_rec.st_mode);
1769 SET_MEMORY_W (stat_ptr, stat_rec.st_nlink);
1771 SET_MEMORY_W (stat_ptr, stat_rec.st_uid);
1773 SET_MEMORY_W (stat_ptr, stat_rec.st_gid);
1775 SET_MEMORY_W (stat_ptr, stat_rec.st_rdev);
1777 SET_MEMORY_L (stat_ptr, stat_rec.st_size);
1779 SET_MEMORY_L (stat_ptr, stat_rec.st_atime);
1781 SET_MEMORY_L (stat_ptr, stat_rec.st_mtime);
1783 SET_MEMORY_L (stat_ptr, stat_rec.st_ctime);
1785 /* Return value in register 0. */
1786 cpu.regs[0] = fstat_return;
1790 case O (O_SYS_STAT, SB):
1792 int len = 0; /* Length of filename. */
1793 char *filename; /* Filename would go here. */
1794 char temp_char; /* Temporary character */
1795 int filename_ptr; /* Pointer to filename in cpu memory. */
1796 struct stat stat_rec; /* Stat record */
1797 int stat_return; /* Return value from callback to stat */
1798 int stat_ptr; /* Pointer to stat record. */
1799 char *temp_stat_ptr; /* Temporary stat_rec pointer. */
1800 int i = 0; /* Loop Counter */
1802 /* Setting filename_ptr to first argument of open. */
1803 filename_ptr = h8300hmode ? GET_L_REG (0) : GET_W_REG (0);
1805 /* Trying to find the length of the filename. */
1806 temp_char = GET_MEMORY_B (cpu.regs[0]);
1809 while (temp_char != '\0')
1811 temp_char = GET_MEMORY_B (filename_ptr + len);
1815 /* Allocating space for the filename. */
1816 filename = (char *) malloc (sizeof (char) * len);
1818 /* String copying the filename from memory. */
1819 for (i = 0; i < len; i++)
1821 temp_char = GET_MEMORY_B (filename_ptr + i);
1822 filename[i] = temp_char;
1825 /* Setting stat_ptr to second argument of stat. */
1826 /* stat_ptr = cpu.regs[1]; */
1827 stat_ptr = h8300hmode ? GET_L_REG (1) : GET_W_REG (1);
1829 /* Callback stat and return. */
1831 sim_callback->stat (sim_callback, filename, &stat_rec);
1833 /* Have stat_ptr point to starting of stat_rec. */
1834 temp_stat_ptr = (char *) (&stat_rec);
1836 /* Freeing memory used for filename. */
1839 /* Setting up the stat structure returned. */
1840 SET_MEMORY_W (stat_ptr, stat_rec.st_dev);
1842 SET_MEMORY_W (stat_ptr, stat_rec.st_ino);
1844 SET_MEMORY_L (stat_ptr, stat_rec.st_mode);
1846 SET_MEMORY_W (stat_ptr, stat_rec.st_nlink);
1848 SET_MEMORY_W (stat_ptr, stat_rec.st_uid);
1850 SET_MEMORY_W (stat_ptr, stat_rec.st_gid);
1852 SET_MEMORY_W (stat_ptr, stat_rec.st_rdev);
1854 SET_MEMORY_L (stat_ptr, stat_rec.st_size);
1856 SET_MEMORY_L (stat_ptr, stat_rec.st_atime);
1858 SET_MEMORY_L (stat_ptr, stat_rec.st_mtime);
1860 SET_MEMORY_L (stat_ptr, stat_rec.st_ctime);
1862 /* Return value in register 0. */
1863 cpu.regs[0] = stat_return;
1866 /* End of system call processing. */
1868 ONOT (O_NOT, rd = ~rd; v = 0;);
1870 c = rd & hm; v = 0; rd <<= 1,
1871 c = rd & (hm >> 1); v = 0; rd <<= 2);
1873 c = rd & 1; v = 0; rd = (unsigned int) rd >> 1,
1874 c = rd & 2; v = 0; rd = (unsigned int) rd >> 2);
1876 c = rd & hm; v = (rd & hm) != ((rd & (hm >> 1)) << 1); rd <<= 1,
1877 c = rd & (hm >> 1); v = (rd & (hm >> 1)) != ((rd & (hm >> 2)) << 2); rd <<= 2);
1879 t = rd & hm; c = rd & 1; v = 0; rd >>= 1; rd |= t,
1880 t = rd & hm; c = rd & 2; v = 0; rd >>= 2; rd |= t | t >> 1);
1882 c = rd & hm; v = 0; rd <<= 1; rd |= C,
1883 c = rd & hm; v = 0; rd <<= 1; rd |= C; c = rd & hm; rd <<= 1; rd |= C);
1885 c = rd & 1; v = 0; rd = (unsigned int) rd >> 1; if (c) rd |= hm,
1886 c = rd & 1; v = 0; rd = (unsigned int) rd >> 1; if (c) rd |= hm; c = rd & 1; rd = (unsigned int) rd >> 1; if (c) rd |= hm);
1888 t = rd & hm; rd <<= 1; rd |= C; c = t; v = 0,
1889 t = rd & hm; rd <<= 1; rd |= C; c = t; v = 0; t = rd & hm; rd <<= 1; rd |= C; c = t);
1891 t = rd & 1; rd = (unsigned int) rd >> 1; if (C) rd |= hm; c = t; v = 0,
1892 t = rd & 1; rd = (unsigned int) rd >> 1; if (C) rd |= hm; c = t; v = 0; t = rd & 1; rd = (unsigned int) rd >> 1; if (C) rd |= hm; c = t);
1896 pc = fetch (&code->src);
1904 pc = fetch (&code->src);
1911 SET_MEMORY_L (tmp, code->next_pc);
1916 SET_MEMORY_W (tmp, code->next_pc);
1923 pc = code->src.literal;
1934 pc = GET_MEMORY_L (tmp);
1939 pc = GET_MEMORY_W (tmp);
1948 cpu.state = SIM_STATE_STOPPED;
1949 cpu.exception = SIGILL;
1951 case O (O_SLEEP, SN):
1952 /* FIXME: Doesn't this break for breakpoints when r0
1953 contains just the right (er, wrong) value? */
1954 cpu.state = SIM_STATE_STOPPED;
1955 /* The format of r0 is defined by target newlib. Expand
1956 the macros here instead of looking for .../sys/wait.h. */
1957 #define SIM_WIFEXITED(v) (((v) & 0xff) == 0)
1958 #define SIM_WIFSIGNALED(v) (((v) & 0x7f) > 0 && (((v) & 0x7f) < 0x7f))
1959 if (! SIM_WIFEXITED (cpu.regs[0]) && SIM_WIFSIGNALED (cpu.regs[0]))
1960 cpu.exception = SIGILL;
1962 cpu.exception = SIGTRAP;
1965 cpu.state = SIM_STATE_STOPPED;
1966 cpu.exception = SIGTRAP;
1969 OBITOP (O_BNOT, 1, 1, ea ^= m);
1970 OBITOP (O_BTST, 1, 0, nz = ea & m);
1971 OBITOP (O_BCLR, 1, 1, ea &= ~m);
1972 OBITOP (O_BSET, 1, 1, ea |= m);
1973 OBITOP (O_BLD, 1, 0, c = ea & m);
1974 OBITOP (O_BILD, 1, 0, c = !(ea & m));
1975 OBITOP (O_BST, 1, 1, ea &= ~m;
1977 OBITOP (O_BIST, 1, 1, ea &= ~m;
1979 OBITOP (O_BAND, 1, 0, c = (ea & m) && C);
1980 OBITOP (O_BIAND, 1, 0, c = !(ea & m) && C);
1981 OBITOP (O_BOR, 1, 0, c = (ea & m) || C);
1982 OBITOP (O_BIOR, 1, 0, c = !(ea & m) || C);
1983 OBITOP (O_BXOR, 1, 0, c = ((ea & m) != 0) != C);
1984 OBITOP (O_BIXOR, 1, 0, c = !(ea & m) != C);
1986 #define MOP(bsize, signed) \
1987 mop (code, bsize, signed); \
1990 case O (O_MULS, SB):
1993 case O (O_MULS, SW):
1996 case O (O_MULU, SB):
1999 case O (O_MULU, SW):
2004 if (!h8300smode || code->src.type != X (OP_REG, SL))
2006 switch (code->src.reg)
2016 res = fetch (&code->src);
2017 store (&code->src, res | 0x80);
2018 goto just_flags_log8;
2020 case O (O_DIVU, SB):
2022 rd = GET_W_REG (code->dst.reg);
2023 ea = GET_B_REG (code->src.reg);
2026 tmp = (unsigned) rd % ea;
2027 rd = (unsigned) rd / ea;
2029 SET_W_REG (code->dst.reg, (rd & 0xff) | (tmp << 8));
2035 case O (O_DIVU, SW):
2037 rd = GET_L_REG (code->dst.reg);
2038 ea = GET_W_REG (code->src.reg);
2043 tmp = (unsigned) rd % ea;
2044 rd = (unsigned) rd / ea;
2046 SET_L_REG (code->dst.reg, (rd & 0xffff) | (tmp << 16));
2050 case O (O_DIVS, SB):
2053 rd = SEXTSHORT (GET_W_REG (code->dst.reg));
2054 ea = SEXTCHAR (GET_B_REG (code->src.reg));
2057 tmp = (int) rd % (int) ea;
2058 rd = (int) rd / (int) ea;
2064 SET_W_REG (code->dst.reg, (rd & 0xff) | (tmp << 8));
2067 case O (O_DIVS, SW):
2069 rd = GET_L_REG (code->dst.reg);
2070 ea = SEXTSHORT (GET_W_REG (code->src.reg));
2073 tmp = (int) rd % (int) ea;
2074 rd = (int) rd / (int) ea;
2075 n = rd & 0x80000000;
2080 SET_L_REG (code->dst.reg, (rd & 0xffff) | (tmp << 16));
2083 case O (O_EXTS, SW):
2084 rd = GET_W_REG (code->src.reg) & 0xff; /* Yes, src, not dst. */
2085 ea = rd & 0x80 ? -256 : 0;
2088 case O (O_EXTS, SL):
2089 rd = GET_W_REG (code->src.reg) & 0xffff;
2090 ea = rd & 0x8000 ? -65536 : 0;
2093 case O (O_EXTU, SW):
2094 rd = GET_W_REG (code->src.reg) & 0xff;
2098 case O (O_EXTU, SL):
2099 rd = GET_W_REG (code->src.reg) & 0xffff;
2109 int nregs, firstreg, i;
2111 nregs = GET_MEMORY_B (pc + 1);
2114 firstreg = GET_MEMORY_B (pc + 3);
2116 for (i = firstreg; i <= firstreg + nregs; i++)
2119 SET_MEMORY_L (cpu.regs[7], cpu.regs[i]);
2126 int nregs, firstreg, i;
2128 nregs = GET_MEMORY_B (pc + 1);
2131 firstreg = GET_MEMORY_B (pc + 3);
2133 for (i = firstreg; i >= firstreg - nregs; i--)
2135 cpu.regs[i] = GET_MEMORY_L (cpu.regs[7]);
2142 /* Decimal Adjust Addition. This is for BCD arithmetic. */
2143 res = GET_B_REG (code->src.reg);
2144 if (!c && (0 <= (res >> 4) && (res >> 4) <= 9)
2145 && !h && (0 <= (res & 0xf) && (res & 0xf) <= 9))
2146 res = res; /* Value added == 0. */
2147 else if (!c && (0 <= (res >> 4) && (res >> 4) <= 8)
2148 && !h && (10 <= (res & 0xf) && (res & 0xf) <= 15))
2149 res = res + 0x6; /* Value added == 6. */
2150 else if (!c && (0 <= (res >> 4) && (res >> 4) <= 9)
2151 && h && (0 <= (res & 0xf) && (res & 0xf) <= 3))
2152 res = res + 0x6; /* Value added == 6. */
2153 else if (!c && (10 <= (res >> 4) && (res >> 4) <= 15)
2154 && !h && (0 <= (res & 0xf) && (res & 0xf) <= 9))
2155 res = res + 0x60; /* Value added == 60. */
2156 else if (!c && (9 <= (res >> 4) && (res >> 4) <= 15)
2157 && !h && (10 <= (res & 0xf) && (res & 0xf) <= 15))
2158 res = res + 0x66; /* Value added == 66. */
2159 else if (!c && (10 <= (res >> 4) && (res >> 4) <= 15)
2160 && h && (0 <= (res & 0xf) && (res & 0xf) <= 3))
2161 res = res + 0x66; /* Value added == 66. */
2162 else if (c && (1 <= (res >> 4) && (res >> 4) <= 2)
2163 && !h && (0 <= (res & 0xf) && (res & 0xf) <= 9))
2164 res = res + 0x160; /* Value added == 60, plus 'carry'. */
2165 else if (c && (1 <= (res >> 4) && (res >> 4) <= 2)
2166 && !h && (10 <= (res & 0xf) && (res & 0xf) <= 15))
2167 res = res + 0x166; /* Value added == 66, plus 'carry'. */
2168 else if (c && (1 <= (res >> 4) && (res >> 4) <= 3)
2169 && h && (0 <= (res & 0xf) && (res & 0xf) <= 3))
2170 res = res + 0x166; /* Value added == 66, plus 'carry'. */
2175 /* Decimal Adjust Subtraction. This is for BCD arithmetic. */
2176 res = GET_B_REG (code->src.reg); /* FIXME fetch, fetch2... */
2177 if (!c && (0 <= (res >> 4) && (res >> 4) <= 9)
2178 && !h && (0 <= (res & 0xf) && (res & 0xf) <= 9))
2179 res = res; /* Value added == 0. */
2180 else if (!c && (0 <= (res >> 4) && (res >> 4) <= 8)
2181 && h && (6 <= (res & 0xf) && (res & 0xf) <= 15))
2182 res = res + 0xfa; /* Value added == 0xfa. */
2183 else if (c && (7 <= (res >> 4) && (res >> 4) <= 15)
2184 && !h && (0 <= (res & 0xf) && (res & 0xf) <= 9))
2185 res = res + 0xa0; /* Value added == 0xa0. */
2186 else if (c && (6 <= (res >> 4) && (res >> 4) <= 15)
2187 && h && (6 <= (res & 0xf) && (res & 0xf) <= 15))
2188 res = res + 0x9a; /* Value added == 0x9a. */
2194 cpu.state = SIM_STATE_STOPPED;
2195 cpu.exception = SIGILL;
2202 if (code->dst.type == OP_CCR)
2207 else if (code->dst.type == OP_EXR && h8300smode)
2218 /* When a branch works */
2219 pc = code->src.literal;
2222 /* Set the cond codes from res */
2225 /* Set the flags after an 8 bit inc/dec operation */
2229 v = (rd & 0x7f) == 0x7f;
2233 /* Set the flags after an 16 bit inc/dec operation */
2237 v = (rd & 0x7fff) == 0x7fff;
2241 /* Set the flags after an 32 bit inc/dec operation */
2243 n = res & 0x80000000;
2244 nz = res & 0xffffffff;
2245 v = (rd & 0x7fffffff) == 0x7fffffff;
2250 /* Set flags after an 8 bit shift op, carry,overflow set in insn */
2253 SET_B_REG (code->src.reg, rd);
2257 /* Set flags after an 16 bit shift op, carry,overflow set in insn */
2260 SET_W_REG (code->src.reg, rd);
2264 /* Set flags after an 32 bit shift op, carry,overflow set in insn */
2265 n = (rd & 0x80000000);
2266 nz = rd & 0xffffffff;
2267 SET_L_REG (code->src.reg, rd);
2271 store (&code->dst, res);
2273 /* flags after a 32bit logical operation */
2274 n = res & 0x80000000;
2275 nz = res & 0xffffffff;
2280 store (&code->dst, res);
2282 /* flags after a 16bit logical operation */
2290 store (&code->dst, res);
2298 SET_B_REG (code->dst.reg, res);
2303 switch (code->opcode / 4)
2306 v = ((rd & 0x80) == (ea & 0x80)
2307 && (rd & 0x80) != (res & 0x80));
2311 v = ((rd & 0x80) != (-ea & 0x80)
2312 && (rd & 0x80) != (res & 0x80));
2321 SET_W_REG (code->dst.reg, res);
2325 c = (res & 0x10000);
2326 switch (code->opcode / 4)
2329 v = ((rd & 0x8000) == (ea & 0x8000)
2330 && (rd & 0x8000) != (res & 0x8000));
2334 v = ((rd & 0x8000) != (-ea & 0x8000)
2335 && (rd & 0x8000) != (res & 0x8000));
2344 SET_L_REG (code->dst.reg, res);
2346 n = res & 0x80000000;
2347 nz = res & 0xffffffff;
2348 switch (code->opcode / 4)
2351 v = ((rd & 0x80000000) == (ea & 0x80000000)
2352 && (rd & 0x80000000) != (res & 0x80000000));
2353 c = ((unsigned) res < (unsigned) rd) || ((unsigned) res < (unsigned) ea);
2357 v = ((rd & 0x80000000) != (-ea & 0x80000000)
2358 && (rd & 0x80000000) != (res & 0x80000000));
2359 c = (unsigned) rd < (unsigned) -ea;
2362 v = (rd == 0x80000000);
2378 if (--poll_count < 0)
2380 poll_count = POLL_QUIT_INTERVAL;
2381 if ((*sim_callback->poll_quit) != NULL
2382 && (*sim_callback->poll_quit) (sim_callback))
2387 while (cpu.state == SIM_STATE_RUNNING);
2388 cpu.ticks += get_now () - tick_start;
2389 cpu.cycles += cycles;
2396 signal (SIGINT, prev);
2400 sim_trace (SIM_DESC sd)
2402 /* FIXME: Unfinished. */
2407 sim_write (SIM_DESC sd, SIM_ADDR addr, unsigned char *buffer, int size)
2414 for (i = 0; i < size; i++)
2416 if (addr < memory_size)
2418 cpu.memory[addr + i] = buffer[i];
2419 cpu.cache_idx[addr + i] = 0;
2422 cpu.eightbit[(addr + i) & 0xff] = buffer[i];
2428 sim_read (SIM_DESC sd, SIM_ADDR addr, unsigned char *buffer, int size)
2433 if (addr < memory_size)
2434 memcpy (buffer, cpu.memory + addr, size);
2436 memcpy (buffer, cpu.eightbit + (addr & 0xff), size);
2442 sim_store_register (SIM_DESC sd, int rn, unsigned char *value, int length)
2447 longval = (value[0] << 24) | (value[1] << 16) | (value[2] << 8) | value[3];
2448 shortval = (value[0] << 8) | (value[1]);
2449 intval = h8300hmode ? longval : shortval;
2467 cpu.regs[rn] = intval;
2476 cpu.cycles = longval;
2480 cpu.insts = longval;
2484 cpu.ticks = longval;
2491 sim_fetch_register (SIM_DESC sd, int rn, unsigned char *buf, int length)
2498 if (!h8300smode && rn >= EXR_REGNUM)
2536 if (h8300hmode || longreg)
2552 sim_stop_reason (SIM_DESC sd, enum sim_stop *reason, int *sigrc)
2554 #if 0 /* FIXME: This should work but we can't use it.
2555 grep for SLEEP above. */
2558 case SIM_STATE_EXITED : *reason = sim_exited; break;
2559 case SIM_STATE_SIGNALLED : *reason = sim_signalled; break;
2560 case SIM_STATE_STOPPED : *reason = sim_stopped; break;
2564 *reason = sim_stopped;
2566 *sigrc = cpu.exception;
2569 /* FIXME: Rename to sim_set_mem_size. */
2574 /* Memory size is fixed. */
2578 sim_set_simcache_size (int n)
2584 cpu.cache = (decoded_inst *) malloc (sizeof (decoded_inst) * n);
2585 memset (cpu.cache, 0, sizeof (decoded_inst) * n);
2591 sim_info (SIM_DESC sd, int verbose)
2593 double timetaken = (double) cpu.ticks / (double) now_persec ();
2594 double virttime = cpu.cycles / 10.0e6;
2596 (*sim_callback->printf_filtered) (sim_callback,
2597 "\n\n#instructions executed %10d\n",
2599 (*sim_callback->printf_filtered) (sim_callback,
2600 "#cycles (v approximate) %10d\n",
2602 (*sim_callback->printf_filtered) (sim_callback,
2603 "#real time taken %10.4f\n",
2605 (*sim_callback->printf_filtered) (sim_callback,
2606 "#virtual time taked %10.4f\n",
2608 if (timetaken != 0.0)
2609 (*sim_callback->printf_filtered) (sim_callback,
2610 "#simulation ratio %10.4f\n",
2611 virttime / timetaken);
2612 (*sim_callback->printf_filtered) (sim_callback,
2615 (*sim_callback->printf_filtered) (sim_callback,
2616 "#cache size %10d\n",
2620 /* This to be conditional on `what' (aka `verbose'),
2621 however it was never passed as non-zero. */
2625 for (i = 0; i < O_LAST; i++)
2628 (*sim_callback->printf_filtered) (sim_callback,
2629 "%d: %d\n", i, cpu.stats[i]);
2635 /* Indicate whether the cpu is an H8/300 or H8/300H.
2636 FLAG is non-zero for the H8/300H. */
2639 set_h8300h (int h_flag, int s_flag)
2641 /* FIXME: Much of the code in sim_load can be moved to sim_open.
2642 This function being replaced by a sim_open:ARGV configuration
2644 h8300hmode = h_flag;
2645 h8300smode = s_flag;
2649 sim_open (SIM_OPEN_KIND kind,
2650 struct host_callback_struct *ptr,
2654 /* FIXME: Much of the code in sim_load can be moved here. */
2659 /* Fudge our descriptor. */
2660 return (SIM_DESC) 1;
2664 sim_close (SIM_DESC sd, int quitting)
2666 /* Nothing to do. */
2669 /* Called by gdb to load a program into memory. */
2672 sim_load (SIM_DESC sd, char *prog, bfd *abfd, int from_tty)
2676 /* FIXME: The code below that sets a specific variant of the H8/300
2677 being simulated should be moved to sim_open(). */
2679 /* See if the file is for the H8/300 or H8/300H. */
2680 /* ??? This may not be the most efficient way. The z8k simulator
2681 does this via a different mechanism (INIT_EXTRA_SYMTAB_INFO). */
2685 prog_bfd = bfd_openr (prog, "coff-h8300");
2686 if (prog_bfd != NULL)
2688 /* Set the cpu type. We ignore failure from bfd_check_format
2689 and bfd_openr as sim_load_file checks too. */
2690 if (bfd_check_format (prog_bfd, bfd_object))
2692 unsigned long mach = bfd_get_mach (prog_bfd);
2693 set_h8300h (mach == bfd_mach_h8300h || mach == bfd_mach_h8300s,
2694 mach == bfd_mach_h8300s);
2698 /* If we're using gdb attached to the simulator, then we have to
2699 reallocate memory for the simulator.
2701 When gdb first starts, it calls fetch_registers (among other
2702 functions), which in turn calls init_pointers, which allocates
2705 The problem is when we do that, we don't know whether we're
2706 debugging an H8/300 or H8/300H program.
2708 This is the first point at which we can make that determination,
2709 so we just reallocate memory now; this will also allow us to handle
2710 switching between H8/300 and H8/300H programs without exiting
2714 memory_size = H8300S_MSIZE;
2715 else if (h8300hmode)
2716 memory_size = H8300H_MSIZE;
2718 memory_size = H8300_MSIZE;
2723 free (cpu.cache_idx);
2725 free (cpu.eightbit);
2727 cpu.memory = (unsigned char *) calloc (sizeof (char), memory_size);
2728 cpu.cache_idx = (unsigned short *) calloc (sizeof (short), memory_size);
2729 cpu.eightbit = (unsigned char *) calloc (sizeof (char), 256);
2731 /* `msize' must be a power of two. */
2732 if ((memory_size & (memory_size - 1)) != 0)
2734 cpu.mask = memory_size - 1;
2736 if (sim_load_file (sd, myname, sim_callback, prog, prog_bfd,
2737 sim_kind == SIM_OPEN_DEBUG,
2741 /* Close the bfd if we opened it. */
2742 if (abfd == NULL && prog_bfd != NULL)
2743 bfd_close (prog_bfd);
2747 /* Close the bfd if we opened it. */
2748 if (abfd == NULL && prog_bfd != NULL)
2749 bfd_close (prog_bfd);
2754 sim_create_inferior (SIM_DESC sd, struct bfd *abfd, char **argv, char **env)
2761 cpu.pc = bfd_get_start_address (abfd);
2765 /* Command Line support. */
2768 /* Counting the no. of commandline arguments. */
2769 for (no_of_args = 0; argv[no_of_args] != NULL; no_of_args++)
2772 /* Allocating memory for the argv pointers. */
2773 ptr_command_line = (char **) malloc ((sizeof (char *))
2774 * (no_of_args + 1));
2776 for (i = 0; i < no_of_args; i++)
2778 /* Calculating the length of argument for allocating memory. */
2779 len_arg = strlen (argv[i] + 1);
2780 ptr_command_line[i] = (char *) malloc (sizeof (char) * len_arg);
2781 /* Copying the argument string. */
2782 ptr_command_line[i] = (char *) strdup (argv[i]);
2784 ptr_command_line[i] = NULL;
2791 sim_do_command (SIM_DESC sd, char *cmd)
2793 (*sim_callback->printf_filtered) (sim_callback,
2794 "This simulator does not accept any commands.\n");
2798 sim_set_callbacks (struct host_callback_struct *ptr)