5 #include "remote-sim.h"
9 #define IMEM_SIZE 18 /* D10V instruction memory size is 18 bits */
10 #define DMEM_SIZE 16 /* Data memory is 64K (but only 32K internal RAM) */
11 #define UMEM_SIZE 17 /* Each unified memory segment is 17 bits */
12 #define UMEM_SEGMENTS 128 /* Number of segments in unified memory region */
14 enum _leftright { LEFT_FIRST, RIGHT_FIRST };
17 static SIM_OPEN_KIND sim_kind;
19 host_callback *d10v_callback;
20 unsigned long ins_type_counters[ (int)INS_MAX ];
24 static int init_text_p = 0;
25 /* non-zero if we opened prog_bfd */
26 static int prog_bfd_was_opened_p;
32 static long hash PARAMS ((long insn, int format));
33 static struct hash_entry *lookup_hash PARAMS ((uint32 ins, int size));
34 static void get_operands PARAMS ((struct simops *s, uint32 ins));
35 static void do_long PARAMS ((uint32 ins));
36 static void do_2_short PARAMS ((uint16 ins1, uint16 ins2, enum _leftright leftright));
37 static void do_parallel PARAMS ((uint16 ins1, uint16 ins2));
38 static char *add_commas PARAMS ((char *buf, int sizeof_buf, unsigned long value));
39 static void init_system PARAMS ((void));
40 extern void sim_set_profile PARAMS ((int n));
41 extern void sim_set_profile_size PARAMS ((int n));
44 #if defined(__GNUC__) && defined(__OPTIMIZE__)
45 #define INLINE __inline__
54 struct hash_entry *next;
61 struct hash_entry hash_table[MAX_HASH+1];
68 if (format & LONG_OPCODE)
69 return ((insn & 0x3F000000) >> 24);
71 return((insn & 0x7E00) >> 9);
74 INLINE static struct hash_entry *
75 lookup_hash (ins, size)
82 h = &hash_table[(ins & 0x3F000000) >> 24];
84 h = &hash_table[(ins & 0x7E00) >> 9];
86 while ((ins & h->mask) != h->opcode || h->size != size)
90 (*d10v_callback->printf_filtered) (d10v_callback, "ERROR looking up hash for %x at PC %x\n",ins, PC);
99 get_operands (struct simops *s, uint32 ins)
101 int i, shift, bits, flags;
103 for (i=0; i < s->numops; i++)
105 shift = s->operands[3*i];
106 bits = s->operands[3*i+1];
107 flags = s->operands[3*i+2];
108 mask = 0x7FFFFFFF >> (31 - bits);
109 OP[i] = (ins >> shift) & mask;
120 for (s = prog_bfd->sections; s; s = s->next)
121 if (strcmp (bfd_get_section_name (prog_bfd, s), ".text") == 0)
124 text_start = bfd_get_section_vma (prog_bfd, s);
125 text_end = text_start + bfd_section_size (prog_bfd, s);
130 return (PC << 2) + text_start;
137 struct hash_entry *h;
139 if ((d10v_debug & DEBUG_INSTRUCTION) != 0)
140 (*d10v_callback->printf_filtered) (d10v_callback, "do_long 0x%x\n", ins);
142 h = lookup_hash (ins, 1);
143 get_operands (h->ops, ins);
144 State.ins_type = INS_LONG;
145 ins_type_counters[ (int)State.ins_type ]++;
150 do_2_short (ins1, ins2, leftright)
152 enum _leftright leftright;
154 struct hash_entry *h;
156 enum _ins_type first, second;
159 if ((d10v_debug & DEBUG_INSTRUCTION) != 0)
160 (*d10v_callback->printf_filtered) (d10v_callback, "do_2_short 0x%x (%s) -> 0x%x\n",
161 ins1, (leftright) ? "left" : "right", ins2);
164 if (leftright == LEFT_FIRST)
168 ins_type_counters[ (int)INS_LEFTRIGHT ]++;
174 ins_type_counters[ (int)INS_RIGHTLEFT ]++;
177 h = lookup_hash (ins1, 0);
178 get_operands (h->ops, ins1);
179 State.ins_type = first;
180 ins_type_counters[ (int)State.ins_type ]++;
183 /* If the PC has changed (ie, a jump), don't do the second instruction */
184 if (orig_pc == PC && !State.exception)
186 h = lookup_hash (ins2, 0);
187 get_operands (h->ops, ins2);
188 State.ins_type = second;
189 ins_type_counters[ (int)State.ins_type ]++;
190 ins_type_counters[ (int)INS_CYCLES ]++;
193 else if (orig_pc != PC && !State.exception)
194 ins_type_counters[ (int)INS_COND_JUMP ]++;
198 do_parallel (ins1, ins2)
201 struct hash_entry *h1, *h2;
203 if ((d10v_debug & DEBUG_INSTRUCTION) != 0)
204 (*d10v_callback->printf_filtered) (d10v_callback, "do_parallel 0x%x || 0x%x\n", ins1, ins2);
206 ins_type_counters[ (int)INS_PARALLEL ]++;
207 h1 = lookup_hash (ins1, 0);
208 h2 = lookup_hash (ins2, 0);
210 if (h1->ops->exec_type == PARONLY)
212 get_operands (h1->ops, ins1);
213 State.ins_type = INS_LEFT_COND_TEST;
214 ins_type_counters[ (int)State.ins_type ]++;
218 ins_type_counters[ (int)INS_COND_TRUE ]++;
219 get_operands (h2->ops, ins2);
220 State.ins_type = INS_RIGHT_COND_EXE;
221 ins_type_counters[ (int)State.ins_type ]++;
225 ins_type_counters[ (int)INS_COND_FALSE ]++;
227 else if (h2->ops->exec_type == PARONLY)
229 get_operands (h2->ops, ins2);
230 State.ins_type = INS_RIGHT_COND_TEST;
231 ins_type_counters[ (int)State.ins_type ]++;
235 ins_type_counters[ (int)INS_COND_TRUE ]++;
236 get_operands (h1->ops, ins1);
237 State.ins_type = INS_LEFT_COND_EXE;
238 ins_type_counters[ (int)State.ins_type ]++;
242 ins_type_counters[ (int)INS_COND_FALSE ]++;
246 get_operands (h1->ops, ins1);
247 State.ins_type = INS_LEFT_PARALLEL;
248 ins_type_counters[ (int)State.ins_type ]++;
250 if (!State.exception)
252 get_operands (h2->ops, ins2);
253 State.ins_type = INS_RIGHT_PARALLEL;
254 ins_type_counters[ (int)State.ins_type ]++;
261 add_commas(buf, sizeof_buf, value)
267 char *endbuf = buf + sizeof_buf - 1;
277 *--endbuf = (value % 10) + '0';
278 } while ((value /= 10) != 0);
292 for (i=0;i<UMEM_SEGMENTS;i++)
296 free (State.umem[i]);
297 State.umem[i] = NULL;
304 State.imem = (uint8 *)calloc(1,1<<IMEM_SIZE);
305 State.dmem = (uint8 *)calloc(1,1<<DMEM_SIZE);
306 for (i=1;i<(UMEM_SEGMENTS-1);i++)
307 State.umem[i] = NULL;
308 State.umem[0] = (uint8 *)calloc(1,1<<UMEM_SIZE);
309 State.umem[1] = (uint8 *)calloc(1,1<<UMEM_SIZE);
310 State.umem[2] = (uint8 *)calloc(1,1<<UMEM_SIZE);
311 State.umem[UMEM_SEGMENTS-1] = (uint8 *)calloc(1,1<<UMEM_SIZE);
312 if (!State.imem || !State.dmem || !State.umem[0] || !State.umem[1] || !State.umem[2] || !State.umem[UMEM_SEGMENTS-1] )
314 (*d10v_callback->printf_filtered) (d10v_callback, "Memory allocation failed.\n");
323 if ((d10v_debug & DEBUG_MEMSIZE) != 0)
326 (*d10v_callback->printf_filtered) (d10v_callback,
327 "Allocated %s bytes instruction memory and\n",
328 add_commas (buffer, sizeof (buffer), (1UL<<IMEM_SIZE)));
330 (*d10v_callback->printf_filtered) (d10v_callback, " %s bytes data memory.\n",
331 add_commas (buffer, sizeof (buffer), (1UL<<IMEM_SIZE)));
343 /* Transfer data to/from simulated memory. Since a bug in either the
344 simulated program or in gdb or the simulator itself may cause a
345 bogus address to be passed in, we need to do some sanity checking
346 on addresses to make sure they are within bounds. When an address
347 fails the bounds check, treat it as a zero length read/write rather
348 than aborting the entire run. */
351 xfer_mem (addr, buffer, size, write)
353 unsigned char *buffer;
361 if ((d10v_debug & DEBUG_INSTRUCTION) != 0)
365 (*d10v_callback->printf_filtered) (d10v_callback, "sim_write %d bytes to 0x%x\n", size, addr);
369 (*d10v_callback->printf_filtered) (d10v_callback, "sim_read %d bytes from 0x%x\n", size, addr);
374 /* to access data, we use the following mapping
375 0x00000000 - 0x00ffffff : 16 Mb of external unified memory in segments of 128 Kb each
376 0x01000000 - 0x0103ffff : 256 Kb of external instruction memory
377 0x02000000 - 0x0200ffff : 32 Kb of on chip data memory + 16 Kb DMAP memory + 16 Kb I/O space */
379 if ((addr | 0x00ffffff) == 0x00ffffff)
381 /* UNIFIED MEMORY (0x00000000 - 0x00ffffff) */
382 int startsegment, startoffset; /* Segment and offset within segment where xfer starts */
383 int endsegment, endoffset; /* Segment and offset within segment where xfer ends */
385 startsegment = addr >> UMEM_SIZE;
386 startoffset = addr & ((1 << UMEM_SIZE) - 1);
387 endsegment = (addr + size) >> UMEM_SIZE;
388 endoffset = (addr + size) & ((1 << UMEM_SIZE) - 1);
390 /* FIXME: We do not currently implement xfers across segments, so detect this case and fail gracefully. */
392 if ((startsegment != endsegment) && !((endsegment == (startsegment + 1)) && endoffset == 0))
394 (*d10v_callback->printf_filtered) (d10v_callback, "ERROR: Unimplemented support for transfers across unified memory segment boundaries\n");
397 if (!State.umem[startsegment])
400 if ((d10v_debug & DEBUG_MEMSIZE) != 0)
402 (*d10v_callback->printf_filtered) (d10v_callback,"Allocating %s bytes unified memory to region %d\n",
403 add_commas (buffer, sizeof (buffer), (1UL<<IMEM_SIZE)), startsegment);
406 State.umem[startsegment] = (uint8 *)calloc(1,1<<UMEM_SIZE);
408 if (!State.umem[startsegment])
410 (*d10v_callback->printf_filtered) (d10v_callback, "ERROR: Memory allocation of 0x%x bytes failed.\n", 1<<UMEM_SIZE);
415 memcpy (State.umem[startsegment]+startoffset, buffer, size);
419 memcpy (buffer, State.umem[startsegment]+startoffset, size);
422 else if ((addr | 0x0003ffff) == 0x0103ffff)
424 /* INSTRUCTION MEMORY (0x01000000 - 0x0103ffff) */
425 addr &= ((1 << IMEM_SIZE) - 1);
426 if ((addr + size) > (1 << IMEM_SIZE))
428 (*d10v_callback->printf_filtered) (d10v_callback, "ERROR: instruction address 0x%x is outside range 0-0x%x.\n",
429 addr + size - 1, (1 << IMEM_SIZE) - 1);
434 memcpy (State.imem+addr, buffer, size);
438 memcpy (buffer, State.imem+addr, size);
441 else if ((addr | 0x0000ffff) == 0x0200ffff)
443 /* DATA MEMORY (0x02000000 - 0x0200ffff) */
444 addr &= ((1 << DMEM_SIZE) - 1);
445 if ((addr + size) > (1 << DMEM_SIZE))
447 (*d10v_callback->printf_filtered) (d10v_callback, "ERROR: data address 0x%x is outside range 0-0x%x.\n",
448 addr + size - 1, (1 << DMEM_SIZE) - 1);
453 memcpy (State.dmem+addr, buffer, size);
457 memcpy (buffer, State.dmem+addr, size);
462 (*d10v_callback->printf_filtered) (d10v_callback, "ERROR: address 0x%x is not in valid range\n",addr);
463 (*d10v_callback->printf_filtered) (d10v_callback, "Unified memory addresses are 0x00000000 - 0x00ffffff\n");
464 (*d10v_callback->printf_filtered) (d10v_callback, "Instruction addresses are 0x01000000 - 0x0103ffff\n");
465 (*d10v_callback->printf_filtered) (d10v_callback, "Data addresses are 0x02000000 - 0x0200ffff\n");
474 sim_write_phys (sd, addr, buffer, size)
477 unsigned char *buffer;
480 return xfer_mem( addr, buffer, size, 1);
484 sim_write (sd, addr, buffer, size)
487 unsigned char *buffer;
490 /* FIXME: this should be performing a virtual transfer */
491 return xfer_mem( addr, buffer, size, 1);
495 sim_read (sd, addr, buffer, size)
498 unsigned char *buffer;
501 /* FIXME: this should be performing a virtual transfer */
502 return xfer_mem( addr, buffer, size, 0);
507 sim_open (kind, callback, abfd, argv)
509 host_callback *callback;
514 struct hash_entry *h;
515 static int init_p = 0;
519 d10v_callback = callback;
522 for (p = argv + 1; *p; ++p)
525 if (strcmp (*p, "-t") == 0)
529 (*d10v_callback->printf_filtered) (d10v_callback, "ERROR: unsupported option(s): %s\n",*p);
532 /* put all the opcodes in the hash table */
535 for (s = Simops; s->func; s++)
537 h = &hash_table[hash(s->opcode,s->format)];
539 /* go to the last entry in the chain */
545 h->next = (struct hash_entry *) calloc(1,sizeof(struct hash_entry));
547 perror ("malloc failure");
553 h->opcode = s->opcode;
554 h->size = s->is_long;
558 /* Fudge our descriptor. */
564 sim_close (sd, quitting)
568 if (prog_bfd != NULL && prog_bfd_was_opened_p)
570 bfd_close (prog_bfd);
572 prog_bfd_was_opened_p = 0;
580 (*d10v_callback->printf_filtered) (d10v_callback, "sim_set_profile %d\n",n);
584 sim_set_profile_size (n)
587 (*d10v_callback->printf_filtered) (d10v_callback, "sim_set_profile_size %d\n",n);
601 if ( (addr & 0xfff0) != 0xff00)
603 (*d10v_callback->printf_filtered) (d10v_callback, "Data address 0x%lx is in I/O space, pc = 0x%lx.\n",
604 (long)addr, (long)decode_pc ());
605 State.exception = SIGBUS;
608 return State.dmem + addr;
615 /* instruction memory */
616 return (DMAP & 0xf) * 0x4000 + State.imem;
619 /* this is ugly because we allocate unified memory in 128K segments and */
620 /* dmap addresses 16k segments */
621 seg = (DMAP & 0x3ff) >> 3;
622 if (State.umem[seg] == NULL)
624 (*d10v_callback->printf_filtered) (d10v_callback, "ERROR: unified memory region %d unmapped, pc = 0x%lx\n",
625 seg, (long)decode_pc ());
626 State.exception = SIGBUS;
628 return State.umem[seg] + (DMAP & 7) * 0x4000;
631 return State.dmem + addr;
638 uint32 pc = ((uint32)PC) << 2;
647 return State.imem + pc;
649 if (State.umem[imap & 0xff] == NULL)
651 (*d10v_callback->printf_filtered) (d10v_callback, "ERROR: unified memory region %d unmapped, pc = 0x%lx\n",
652 imap & 0xff, (long)PC);
653 State.exception = SIGBUS;
657 /* Discard upper bit(s) of PC in case IMAP1 selects unified memory. */
658 pc &= (1 << UMEM_SIZE) - 1;
660 return State.umem[imap & 0xff] + pc;
664 static int stop_simulator = 0;
675 /* Run (or resume) the program. */
677 sim_resume (sd, step, siggnal)
684 /* (*d10v_callback->printf_filtered) (d10v_callback, "sim_resume (%d,%d) PC=0x%x\n",step,siggnal,PC); */
691 inst = get_longword( pc_addr() );
692 State.pc_changed = 0;
693 ins_type_counters[ (int)INS_CYCLES ]++;
695 /* check to see if IBA should be triggered after
697 if (State.DB && (PC == IBA))
702 switch (inst & 0xC0000000)
705 /* long instruction */
706 do_long (inst & 0x3FFFFFFF);
710 do_2_short ( inst & 0x7FFF, (inst & 0x3FFF8000) >> 15, RIGHT_FIRST);
714 do_2_short ((inst & 0x3FFF8000) >> 15, inst & 0x7FFF, LEFT_FIRST);
717 do_parallel ((inst & 0x3FFF8000) >> 15, inst & 0x7FFF);
721 /* calculate the next PC */
722 if (!State.pc_changed)
724 if (State.RP && PC == RPT_E)
726 /* Note: The behavour of a branch instruction at RPT_E
727 is implementation dependant, this simulator takes the
728 branch. Branching to RPT_E is valid, the instruction
729 must be executed before the loop is taken. */
746 move_to_cr (BPSW_CR, PSW);
747 move_to_cr (PSW_CR, PSW & PSW_SM_BIT);
748 PC = SDBT_VECTOR_START;
751 while ( !State.exception && !stop_simulator);
753 if (step && !State.exception)
754 State.exception = SIGTRAP;
764 sim_resume (sd, 0, 0);
769 sim_info (sd, verbose)
778 unsigned long left = ins_type_counters[ (int)INS_LEFT ] + ins_type_counters[ (int)INS_LEFT_COND_EXE ];
779 unsigned long left_nops = ins_type_counters[ (int)INS_LEFT_NOPS ];
780 unsigned long left_parallel = ins_type_counters[ (int)INS_LEFT_PARALLEL ];
781 unsigned long left_cond = ins_type_counters[ (int)INS_LEFT_COND_TEST ];
782 unsigned long left_total = left + left_parallel + left_cond + left_nops;
784 unsigned long right = ins_type_counters[ (int)INS_RIGHT ] + ins_type_counters[ (int)INS_RIGHT_COND_EXE ];
785 unsigned long right_nops = ins_type_counters[ (int)INS_RIGHT_NOPS ];
786 unsigned long right_parallel = ins_type_counters[ (int)INS_RIGHT_PARALLEL ];
787 unsigned long right_cond = ins_type_counters[ (int)INS_RIGHT_COND_TEST ];
788 unsigned long right_total = right + right_parallel + right_cond + right_nops;
790 unsigned long unknown = ins_type_counters[ (int)INS_UNKNOWN ];
791 unsigned long ins_long = ins_type_counters[ (int)INS_LONG ];
792 unsigned long parallel = ins_type_counters[ (int)INS_PARALLEL ];
793 unsigned long leftright = ins_type_counters[ (int)INS_LEFTRIGHT ];
794 unsigned long rightleft = ins_type_counters[ (int)INS_RIGHTLEFT ];
795 unsigned long cond_true = ins_type_counters[ (int)INS_COND_TRUE ];
796 unsigned long cond_false = ins_type_counters[ (int)INS_COND_FALSE ];
797 unsigned long cond_jump = ins_type_counters[ (int)INS_COND_JUMP ];
798 unsigned long cycles = ins_type_counters[ (int)INS_CYCLES ];
799 unsigned long total = (unknown + left_total + right_total + ins_long);
801 int size = strlen (add_commas (buf1, sizeof (buf1), total));
802 int parallel_size = strlen (add_commas (buf1, sizeof (buf1),
803 (left_parallel > right_parallel) ? left_parallel : right_parallel));
804 int cond_size = strlen (add_commas (buf1, sizeof (buf1), (left_cond > right_cond) ? left_cond : right_cond));
805 int nop_size = strlen (add_commas (buf1, sizeof (buf1), (left_nops > right_nops) ? left_nops : right_nops));
806 int normal_size = strlen (add_commas (buf1, sizeof (buf1), (left > right) ? left : right));
808 (*d10v_callback->printf_filtered) (d10v_callback,
809 "executed %*s left instruction(s), %*s normal, %*s parallel, %*s EXExxx, %*s nops\n",
810 size, add_commas (buf1, sizeof (buf1), left_total),
811 normal_size, add_commas (buf2, sizeof (buf2), left),
812 parallel_size, add_commas (buf3, sizeof (buf3), left_parallel),
813 cond_size, add_commas (buf4, sizeof (buf4), left_cond),
814 nop_size, add_commas (buf5, sizeof (buf5), left_nops));
816 (*d10v_callback->printf_filtered) (d10v_callback,
817 "executed %*s right instruction(s), %*s normal, %*s parallel, %*s EXExxx, %*s nops\n",
818 size, add_commas (buf1, sizeof (buf1), right_total),
819 normal_size, add_commas (buf2, sizeof (buf2), right),
820 parallel_size, add_commas (buf3, sizeof (buf3), right_parallel),
821 cond_size, add_commas (buf4, sizeof (buf4), right_cond),
822 nop_size, add_commas (buf5, sizeof (buf5), right_nops));
825 (*d10v_callback->printf_filtered) (d10v_callback,
826 "executed %*s long instruction(s)\n",
827 size, add_commas (buf1, sizeof (buf1), ins_long));
830 (*d10v_callback->printf_filtered) (d10v_callback,
831 "executed %*s parallel instruction(s)\n",
832 size, add_commas (buf1, sizeof (buf1), parallel));
835 (*d10v_callback->printf_filtered) (d10v_callback,
836 "executed %*s instruction(s) encoded L->R\n",
837 size, add_commas (buf1, sizeof (buf1), leftright));
840 (*d10v_callback->printf_filtered) (d10v_callback,
841 "executed %*s instruction(s) encoded R->L\n",
842 size, add_commas (buf1, sizeof (buf1), rightleft));
845 (*d10v_callback->printf_filtered) (d10v_callback,
846 "executed %*s unknown instruction(s)\n",
847 size, add_commas (buf1, sizeof (buf1), unknown));
850 (*d10v_callback->printf_filtered) (d10v_callback,
851 "executed %*s instruction(s) due to EXExxx condition being true\n",
852 size, add_commas (buf1, sizeof (buf1), cond_true));
855 (*d10v_callback->printf_filtered) (d10v_callback,
856 "skipped %*s instruction(s) due to EXExxx condition being false\n",
857 size, add_commas (buf1, sizeof (buf1), cond_false));
860 (*d10v_callback->printf_filtered) (d10v_callback,
861 "skipped %*s instruction(s) due to conditional branch succeeding\n",
862 size, add_commas (buf1, sizeof (buf1), cond_jump));
864 (*d10v_callback->printf_filtered) (d10v_callback,
865 "executed %*s cycle(s)\n",
866 size, add_commas (buf1, sizeof (buf1), cycles));
868 (*d10v_callback->printf_filtered) (d10v_callback,
869 "executed %*s total instructions\n",
870 size, add_commas (buf1, sizeof (buf1), total));
874 sim_create_inferior (sd, abfd, argv, env)
880 bfd_vma start_address;
882 /* reset all state information */
883 memset (&State.regs, 0, (int)&State.imem - (int)&State.regs[0]);
887 start_address = bfd_get_start_address (abfd);
889 start_address = 0xffc0 << 2;
892 (*d10v_callback->printf_filtered) (d10v_callback, "sim_create_inferior: PC=0x%lx\n", (long) start_address);
894 PC = start_address >> 2;
896 /* cpu resets imap0 to 0 and imap1 to 0x7f, but D10V-EVA board */
897 /* resets imap0 and imap1 to 0x1000. */
908 sim_set_callbacks (p)
915 sim_stop_reason (sd, reason, sigrc)
917 enum sim_stop *reason;
920 /* (*d10v_callback->printf_filtered) (d10v_callback, "sim_stop_reason: PC=0x%x\n",PC<<2); */
922 switch (State.exception)
924 case SIG_D10V_STOP: /* stop instruction */
925 *reason = sim_exited;
929 case SIG_D10V_EXIT: /* exit trap */
930 *reason = sim_exited;
931 *sigrc = State.regs[2];
934 default: /* some signal */
935 *reason = sim_stopped;
936 if (stop_simulator && !State.exception)
939 *sigrc = State.exception;
947 sim_fetch_register (sd, rn, memory)
950 unsigned char *memory;
956 WRITE_64 (memory, State.a[rn-35]);
958 WRITE_16 (memory, IMAP0);
960 WRITE_16 (memory, IMAP1);
962 WRITE_16 (memory, DMAP);
964 WRITE_16 (memory, move_from_cr (rn - 16));
966 WRITE_16 (memory, State.regs[rn]);
970 sim_store_register (sd, rn, memory)
973 unsigned char *memory;
979 State.a[rn-35] = READ_64 (memory) & MASK40;
981 SET_DMAP( READ_16(memory) );
983 SET_IMAP1( READ_16(memory) );
985 SET_IMAP0( READ_16(memory) );
987 move_to_cr (rn - 16, READ_16 (memory));
989 State.regs[rn]= READ_16 (memory);
994 sim_do_command (sd, cmd)
998 (*d10v_callback->printf_filtered) (d10v_callback, "sim_do_command: %s\n",cmd);
1002 sim_load (sd, prog, abfd, from_tty)
1008 extern bfd *sim_load_file (); /* ??? Don't know where this should live. */
1010 if (prog_bfd != NULL && prog_bfd_was_opened_p)
1012 bfd_close (prog_bfd);
1013 prog_bfd_was_opened_p = 0;
1015 prog_bfd = sim_load_file (sd, myname, d10v_callback, prog, abfd,
1016 sim_kind == SIM_OPEN_DEBUG,
1018 if (prog_bfd == NULL)
1020 prog_bfd_was_opened_p = abfd == NULL;