5 #include "remote-sim.h"
8 #include "gdb/sim-d10v.h"
10 enum _leftright { LEFT_FIRST, RIGHT_FIRST };
13 static SIM_OPEN_KIND sim_kind;
16 /* Set this to true to get the previous segment layout. */
18 int old_segment_mapping;
20 host_callback *d10v_callback;
21 unsigned long ins_type_counters[ (int)INS_MAX ];
25 static int init_text_p = 0;
26 /* non-zero if we opened prog_bfd */
27 static int prog_bfd_was_opened_p;
33 static long hash PARAMS ((long insn, int format));
34 static struct hash_entry *lookup_hash PARAMS ((uint32 ins, int size));
35 static void get_operands PARAMS ((struct simops *s, uint32 ins));
36 static void do_long PARAMS ((uint32 ins));
37 static void do_2_short PARAMS ((uint16 ins1, uint16 ins2, enum _leftright leftright));
38 static void do_parallel PARAMS ((uint16 ins1, uint16 ins2));
39 static char *add_commas PARAMS ((char *buf, int sizeof_buf, unsigned long value));
40 extern void sim_set_profile PARAMS ((int n));
41 extern void sim_set_profile_size PARAMS ((int n));
42 static INLINE uint8 *map_memory (unsigned phys_addr);
44 #ifdef NEED_UI_LOOP_HOOK
45 /* How often to run the ui_loop update, when in use */
46 #define UI_LOOP_POLL_INTERVAL 0x14000
48 /* Counter for the ui_loop_hook update */
49 static long ui_loop_hook_counter = UI_LOOP_POLL_INTERVAL;
51 /* Actual hook to call to run through gdb's gui event loop */
52 extern int (*ui_loop_hook) PARAMS ((int signo));
53 #endif /* NEED_UI_LOOP_HOOK */
56 #if defined(__GNUC__) && defined(__OPTIMIZE__)
57 #define INLINE __inline__
66 struct hash_entry *next;
73 struct hash_entry hash_table[MAX_HASH+1];
80 if (format & LONG_OPCODE)
81 return ((insn & 0x3F000000) >> 24);
83 return((insn & 0x7E00) >> 9);
86 INLINE static struct hash_entry *
87 lookup_hash (ins, size)
94 h = &hash_table[(ins & 0x3F000000) >> 24];
96 h = &hash_table[(ins & 0x7E00) >> 9];
98 while ((ins & h->mask) != h->opcode || h->size != size)
102 State.exception = SIGILL;
103 State.pc_changed = 1; /* Don't increment the PC. */
112 get_operands (struct simops *s, uint32 ins)
114 int i, shift, bits, flags;
116 for (i=0; i < s->numops; i++)
118 shift = s->operands[3*i];
119 bits = s->operands[3*i+1];
120 flags = s->operands[3*i+2];
121 mask = 0x7FFFFFFF >> (31 - bits);
122 OP[i] = (ins >> shift) & mask;
124 /* FIXME: for tracing, update values that need to be updated each
125 instruction decode cycle */
126 State.trace.psw = PSW;
133 if (!init_text_p && prog_bfd != NULL)
136 for (s = prog_bfd->sections; s; s = s->next)
137 if (strcmp (bfd_get_section_name (prog_bfd, s), ".text") == 0)
140 text_start = bfd_get_section_vma (prog_bfd, s);
141 text_end = text_start + bfd_section_size (prog_bfd, s);
146 return (PC << 2) + text_start;
153 struct hash_entry *h;
155 if ((d10v_debug & DEBUG_INSTRUCTION) != 0)
156 (*d10v_callback->printf_filtered) (d10v_callback, "do_long 0x%x\n", ins);
158 h = lookup_hash (ins, 1);
161 get_operands (h->ops, ins);
162 State.ins_type = INS_LONG;
163 ins_type_counters[ (int)State.ins_type ]++;
168 do_2_short (ins1, ins2, leftright)
170 enum _leftright leftright;
172 struct hash_entry *h;
173 enum _ins_type first, second;
176 if ((d10v_debug & DEBUG_INSTRUCTION) != 0)
177 (*d10v_callback->printf_filtered) (d10v_callback, "do_2_short 0x%x (%s) -> 0x%x\n",
178 ins1, (leftright) ? "left" : "right", ins2);
181 if (leftright == LEFT_FIRST)
185 ins_type_counters[ (int)INS_LEFTRIGHT ]++;
191 ins_type_counters[ (int)INS_RIGHTLEFT ]++;
194 /* Issue the first instruction */
195 h = lookup_hash (ins1, 0);
198 get_operands (h->ops, ins1);
199 State.ins_type = first;
200 ins_type_counters[ (int)State.ins_type ]++;
203 /* Issue the second instruction (if the PC hasn't changed) */
204 if (!State.pc_changed && !State.exception)
206 /* finish any existing instructions */
208 h = lookup_hash (ins2, 0);
211 get_operands (h->ops, ins2);
212 State.ins_type = second;
213 ins_type_counters[ (int)State.ins_type ]++;
214 ins_type_counters[ (int)INS_CYCLES ]++;
217 else if (!State.exception)
218 ins_type_counters[ (int)INS_COND_JUMP ]++;
222 do_parallel (ins1, ins2)
225 struct hash_entry *h1, *h2;
227 if ((d10v_debug & DEBUG_INSTRUCTION) != 0)
228 (*d10v_callback->printf_filtered) (d10v_callback, "do_parallel 0x%x || 0x%x\n", ins1, ins2);
230 ins_type_counters[ (int)INS_PARALLEL ]++;
231 h1 = lookup_hash (ins1, 0);
234 h2 = lookup_hash (ins2, 0);
238 if (h1->ops->exec_type == PARONLY)
240 get_operands (h1->ops, ins1);
241 State.ins_type = INS_LEFT_COND_TEST;
242 ins_type_counters[ (int)State.ins_type ]++;
246 ins_type_counters[ (int)INS_COND_TRUE ]++;
247 get_operands (h2->ops, ins2);
248 State.ins_type = INS_RIGHT_COND_EXE;
249 ins_type_counters[ (int)State.ins_type ]++;
253 ins_type_counters[ (int)INS_COND_FALSE ]++;
255 else if (h2->ops->exec_type == PARONLY)
257 get_operands (h2->ops, ins2);
258 State.ins_type = INS_RIGHT_COND_TEST;
259 ins_type_counters[ (int)State.ins_type ]++;
263 ins_type_counters[ (int)INS_COND_TRUE ]++;
264 get_operands (h1->ops, ins1);
265 State.ins_type = INS_LEFT_COND_EXE;
266 ins_type_counters[ (int)State.ins_type ]++;
270 ins_type_counters[ (int)INS_COND_FALSE ]++;
274 get_operands (h1->ops, ins1);
275 State.ins_type = INS_LEFT_PARALLEL;
276 ins_type_counters[ (int)State.ins_type ]++;
278 if (!State.exception)
280 get_operands (h2->ops, ins2);
281 State.ins_type = INS_RIGHT_PARALLEL;
282 ins_type_counters[ (int)State.ins_type ]++;
289 add_commas(buf, sizeof_buf, value)
295 char *endbuf = buf + sizeof_buf - 1;
305 *--endbuf = (value % 10) + '0';
306 } while ((value /= 10) != 0);
317 for (i = 0; i < IMEM_SEGMENTS; i++)
319 if (State.mem.insn[i])
320 free (State.mem.insn[i]);
322 for (i = 0; i < DMEM_SEGMENTS; i++)
324 if (State.mem.data[i])
325 free (State.mem.data[i]);
327 for (i = 0; i < UMEM_SEGMENTS; i++)
329 if (State.mem.unif[i])
330 free (State.mem.unif[i]);
332 /* Always allocate dmem segment 0. This contains the IMAP and DMAP
334 State.mem.data[0] = calloc (1, SEGMENT_SIZE);
337 /* For tracing - leave info on last access around. */
338 static char *last_segname = "invalid";
339 static char *last_from = "invalid";
340 static char *last_to = "invalid";
344 IMAP0_OFFSET = 0xff00,
345 DMAP0_OFFSET = 0xff08,
346 DMAP2_SHADDOW = 0xff04,
347 DMAP2_OFFSET = 0xff0c
351 set_dmap_register (int reg_nr, unsigned long value)
353 uint8 *raw = map_memory (SIM_D10V_MEMORY_DATA
354 + DMAP0_OFFSET + 2 * reg_nr);
355 WRITE_16 (raw, value);
357 if ((d10v_debug & DEBUG_MEMORY))
359 (*d10v_callback->printf_filtered)
360 (d10v_callback, "mem: dmap%d=0x%04lx\n", reg_nr, value);
366 dmap_register (int reg_nr)
368 uint8 *raw = map_memory (SIM_D10V_MEMORY_DATA
369 + DMAP0_OFFSET + 2 * reg_nr);
370 return READ_16 (raw);
374 set_imap_register (int reg_nr, unsigned long value)
376 uint8 *raw = map_memory (SIM_D10V_MEMORY_DATA
377 + IMAP0_OFFSET + 2 * reg_nr);
378 WRITE_16 (raw, value);
380 if ((d10v_debug & DEBUG_MEMORY))
382 (*d10v_callback->printf_filtered)
383 (d10v_callback, "mem: imap%d=0x%04lx\n", reg_nr, value);
389 imap_register (int reg_nr)
391 uint8 *raw = map_memory (SIM_D10V_MEMORY_DATA
392 + IMAP0_OFFSET + 2 * reg_nr);
393 return READ_16 (raw);
408 return HELD_SP (HELD_SPU_IDX);
417 return HELD_SP (HELD_SPI_IDX);
421 set_spi_register (unsigned long value)
424 SET_GPR (SP_IDX, value);
425 SET_HELD_SP (HELD_SPI_IDX, value);
429 set_spu_register (unsigned long value)
432 SET_GPR (SP_IDX, value);
433 SET_HELD_SP (HELD_SPU_IDX, value);
436 /* Given a virtual address in the DMAP address space, translate it
437 into a physical address. */
440 sim_d10v_translate_dmap_addr (unsigned long offset,
443 unsigned long (*dmap_register) (int reg_nr))
447 last_from = "logical-data";
448 if (offset >= DMAP_BLOCK_SIZE * SIM_D10V_NR_DMAP_REGS)
450 /* Logical address out side of data segments, not supported */
453 regno = (offset / DMAP_BLOCK_SIZE);
454 offset = (offset % DMAP_BLOCK_SIZE);
455 if ((offset % DMAP_BLOCK_SIZE) + nr_bytes > DMAP_BLOCK_SIZE)
457 /* Don't cross a BLOCK boundary */
458 nr_bytes = DMAP_BLOCK_SIZE - (offset % DMAP_BLOCK_SIZE);
460 map = dmap_register (regno);
463 /* Always maps to data memory */
464 int iospi = (offset / 0x1000) % 4;
465 int iosp = (map >> (4 * (3 - iospi))) % 0x10;
466 last_to = "io-space";
467 *phys = (SIM_D10V_MEMORY_DATA + (iosp * 0x10000) + 0xc000 + offset);
471 int sp = ((map & 0x3000) >> 12);
472 int segno = (map & 0x3ff);
475 case 0: /* 00: Unified memory */
476 *phys = SIM_D10V_MEMORY_UNIFIED + (segno * DMAP_BLOCK_SIZE) + offset;
479 case 1: /* 01: Instruction Memory */
480 *phys = SIM_D10V_MEMORY_INSN + (segno * DMAP_BLOCK_SIZE) + offset;
481 last_to = "chip-insn";
483 case 2: /* 10: Internal data memory */
484 *phys = SIM_D10V_MEMORY_DATA + (segno << 16) + (regno * DMAP_BLOCK_SIZE) + offset;
485 last_to = "chip-data";
487 case 3: /* 11: Reserved */
494 /* Given a virtual address in the IMAP address space, translate it
495 into a physical address. */
498 sim_d10v_translate_imap_addr (unsigned long offset,
501 unsigned long (*imap_register) (int reg_nr))
507 last_from = "logical-insn";
508 if (offset >= (IMAP_BLOCK_SIZE * SIM_D10V_NR_IMAP_REGS))
510 /* Logical address outside of IMAP segments, not supported */
513 regno = (offset / IMAP_BLOCK_SIZE);
514 offset = (offset % IMAP_BLOCK_SIZE);
515 if (offset + nr_bytes > IMAP_BLOCK_SIZE)
517 /* Don't cross a BLOCK boundary */
518 nr_bytes = IMAP_BLOCK_SIZE - offset;
520 map = imap_register (regno);
521 sp = (map & 0x3000) >> 12;
522 segno = (map & 0x007f);
525 case 0: /* 00: unified memory */
526 *phys = SIM_D10V_MEMORY_UNIFIED + (segno << 17) + offset;
529 case 1: /* 01: instruction memory */
530 *phys = SIM_D10V_MEMORY_INSN + (IMAP_BLOCK_SIZE * regno) + offset;
531 last_to = "chip-insn";
536 case 3: /* 11: for testing - instruction memory */
537 offset = (offset % 0x800);
538 *phys = SIM_D10V_MEMORY_INSN + offset;
539 if (offset + nr_bytes > 0x800)
540 /* don't cross VM boundary */
541 nr_bytes = 0x800 - offset;
542 last_to = "test-insn";
549 sim_d10v_translate_addr (unsigned long memaddr,
551 unsigned long *targ_addr,
552 unsigned long (*dmap_register) (int reg_nr),
553 unsigned long (*imap_register) (int reg_nr))
559 last_from = "unknown";
562 seg = (memaddr >> 24);
563 off = (memaddr & 0xffffffL);
565 /* However, if we've asked to use the previous generation of segment
566 mapping, rearrange the segments as follows. */
568 if (old_segment_mapping)
572 case 0x00: /* DMAP translated memory */
575 case 0x01: /* IMAP translated memory */
578 case 0x10: /* On-chip data memory */
581 case 0x11: /* On-chip insn memory */
584 case 0x12: /* Unified memory */
592 case 0x00: /* Physical unified memory */
593 last_from = "phys-unified";
595 phys = SIM_D10V_MEMORY_UNIFIED + off;
596 if ((off % SEGMENT_SIZE) + nr_bytes > SEGMENT_SIZE)
597 nr_bytes = SEGMENT_SIZE - (off % SEGMENT_SIZE);
600 case 0x01: /* Physical instruction memory */
601 last_from = "phys-insn";
602 last_to = "chip-insn";
603 phys = SIM_D10V_MEMORY_INSN + off;
604 if ((off % SEGMENT_SIZE) + nr_bytes > SEGMENT_SIZE)
605 nr_bytes = SEGMENT_SIZE - (off % SEGMENT_SIZE);
608 case 0x02: /* Physical data memory segment */
609 last_from = "phys-data";
610 last_to = "chip-data";
611 phys = SIM_D10V_MEMORY_DATA + off;
612 if ((off % SEGMENT_SIZE) + nr_bytes > SEGMENT_SIZE)
613 nr_bytes = SEGMENT_SIZE - (off % SEGMENT_SIZE);
616 case 0x10: /* in logical data address segment */
617 nr_bytes = sim_d10v_translate_dmap_addr (off, nr_bytes, &phys,
621 case 0x11: /* in logical instruction address segment */
622 nr_bytes = sim_d10v_translate_imap_addr (off, nr_bytes, &phys,
634 /* Return a pointer into the raw buffer designated by phys_addr. It
635 is assumed that the client has already ensured that the access
636 isn't going to cross a segment boundary. */
639 map_memory (unsigned phys_addr)
644 int segment = ((phys_addr >> 24) & 0xff);
649 case 0x00: /* Unified memory */
651 memory = &State.mem.unif[(phys_addr / SEGMENT_SIZE) % UMEM_SEGMENTS];
652 last_segname = "umem";
656 case 0x01: /* On-chip insn memory */
658 memory = &State.mem.insn[(phys_addr / SEGMENT_SIZE) % IMEM_SEGMENTS];
659 last_segname = "imem";
663 case 0x02: /* On-chip data memory */
665 if ((phys_addr & 0xff00) == 0xff00)
667 phys_addr = (phys_addr & 0xffff);
668 if (phys_addr == DMAP2_SHADDOW)
670 phys_addr = DMAP2_OFFSET;
671 last_segname = "dmap";
674 last_segname = "reg";
677 last_segname = "dmem";
678 memory = &State.mem.data[(phys_addr / SEGMENT_SIZE) % DMEM_SEGMENTS];
684 last_segname = "scrap";
685 return State.mem.fault;
690 *memory = calloc (1, SEGMENT_SIZE);
693 (*d10v_callback->printf_filtered) (d10v_callback, "Malloc failed.\n");
694 return State.mem.fault;
698 offset = (phys_addr % SEGMENT_SIZE);
699 raw = *memory + offset;
703 /* Transfer data to/from simulated memory. Since a bug in either the
704 simulated program or in gdb or the simulator itself may cause a
705 bogus address to be passed in, we need to do some sanity checking
706 on addresses to make sure they are within bounds. When an address
707 fails the bounds check, treat it as a zero length read/write rather
708 than aborting the entire run. */
711 xfer_mem (SIM_ADDR virt,
712 unsigned char *buffer,
718 while (xfered < size)
723 phys_size = sim_d10v_translate_addr (virt, size,
730 memory = map_memory (phys);
733 if ((d10v_debug & DEBUG_INSTRUCTION) != 0)
735 (*d10v_callback->printf_filtered)
737 "sim_%s %d bytes: 0x%08lx (%s) -> 0x%08lx (%s) -> 0x%08lx (%s)\n",
738 (write_p ? "write" : "read"),
739 phys_size, virt, last_from,
741 (long) memory, last_segname);
747 memcpy (memory, buffer, phys_size);
751 memcpy (buffer, memory, phys_size);
764 sim_write (sd, addr, buffer, size)
767 unsigned char *buffer;
770 /* FIXME: this should be performing a virtual transfer */
771 return xfer_mem( addr, buffer, size, 1);
775 sim_read (sd, addr, buffer, size)
778 unsigned char *buffer;
781 /* FIXME: this should be performing a virtual transfer */
782 return xfer_mem( addr, buffer, size, 0);
787 sim_open (kind, callback, abfd, argv)
789 host_callback *callback;
794 struct hash_entry *h;
795 static int init_p = 0;
799 d10v_callback = callback;
801 old_segment_mapping = 0;
803 /* NOTE: This argument parsing is only effective when this function
804 is called by GDB. Standalone argument parsing is handled by
806 for (p = argv + 1; *p; ++p)
808 if (strcmp (*p, "-oldseg") == 0)
809 old_segment_mapping = 1;
811 else if (strcmp (*p, "-t") == 0)
813 else if (strncmp (*p, "-t", 2) == 0)
814 d10v_debug = atoi (*p + 2);
817 (*d10v_callback->printf_filtered) (d10v_callback, "ERROR: unsupported option(s): %s\n",*p);
820 /* put all the opcodes in the hash table */
823 for (s = Simops; s->func; s++)
825 h = &hash_table[hash(s->opcode,s->format)];
827 /* go to the last entry in the chain */
833 h->next = (struct hash_entry *) calloc(1,sizeof(struct hash_entry));
835 perror ("malloc failure");
841 h->opcode = s->opcode;
842 h->size = s->is_long;
846 /* reset the processor state */
847 if (!State.mem.data[0])
849 sim_create_inferior ((SIM_DESC) 1, NULL, NULL, NULL);
851 /* Fudge our descriptor. */
857 sim_close (sd, quitting)
861 if (prog_bfd != NULL && prog_bfd_was_opened_p)
863 bfd_close (prog_bfd);
865 prog_bfd_was_opened_p = 0;
873 (*d10v_callback->printf_filtered) (d10v_callback, "sim_set_profile %d\n",n);
877 sim_set_profile_size (n)
880 (*d10v_callback->printf_filtered) (d10v_callback, "sim_set_profile_size %d\n",n);
884 dmem_addr (uint16 offset)
890 /* Note: DMEM address range is 0..0x10000. Calling code can compute
891 things like ``0xfffe + 0x0e60 == 0x10e5d''. Since offset's type
892 is uint16 this is modulo'ed onto 0x0e5d. */
894 phys_size = sim_d10v_translate_dmap_addr (offset, 1, &phys,
898 mem = State.mem.fault;
901 mem = map_memory (phys);
903 if ((d10v_debug & DEBUG_MEMORY))
905 (*d10v_callback->printf_filtered)
907 "mem: 0x%08x (%s) -> 0x%08lx %d (%s) -> 0x%08lx (%s)\n",
909 phys, phys_size, last_to,
910 (long) mem, last_segname);
917 imem_addr (uint32 offset)
921 int phys_size = sim_d10v_translate_imap_addr (offset, 1, &phys, imap_register);
924 return State.mem.fault;
926 mem = map_memory (phys);
928 if ((d10v_debug & DEBUG_MEMORY))
930 (*d10v_callback->printf_filtered)
932 "mem: 0x%08x (%s) -> 0x%08lx %d (%s) -> 0x%08lx (%s)\n",
934 phys, phys_size, last_to,
935 (long) mem, last_segname);
941 static int stop_simulator = 0;
952 /* Run (or resume) the program. */
954 sim_resume (sd, step, siggnal)
961 /* (*d10v_callback->printf_filtered) (d10v_callback, "sim_resume (%d,%d) PC=0x%x\n",step,siggnal,PC); */
976 SET_HW_PSW ((PSW & (PSW_F0_BIT | PSW_F1_BIT | PSW_C_BIT)));
977 JMP (AE_VECTOR_START);
983 SET_HW_PSW ((PSW & (PSW_F0_BIT | PSW_F1_BIT | PSW_C_BIT)));
984 JMP (RIE_VECTOR_START);
994 iaddr = imem_addr ((uint32)PC << 2);
995 if (iaddr == State.mem.fault)
997 State.exception = SIGBUS;
1001 inst = get_longword( iaddr );
1003 State.pc_changed = 0;
1004 ins_type_counters[ (int)INS_CYCLES ]++;
1006 switch (inst & 0xC0000000)
1009 /* long instruction */
1010 do_long (inst & 0x3FFFFFFF);
1014 do_2_short ( inst & 0x7FFF, (inst & 0x3FFF8000) >> 15, RIGHT_FIRST);
1018 do_2_short ((inst & 0x3FFF8000) >> 15, inst & 0x7FFF, LEFT_FIRST);
1021 do_parallel ((inst & 0x3FFF8000) >> 15, inst & 0x7FFF);
1025 /* If the PC of the current instruction matches RPT_E then
1026 schedule a branch to the loop start. If one of those
1027 instructions happens to be a branch, than that instruction
1029 if (!State.pc_changed)
1031 if (PSW_RP && PC == RPT_E)
1033 /* Note: The behavour of a branch instruction at RPT_E
1034 is implementation dependant, this simulator takes the
1035 branch. Branching to RPT_E is valid, the instruction
1036 must be executed before the loop is taken. */
1045 SET_RPT_C (RPT_C - 1);
1053 /* Check for a breakpoint trap on this instruction. This
1054 overrides any pending branches or loops */
1055 if (PSW_DB && PC == IBA)
1059 SET_PSW (PSW & PSW_SM_BIT);
1060 SET_PC (SDBT_VECTOR_START);
1063 /* Writeback all the DATA / PC changes */
1066 #ifdef NEED_UI_LOOP_HOOK
1067 if (ui_loop_hook != NULL && ui_loop_hook_counter-- < 0)
1069 ui_loop_hook_counter = UI_LOOP_POLL_INTERVAL;
1072 #endif /* NEED_UI_LOOP_HOOK */
1074 while ( !State.exception && !stop_simulator);
1076 if (step && !State.exception)
1077 State.exception = SIGTRAP;
1081 sim_set_trace (void)
1089 sim_info (sd, verbose)
1098 unsigned long left = ins_type_counters[ (int)INS_LEFT ] + ins_type_counters[ (int)INS_LEFT_COND_EXE ];
1099 unsigned long left_nops = ins_type_counters[ (int)INS_LEFT_NOPS ];
1100 unsigned long left_parallel = ins_type_counters[ (int)INS_LEFT_PARALLEL ];
1101 unsigned long left_cond = ins_type_counters[ (int)INS_LEFT_COND_TEST ];
1102 unsigned long left_total = left + left_parallel + left_cond + left_nops;
1104 unsigned long right = ins_type_counters[ (int)INS_RIGHT ] + ins_type_counters[ (int)INS_RIGHT_COND_EXE ];
1105 unsigned long right_nops = ins_type_counters[ (int)INS_RIGHT_NOPS ];
1106 unsigned long right_parallel = ins_type_counters[ (int)INS_RIGHT_PARALLEL ];
1107 unsigned long right_cond = ins_type_counters[ (int)INS_RIGHT_COND_TEST ];
1108 unsigned long right_total = right + right_parallel + right_cond + right_nops;
1110 unsigned long unknown = ins_type_counters[ (int)INS_UNKNOWN ];
1111 unsigned long ins_long = ins_type_counters[ (int)INS_LONG ];
1112 unsigned long parallel = ins_type_counters[ (int)INS_PARALLEL ];
1113 unsigned long leftright = ins_type_counters[ (int)INS_LEFTRIGHT ];
1114 unsigned long rightleft = ins_type_counters[ (int)INS_RIGHTLEFT ];
1115 unsigned long cond_true = ins_type_counters[ (int)INS_COND_TRUE ];
1116 unsigned long cond_false = ins_type_counters[ (int)INS_COND_FALSE ];
1117 unsigned long cond_jump = ins_type_counters[ (int)INS_COND_JUMP ];
1118 unsigned long cycles = ins_type_counters[ (int)INS_CYCLES ];
1119 unsigned long total = (unknown + left_total + right_total + ins_long);
1121 int size = strlen (add_commas (buf1, sizeof (buf1), total));
1122 int parallel_size = strlen (add_commas (buf1, sizeof (buf1),
1123 (left_parallel > right_parallel) ? left_parallel : right_parallel));
1124 int cond_size = strlen (add_commas (buf1, sizeof (buf1), (left_cond > right_cond) ? left_cond : right_cond));
1125 int nop_size = strlen (add_commas (buf1, sizeof (buf1), (left_nops > right_nops) ? left_nops : right_nops));
1126 int normal_size = strlen (add_commas (buf1, sizeof (buf1), (left > right) ? left : right));
1128 (*d10v_callback->printf_filtered) (d10v_callback,
1129 "executed %*s left instruction(s), %*s normal, %*s parallel, %*s EXExxx, %*s nops\n",
1130 size, add_commas (buf1, sizeof (buf1), left_total),
1131 normal_size, add_commas (buf2, sizeof (buf2), left),
1132 parallel_size, add_commas (buf3, sizeof (buf3), left_parallel),
1133 cond_size, add_commas (buf4, sizeof (buf4), left_cond),
1134 nop_size, add_commas (buf5, sizeof (buf5), left_nops));
1136 (*d10v_callback->printf_filtered) (d10v_callback,
1137 "executed %*s right instruction(s), %*s normal, %*s parallel, %*s EXExxx, %*s nops\n",
1138 size, add_commas (buf1, sizeof (buf1), right_total),
1139 normal_size, add_commas (buf2, sizeof (buf2), right),
1140 parallel_size, add_commas (buf3, sizeof (buf3), right_parallel),
1141 cond_size, add_commas (buf4, sizeof (buf4), right_cond),
1142 nop_size, add_commas (buf5, sizeof (buf5), right_nops));
1145 (*d10v_callback->printf_filtered) (d10v_callback,
1146 "executed %*s long instruction(s)\n",
1147 size, add_commas (buf1, sizeof (buf1), ins_long));
1150 (*d10v_callback->printf_filtered) (d10v_callback,
1151 "executed %*s parallel instruction(s)\n",
1152 size, add_commas (buf1, sizeof (buf1), parallel));
1155 (*d10v_callback->printf_filtered) (d10v_callback,
1156 "executed %*s instruction(s) encoded L->R\n",
1157 size, add_commas (buf1, sizeof (buf1), leftright));
1160 (*d10v_callback->printf_filtered) (d10v_callback,
1161 "executed %*s instruction(s) encoded R->L\n",
1162 size, add_commas (buf1, sizeof (buf1), rightleft));
1165 (*d10v_callback->printf_filtered) (d10v_callback,
1166 "executed %*s unknown instruction(s)\n",
1167 size, add_commas (buf1, sizeof (buf1), unknown));
1170 (*d10v_callback->printf_filtered) (d10v_callback,
1171 "executed %*s instruction(s) due to EXExxx condition being true\n",
1172 size, add_commas (buf1, sizeof (buf1), cond_true));
1175 (*d10v_callback->printf_filtered) (d10v_callback,
1176 "skipped %*s instruction(s) due to EXExxx condition being false\n",
1177 size, add_commas (buf1, sizeof (buf1), cond_false));
1180 (*d10v_callback->printf_filtered) (d10v_callback,
1181 "skipped %*s instruction(s) due to conditional branch succeeding\n",
1182 size, add_commas (buf1, sizeof (buf1), cond_jump));
1184 (*d10v_callback->printf_filtered) (d10v_callback,
1185 "executed %*s cycle(s)\n",
1186 size, add_commas (buf1, sizeof (buf1), cycles));
1188 (*d10v_callback->printf_filtered) (d10v_callback,
1189 "executed %*s total instructions\n",
1190 size, add_commas (buf1, sizeof (buf1), total));
1194 sim_create_inferior (sd, abfd, argv, env)
1200 bfd_vma start_address;
1202 /* reset all state information */
1203 memset (&State.regs, 0, (int)&State.mem - (int)&State.regs);
1207 start_address = bfd_get_start_address (abfd);
1209 start_address = 0xffc0 << 2;
1212 (*d10v_callback->printf_filtered) (d10v_callback, "sim_create_inferior: PC=0x%lx\n", (long) start_address);
1214 SET_CREG (PC_CR, start_address >> 2);
1216 /* cpu resets imap0 to 0 and imap1 to 0x7f, but D10V-EVA board
1217 initializes imap0 and imap1 to 0x1000 as part of its ROM
1219 if (old_segment_mapping)
1221 /* External memory startup. This is the HARD reset state. */
1222 set_imap_register (0, 0x0000);
1223 set_imap_register (1, 0x007f);
1224 set_dmap_register (0, 0x2000);
1225 set_dmap_register (1, 0x2000);
1226 set_dmap_register (2, 0x0000); /* Old DMAP */
1227 set_dmap_register (3, 0x0000);
1231 /* Internal memory startup. This is the ROM intialized state. */
1232 set_imap_register (0, 0x1000);
1233 set_imap_register (1, 0x1000);
1234 set_dmap_register (0, 0x2000);
1235 set_dmap_register (1, 0x2000);
1236 set_dmap_register (2, 0x2000); /* DMAP2 initial internal value is
1237 0x2000 on the new board. */
1238 set_dmap_register (3, 0x0000);
1247 sim_set_callbacks (p)
1254 sim_stop_reason (sd, reason, sigrc)
1256 enum sim_stop *reason;
1259 /* (*d10v_callback->printf_filtered) (d10v_callback, "sim_stop_reason: PC=0x%x\n",PC<<2); */
1261 switch (State.exception)
1263 case SIG_D10V_STOP: /* stop instruction */
1264 *reason = sim_exited;
1268 case SIG_D10V_EXIT: /* exit trap */
1269 *reason = sim_exited;
1274 *reason = sim_stopped;
1282 default: /* some signal */
1283 *reason = sim_stopped;
1284 if (stop_simulator && !State.exception)
1287 *sigrc = State.exception;
1295 sim_fetch_register (sd, rn, memory, length)
1298 unsigned char *memory;
1304 else if (rn >= SIM_D10V_R0_REGNUM
1305 && rn < SIM_D10V_R0_REGNUM + SIM_D10V_NR_R_REGS)
1307 WRITE_16 (memory, GPR (rn - SIM_D10V_R0_REGNUM));
1310 else if (rn >= SIM_D10V_CR0_REGNUM
1311 && rn < SIM_D10V_CR0_REGNUM + SIM_D10V_NR_CR_REGS)
1313 WRITE_16 (memory, CREG (rn - SIM_D10V_CR0_REGNUM));
1316 else if (rn >= SIM_D10V_A0_REGNUM
1317 && rn < SIM_D10V_A0_REGNUM + SIM_D10V_NR_A_REGS)
1319 WRITE_64 (memory, ACC (rn - SIM_D10V_A0_REGNUM));
1322 else if (rn == SIM_D10V_SPI_REGNUM)
1324 /* PSW_SM indicates that the current SP is the USER
1326 WRITE_16 (memory, spi_register ());
1329 else if (rn == SIM_D10V_SPU_REGNUM)
1331 /* PSW_SM indicates that the current SP is the USER
1333 WRITE_16 (memory, spu_register ());
1336 else if (rn >= SIM_D10V_IMAP0_REGNUM
1337 && rn < SIM_D10V_IMAP0_REGNUM + SIM_D10V_NR_IMAP_REGS)
1339 WRITE_16 (memory, imap_register (rn - SIM_D10V_IMAP0_REGNUM));
1342 else if (rn >= SIM_D10V_DMAP0_REGNUM
1343 && rn < SIM_D10V_DMAP0_REGNUM + SIM_D10V_NR_DMAP_REGS)
1345 WRITE_16 (memory, dmap_register (rn - SIM_D10V_DMAP0_REGNUM));
1354 sim_store_register (sd, rn, memory, length)
1357 unsigned char *memory;
1363 else if (rn >= SIM_D10V_R0_REGNUM
1364 && rn < SIM_D10V_R0_REGNUM + SIM_D10V_NR_R_REGS)
1366 SET_GPR (rn - SIM_D10V_R0_REGNUM, READ_16 (memory));
1369 else if (rn >= SIM_D10V_CR0_REGNUM
1370 && rn < SIM_D10V_CR0_REGNUM + SIM_D10V_NR_CR_REGS)
1372 SET_CREG (rn - SIM_D10V_CR0_REGNUM, READ_16 (memory));
1375 else if (rn >= SIM_D10V_A0_REGNUM
1376 && rn < SIM_D10V_A0_REGNUM + SIM_D10V_NR_A_REGS)
1378 SET_ACC (rn - SIM_D10V_A0_REGNUM, READ_64 (memory) & MASK40);
1381 else if (rn == SIM_D10V_SPI_REGNUM)
1383 /* PSW_SM indicates that the current SP is the USER
1385 set_spi_register (READ_16 (memory));
1388 else if (rn == SIM_D10V_SPU_REGNUM)
1390 set_spu_register (READ_16 (memory));
1393 else if (rn >= SIM_D10V_IMAP0_REGNUM
1394 && rn < SIM_D10V_IMAP0_REGNUM + SIM_D10V_NR_IMAP_REGS)
1396 set_imap_register (rn - SIM_D10V_IMAP0_REGNUM, READ_16(memory));
1399 else if (rn >= SIM_D10V_DMAP0_REGNUM
1400 && rn < SIM_D10V_DMAP0_REGNUM + SIM_D10V_NR_DMAP_REGS)
1402 set_dmap_register (rn - SIM_D10V_DMAP0_REGNUM, READ_16(memory));
1413 sim_do_command (sd, cmd)
1417 (*d10v_callback->printf_filtered) (d10v_callback, "sim_do_command: %s\n",cmd);
1421 sim_load (sd, prog, abfd, from_tty)
1427 extern bfd *sim_load_file (); /* ??? Don't know where this should live. */
1429 if (prog_bfd != NULL && prog_bfd_was_opened_p)
1431 bfd_close (prog_bfd);
1432 prog_bfd_was_opened_p = 0;
1434 prog_bfd = sim_load_file (sd, myname, d10v_callback, prog, abfd,
1435 sim_kind == SIM_OPEN_DEBUG,
1436 1/*LMA*/, sim_write);
1437 if (prog_bfd == NULL)
1439 prog_bfd_was_opened_p = abfd == NULL;