1 # Simulator main loop for CRIS. -*- C -*-
2 # Copyright (C) 2004, 2005 Free Software Foundation, Inc.
3 # Contributed by Axis Communications.
5 # This file is part of the GNU simulators.
7 # This program is free software; you can redistribute it and/or modify
8 # it under the terms of the GNU General Public License as published by
9 # the Free Software Foundation; either version 2, or (at your option)
12 # This program is distributed in the hope that it will be useful,
13 # but WITHOUT ANY WARRANTY; without even the implied warranty of
14 # MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 # GNU General Public License for more details.
17 # You should have received a copy of the GNU General Public License along
18 # with this program; if not, write to the Free Software Foundation, Inc.,
19 # 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
21 # Based on the fr30 file.
24 # /bin/sh mainloop.in command
30 # extract-{simple,scache,pbb}
31 # {full,fast}-exec-{simple,scache,pbb}
33 # A target need only provide a "full" version of one of simple,scache,pbb.
34 # If the target wants it can also provide a fast version of same.
35 # It can't provide more than this, however for illustration's sake the CRIS
36 # port provides examples of all.
38 # ??? After a few more ports are done, revisit.
39 # Will eventually need to machine generate a lot of this.
46 /* It seems we don't have a templated header file corresponding to
47 cris-tmpl.c, so we have to get out declarations the hackish way. */
48 extern void @cpu@_specific_init (SIM_CPU *current_cpu);
50 static INLINE const IDESC *
51 extract (SIM_CPU *current_cpu, PCADDR pc, CGEN_INSN_INT insn, ARGBUF *abuf,
54 const IDESC *id = @cpu@_decode (current_cpu, pc, insn,
59 @cpu@_fill_argbuf (current_cpu, abuf, id, pc, fast_p);
62 int trace_p = PC_IN_TRACE_RANGE_P (current_cpu, pc);
63 int profile_p = PC_IN_PROFILE_RANGE_P (current_cpu, pc);
64 @cpu@_fill_argbuf_tp (current_cpu, abuf, trace_p, profile_p);
70 execute (SIM_CPU *current_cpu, SCACHE *sc, int fast_p)
76 #if ! WITH_SEM_SWITCH_FAST
78 vpc = (*sc->argbuf.semantic.sem_fast) (current_cpu, sc);
80 vpc = (*sc->argbuf.semantic.sem_fast) (current_cpu, &sc->argbuf);
84 #endif /* WITH_SEM_SWITCH_FAST */
88 #if ! WITH_SEM_SWITCH_FULL
89 ARGBUF *abuf = &sc->argbuf;
90 const IDESC *idesc = abuf->idesc;
92 int virtual_p = CGEN_ATTR_VALUE (NULL, idesc->attrs, CGEN_INSN_VIRTUAL);
99 /* FIXME: call x-before */
100 if (ARGBUF_PROFILE_P (abuf))
101 PROFILE_COUNT_INSN (current_cpu, abuf->addr, idesc->num);
102 /* FIXME: Later make cover macros: PROFILE_INSN_{INIT,FINI}. */
103 if (PROFILE_MODEL_P (current_cpu)
104 && ARGBUF_PROFILE_P (abuf))
105 @cpu@_model_insn_before (current_cpu, 1 /*first_p*/);
106 TRACE_INSN_INIT (current_cpu, abuf, 1);
107 TRACE_INSN (current_cpu, idesc->idata,
108 (const struct argbuf *) abuf, abuf->addr);
111 vpc = (*sc->argbuf.semantic.sem_full) (current_cpu, sc);
113 vpc = (*sc->argbuf.semantic.sem_full) (current_cpu, abuf);
117 /* FIXME: call x-after */
118 if (PROFILE_MODEL_P (current_cpu)
119 && ARGBUF_PROFILE_P (abuf))
123 cycles = (*idesc->timing->model_fn) (current_cpu, sc);
124 @cpu@_model_insn_after (current_cpu, 1 /*last_p*/, cycles);
126 TRACE_INSN_FINI (current_cpu, abuf, 1);
130 #endif /* WITH_SEM_SWITCH_FULL */
143 /* This seemed the only sane location to emit a call to a
144 model-specific init function. It may not work for all simulator
145 types. FIXME: Introduce a model-init hook. */
147 /* We use the same condition as the code that's expected to follow, so
148 GCC can consolidate the code with only one conditional. */
149 if (! CPU_IDESC_SEM_INIT_P (current_cpu))
150 @cpu@_specific_init (current_cpu);
155 xextract-simple | xextract-scache)
157 # Inputs: current_cpu, vpc, sc, FAST_P
158 # Outputs: sc filled in
162 CGEN_INSN_INT insn = GETIMEMUHI (current_cpu, vpc);
163 extract (current_cpu, vpc, insn, SEM_ARGBUF (sc), FAST_P);
171 # Inputs: current_cpu, pc, sc, max_insns, FAST_P
173 # sc must be left pointing past the last created entry.
174 # pc must be left pointing past the last created entry.
175 # If the pbb is terminated by a cti insn, SET_CTI_VPC(sc) must be called
176 # to record the vpc of the cti insn.
177 # SET_INSN_COUNT(n) must be called to record number of real insns.
184 /* Make sure the buffer doesn't overflow for profiled insns if
185 max_insns happens to not be a multiple of 3. */
189 /* There might be two real insns handled per loop. */
192 while (max_insns > 0)
194 UHI insn = GETIMEMUHI (current_cpu, pc);
195 int trace_p = PC_IN_TRACE_RANGE_P (current_cpu, pc);
196 int profile_p = PC_IN_PROFILE_RANGE_P (current_cpu, pc);
197 int befaft_p = profile_p || trace_p;
201 @cpu@_emit_before (current_cpu, sc, pc, 1);
203 sc->argbuf.trace_p = trace_p;
204 sc->argbuf.profile_p = profile_p;
208 idesc = extract (current_cpu, pc, insn, &sc->argbuf, FAST_P);
215 @cpu@_emit_after (current_cpu, sc, pc);
222 if (IDESC_CTI_P (idesc))
224 SET_CTI_VPC (sc - 1);
226 /* Delay slot? Ignore for zero-instructions (bcc .+2) since
227 those are treated as exit insns to avoid runaway sessions
228 for invalid programs. */
229 if (insn != 0 && CGEN_ATTR_VALUE (NULL, idesc->attrs, CGEN_INSN_DELAY_SLOT))
232 trace_p = PC_IN_TRACE_RANGE_P (current_cpu, pc);
233 profile_p = PC_IN_PROFILE_RANGE_P (current_cpu, pc);
234 befaft_p = profile_p || trace_p;
238 @cpu@_emit_before (current_cpu, sc, pc, 1);
240 sc->argbuf.trace_p = trace_p;
241 sc->argbuf.profile_p = profile_p;
245 insn = GETIMEMUHI (current_cpu, pc);
246 idesc = extract (current_cpu, pc, insn, &sc->argbuf, FAST_P);
253 @cpu@_emit_after (current_cpu, sc, pc);
264 SET_INSN_COUNT (icount);
270 xfull-exec-* | xfast-exec-*)
272 # Inputs: current_cpu, sc, FAST_P
274 # vpc contains the address of the next insn to execute
278 #if (! FAST_P && WITH_SEM_SWITCH_FULL) || (FAST_P && WITH_SEM_SWITCH_FAST)
279 #define DEFINE_SWITCH
280 #include "sem@cpu@-switch.c"
282 vpc = execute (current_cpu, vpc, FAST_P);
290 echo "Invalid argument to mainloop.in: $1" >&2