1 /* Misc. support for CPU family crisv10f.
3 THIS FILE IS MACHINE GENERATED WITH CGEN.
5 Copyright 1996-2005 Free Software Foundation, Inc.
7 This file is part of the GNU simulators.
9 This program is free software; you can redistribute it and/or modify
10 it under the terms of the GNU General Public License as published by
11 the Free Software Foundation; either version 2, or (at your option)
14 This program is distributed in the hope that it will be useful,
15 but WITHOUT ANY WARRANTY; without even the implied warranty of
16 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 GNU General Public License for more details.
19 You should have received a copy of the GNU General Public License along
20 with this program; if not, write to the Free Software Foundation, Inc.,
21 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
25 #define WANT_CPU crisv10f
26 #define WANT_CPU_CRISV10F
31 /* Get the value of h-v32-non-v32. */
34 crisv10f_h_v32_non_v32_get (SIM_CPU *current_cpu)
36 return GET_H_V32_NON_V32 ();
39 /* Set a value for h-v32-non-v32. */
42 crisv10f_h_v32_non_v32_set (SIM_CPU *current_cpu, BI newval)
44 SET_H_V32_NON_V32 (newval);
47 /* Get the value of h-pc. */
50 crisv10f_h_pc_get (SIM_CPU *current_cpu)
55 /* Set a value for h-pc. */
58 crisv10f_h_pc_set (SIM_CPU *current_cpu, USI newval)
63 /* Get the value of h-gr. */
66 crisv10f_h_gr_get (SIM_CPU *current_cpu, UINT regno)
68 return GET_H_GR (regno);
71 /* Set a value for h-gr. */
74 crisv10f_h_gr_set (SIM_CPU *current_cpu, UINT regno, SI newval)
76 SET_H_GR (regno, newval);
79 /* Get the value of h-gr-pc. */
82 crisv10f_h_gr_pc_get (SIM_CPU *current_cpu, UINT regno)
84 return GET_H_GR_PC (regno);
87 /* Set a value for h-gr-pc. */
90 crisv10f_h_gr_pc_set (SIM_CPU *current_cpu, UINT regno, SI newval)
92 SET_H_GR_PC (regno, newval);
95 /* Get the value of h-gr-real-pc. */
98 crisv10f_h_gr_real_pc_get (SIM_CPU *current_cpu, UINT regno)
100 return CPU (h_gr_real_pc[regno]);
103 /* Set a value for h-gr-real-pc. */
106 crisv10f_h_gr_real_pc_set (SIM_CPU *current_cpu, UINT regno, SI newval)
108 CPU (h_gr_real_pc[regno]) = newval;
111 /* Get the value of h-raw-gr-pc. */
114 crisv10f_h_raw_gr_pc_get (SIM_CPU *current_cpu, UINT regno)
116 return GET_H_RAW_GR_PC (regno);
119 /* Set a value for h-raw-gr-pc. */
122 crisv10f_h_raw_gr_pc_set (SIM_CPU *current_cpu, UINT regno, SI newval)
124 SET_H_RAW_GR_PC (regno, newval);
127 /* Get the value of h-sr. */
130 crisv10f_h_sr_get (SIM_CPU *current_cpu, UINT regno)
132 return GET_H_SR (regno);
135 /* Set a value for h-sr. */
138 crisv10f_h_sr_set (SIM_CPU *current_cpu, UINT regno, SI newval)
140 SET_H_SR (regno, newval);
143 /* Get the value of h-sr-v10. */
146 crisv10f_h_sr_v10_get (SIM_CPU *current_cpu, UINT regno)
148 return GET_H_SR_V10 (regno);
151 /* Set a value for h-sr-v10. */
154 crisv10f_h_sr_v10_set (SIM_CPU *current_cpu, UINT regno, SI newval)
156 SET_H_SR_V10 (regno, newval);
159 /* Get the value of h-cbit. */
162 crisv10f_h_cbit_get (SIM_CPU *current_cpu)
167 /* Set a value for h-cbit. */
170 crisv10f_h_cbit_set (SIM_CPU *current_cpu, BI newval)
172 CPU (h_cbit) = newval;
175 /* Get the value of h-cbit-move. */
178 crisv10f_h_cbit_move_get (SIM_CPU *current_cpu)
180 return GET_H_CBIT_MOVE ();
183 /* Set a value for h-cbit-move. */
186 crisv10f_h_cbit_move_set (SIM_CPU *current_cpu, BI newval)
188 SET_H_CBIT_MOVE (newval);
191 /* Get the value of h-cbit-move-pre-v32. */
194 crisv10f_h_cbit_move_pre_v32_get (SIM_CPU *current_cpu)
196 return GET_H_CBIT_MOVE_PRE_V32 ();
199 /* Set a value for h-cbit-move-pre-v32. */
202 crisv10f_h_cbit_move_pre_v32_set (SIM_CPU *current_cpu, BI newval)
204 SET_H_CBIT_MOVE_PRE_V32 (newval);
207 /* Get the value of h-vbit. */
210 crisv10f_h_vbit_get (SIM_CPU *current_cpu)
215 /* Set a value for h-vbit. */
218 crisv10f_h_vbit_set (SIM_CPU *current_cpu, BI newval)
220 CPU (h_vbit) = newval;
223 /* Get the value of h-vbit-move. */
226 crisv10f_h_vbit_move_get (SIM_CPU *current_cpu)
228 return GET_H_VBIT_MOVE ();
231 /* Set a value for h-vbit-move. */
234 crisv10f_h_vbit_move_set (SIM_CPU *current_cpu, BI newval)
236 SET_H_VBIT_MOVE (newval);
239 /* Get the value of h-vbit-move-pre-v32. */
242 crisv10f_h_vbit_move_pre_v32_get (SIM_CPU *current_cpu)
244 return GET_H_VBIT_MOVE_PRE_V32 ();
247 /* Set a value for h-vbit-move-pre-v32. */
250 crisv10f_h_vbit_move_pre_v32_set (SIM_CPU *current_cpu, BI newval)
252 SET_H_VBIT_MOVE_PRE_V32 (newval);
255 /* Get the value of h-zbit. */
258 crisv10f_h_zbit_get (SIM_CPU *current_cpu)
263 /* Set a value for h-zbit. */
266 crisv10f_h_zbit_set (SIM_CPU *current_cpu, BI newval)
268 CPU (h_zbit) = newval;
271 /* Get the value of h-zbit-move. */
274 crisv10f_h_zbit_move_get (SIM_CPU *current_cpu)
276 return GET_H_ZBIT_MOVE ();
279 /* Set a value for h-zbit-move. */
282 crisv10f_h_zbit_move_set (SIM_CPU *current_cpu, BI newval)
284 SET_H_ZBIT_MOVE (newval);
287 /* Get the value of h-zbit-move-pre-v32. */
290 crisv10f_h_zbit_move_pre_v32_get (SIM_CPU *current_cpu)
292 return GET_H_ZBIT_MOVE_PRE_V32 ();
295 /* Set a value for h-zbit-move-pre-v32. */
298 crisv10f_h_zbit_move_pre_v32_set (SIM_CPU *current_cpu, BI newval)
300 SET_H_ZBIT_MOVE_PRE_V32 (newval);
303 /* Get the value of h-nbit. */
306 crisv10f_h_nbit_get (SIM_CPU *current_cpu)
311 /* Set a value for h-nbit. */
314 crisv10f_h_nbit_set (SIM_CPU *current_cpu, BI newval)
316 CPU (h_nbit) = newval;
319 /* Get the value of h-nbit-move. */
322 crisv10f_h_nbit_move_get (SIM_CPU *current_cpu)
324 return GET_H_NBIT_MOVE ();
327 /* Set a value for h-nbit-move. */
330 crisv10f_h_nbit_move_set (SIM_CPU *current_cpu, BI newval)
332 SET_H_NBIT_MOVE (newval);
335 /* Get the value of h-nbit-move-pre-v32. */
338 crisv10f_h_nbit_move_pre_v32_get (SIM_CPU *current_cpu)
340 return GET_H_NBIT_MOVE_PRE_V32 ();
343 /* Set a value for h-nbit-move-pre-v32. */
346 crisv10f_h_nbit_move_pre_v32_set (SIM_CPU *current_cpu, BI newval)
348 SET_H_NBIT_MOVE_PRE_V32 (newval);
351 /* Get the value of h-xbit. */
354 crisv10f_h_xbit_get (SIM_CPU *current_cpu)
359 /* Set a value for h-xbit. */
362 crisv10f_h_xbit_set (SIM_CPU *current_cpu, BI newval)
364 CPU (h_xbit) = newval;
367 /* Get the value of h-ibit. */
370 crisv10f_h_ibit_get (SIM_CPU *current_cpu)
372 return GET_H_IBIT ();
375 /* Set a value for h-ibit. */
378 crisv10f_h_ibit_set (SIM_CPU *current_cpu, BI newval)
383 /* Get the value of h-ibit-pre-v32. */
386 crisv10f_h_ibit_pre_v32_get (SIM_CPU *current_cpu)
388 return CPU (h_ibit_pre_v32);
391 /* Set a value for h-ibit-pre-v32. */
394 crisv10f_h_ibit_pre_v32_set (SIM_CPU *current_cpu, BI newval)
396 CPU (h_ibit_pre_v32) = newval;
399 /* Get the value of h-pbit. */
402 crisv10f_h_pbit_get (SIM_CPU *current_cpu)
407 /* Set a value for h-pbit. */
410 crisv10f_h_pbit_set (SIM_CPU *current_cpu, BI newval)
412 CPU (h_pbit) = newval;
415 /* Get the value of h-ubit. */
418 crisv10f_h_ubit_get (SIM_CPU *current_cpu)
420 return GET_H_UBIT ();
423 /* Set a value for h-ubit. */
426 crisv10f_h_ubit_set (SIM_CPU *current_cpu, BI newval)
431 /* Get the value of h-ubit-pre-v32. */
434 crisv10f_h_ubit_pre_v32_get (SIM_CPU *current_cpu)
436 return CPU (h_ubit_pre_v32);
439 /* Set a value for h-ubit-pre-v32. */
442 crisv10f_h_ubit_pre_v32_set (SIM_CPU *current_cpu, BI newval)
444 CPU (h_ubit_pre_v32) = newval;
447 /* Get the value of h-insn-prefixed-p. */
450 crisv10f_h_insn_prefixed_p_get (SIM_CPU *current_cpu)
452 return GET_H_INSN_PREFIXED_P ();
455 /* Set a value for h-insn-prefixed-p. */
458 crisv10f_h_insn_prefixed_p_set (SIM_CPU *current_cpu, BI newval)
460 SET_H_INSN_PREFIXED_P (newval);
463 /* Get the value of h-insn-prefixed-p-pre-v32. */
466 crisv10f_h_insn_prefixed_p_pre_v32_get (SIM_CPU *current_cpu)
468 return CPU (h_insn_prefixed_p_pre_v32);
471 /* Set a value for h-insn-prefixed-p-pre-v32. */
474 crisv10f_h_insn_prefixed_p_pre_v32_set (SIM_CPU *current_cpu, BI newval)
476 CPU (h_insn_prefixed_p_pre_v32) = newval;
479 /* Get the value of h-prefixreg-pre-v32. */
482 crisv10f_h_prefixreg_pre_v32_get (SIM_CPU *current_cpu)
484 return CPU (h_prefixreg_pre_v32);
487 /* Set a value for h-prefixreg-pre-v32. */
490 crisv10f_h_prefixreg_pre_v32_set (SIM_CPU *current_cpu, SI newval)
492 CPU (h_prefixreg_pre_v32) = newval;
495 /* Record trace results for INSN. */
498 crisv10f_record_trace_results (SIM_CPU *current_cpu, CGEN_INSN *insn,
499 int *indices, TRACE_RECORD *tr)