1 /* Misc. support for CPU family crisv10f.
3 THIS FILE IS MACHINE GENERATED WITH CGEN.
5 Copyright 1996-2015 Free Software Foundation, Inc.
7 This file is part of the GNU simulators.
9 This file is free software; you can redistribute it and/or modify
10 it under the terms of the GNU General Public License as published by
11 the Free Software Foundation; either version 3, or (at your option)
14 It is distributed in the hope that it will be useful, but WITHOUT
15 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
16 or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public
17 License for more details.
19 You should have received a copy of the GNU General Public License along
20 with this program; if not, see <http://www.gnu.org/licenses/>.
24 #define WANT_CPU crisv10f
25 #define WANT_CPU_CRISV10F
30 /* Get the value of h-v32-non-v32. */
33 crisv10f_h_v32_non_v32_get (SIM_CPU *current_cpu)
35 return GET_H_V32_NON_V32 ();
38 /* Set a value for h-v32-non-v32. */
41 crisv10f_h_v32_non_v32_set (SIM_CPU *current_cpu, BI newval)
43 SET_H_V32_NON_V32 (newval);
46 /* Get the value of h-pc. */
49 crisv10f_h_pc_get (SIM_CPU *current_cpu)
54 /* Set a value for h-pc. */
57 crisv10f_h_pc_set (SIM_CPU *current_cpu, USI newval)
62 /* Get the value of h-gr. */
65 crisv10f_h_gr_get (SIM_CPU *current_cpu, UINT regno)
67 return GET_H_GR (regno);
70 /* Set a value for h-gr. */
73 crisv10f_h_gr_set (SIM_CPU *current_cpu, UINT regno, SI newval)
75 SET_H_GR (regno, newval);
78 /* Get the value of h-gr-pc. */
81 crisv10f_h_gr_pc_get (SIM_CPU *current_cpu, UINT regno)
83 return GET_H_GR_PC (regno);
86 /* Set a value for h-gr-pc. */
89 crisv10f_h_gr_pc_set (SIM_CPU *current_cpu, UINT regno, SI newval)
91 SET_H_GR_PC (regno, newval);
94 /* Get the value of h-gr-real-pc. */
97 crisv10f_h_gr_real_pc_get (SIM_CPU *current_cpu, UINT regno)
99 return CPU (h_gr_real_pc[regno]);
102 /* Set a value for h-gr-real-pc. */
105 crisv10f_h_gr_real_pc_set (SIM_CPU *current_cpu, UINT regno, SI newval)
107 CPU (h_gr_real_pc[regno]) = newval;
110 /* Get the value of h-raw-gr-pc. */
113 crisv10f_h_raw_gr_pc_get (SIM_CPU *current_cpu, UINT regno)
115 return GET_H_RAW_GR_PC (regno);
118 /* Set a value for h-raw-gr-pc. */
121 crisv10f_h_raw_gr_pc_set (SIM_CPU *current_cpu, UINT regno, SI newval)
123 SET_H_RAW_GR_PC (regno, newval);
126 /* Get the value of h-sr. */
129 crisv10f_h_sr_get (SIM_CPU *current_cpu, UINT regno)
131 return GET_H_SR (regno);
134 /* Set a value for h-sr. */
137 crisv10f_h_sr_set (SIM_CPU *current_cpu, UINT regno, SI newval)
139 SET_H_SR (regno, newval);
142 /* Get the value of h-sr-v10. */
145 crisv10f_h_sr_v10_get (SIM_CPU *current_cpu, UINT regno)
147 return GET_H_SR_V10 (regno);
150 /* Set a value for h-sr-v10. */
153 crisv10f_h_sr_v10_set (SIM_CPU *current_cpu, UINT regno, SI newval)
155 SET_H_SR_V10 (regno, newval);
158 /* Get the value of h-cbit. */
161 crisv10f_h_cbit_get (SIM_CPU *current_cpu)
166 /* Set a value for h-cbit. */
169 crisv10f_h_cbit_set (SIM_CPU *current_cpu, BI newval)
171 CPU (h_cbit) = newval;
174 /* Get the value of h-cbit-move. */
177 crisv10f_h_cbit_move_get (SIM_CPU *current_cpu)
179 return GET_H_CBIT_MOVE ();
182 /* Set a value for h-cbit-move. */
185 crisv10f_h_cbit_move_set (SIM_CPU *current_cpu, BI newval)
187 SET_H_CBIT_MOVE (newval);
190 /* Get the value of h-cbit-move-pre-v32. */
193 crisv10f_h_cbit_move_pre_v32_get (SIM_CPU *current_cpu)
195 return GET_H_CBIT_MOVE_PRE_V32 ();
198 /* Set a value for h-cbit-move-pre-v32. */
201 crisv10f_h_cbit_move_pre_v32_set (SIM_CPU *current_cpu, BI newval)
203 SET_H_CBIT_MOVE_PRE_V32 (newval);
206 /* Get the value of h-vbit. */
209 crisv10f_h_vbit_get (SIM_CPU *current_cpu)
214 /* Set a value for h-vbit. */
217 crisv10f_h_vbit_set (SIM_CPU *current_cpu, BI newval)
219 CPU (h_vbit) = newval;
222 /* Get the value of h-vbit-move. */
225 crisv10f_h_vbit_move_get (SIM_CPU *current_cpu)
227 return GET_H_VBIT_MOVE ();
230 /* Set a value for h-vbit-move. */
233 crisv10f_h_vbit_move_set (SIM_CPU *current_cpu, BI newval)
235 SET_H_VBIT_MOVE (newval);
238 /* Get the value of h-vbit-move-pre-v32. */
241 crisv10f_h_vbit_move_pre_v32_get (SIM_CPU *current_cpu)
243 return GET_H_VBIT_MOVE_PRE_V32 ();
246 /* Set a value for h-vbit-move-pre-v32. */
249 crisv10f_h_vbit_move_pre_v32_set (SIM_CPU *current_cpu, BI newval)
251 SET_H_VBIT_MOVE_PRE_V32 (newval);
254 /* Get the value of h-zbit. */
257 crisv10f_h_zbit_get (SIM_CPU *current_cpu)
262 /* Set a value for h-zbit. */
265 crisv10f_h_zbit_set (SIM_CPU *current_cpu, BI newval)
267 CPU (h_zbit) = newval;
270 /* Get the value of h-zbit-move. */
273 crisv10f_h_zbit_move_get (SIM_CPU *current_cpu)
275 return GET_H_ZBIT_MOVE ();
278 /* Set a value for h-zbit-move. */
281 crisv10f_h_zbit_move_set (SIM_CPU *current_cpu, BI newval)
283 SET_H_ZBIT_MOVE (newval);
286 /* Get the value of h-zbit-move-pre-v32. */
289 crisv10f_h_zbit_move_pre_v32_get (SIM_CPU *current_cpu)
291 return GET_H_ZBIT_MOVE_PRE_V32 ();
294 /* Set a value for h-zbit-move-pre-v32. */
297 crisv10f_h_zbit_move_pre_v32_set (SIM_CPU *current_cpu, BI newval)
299 SET_H_ZBIT_MOVE_PRE_V32 (newval);
302 /* Get the value of h-nbit. */
305 crisv10f_h_nbit_get (SIM_CPU *current_cpu)
310 /* Set a value for h-nbit. */
313 crisv10f_h_nbit_set (SIM_CPU *current_cpu, BI newval)
315 CPU (h_nbit) = newval;
318 /* Get the value of h-nbit-move. */
321 crisv10f_h_nbit_move_get (SIM_CPU *current_cpu)
323 return GET_H_NBIT_MOVE ();
326 /* Set a value for h-nbit-move. */
329 crisv10f_h_nbit_move_set (SIM_CPU *current_cpu, BI newval)
331 SET_H_NBIT_MOVE (newval);
334 /* Get the value of h-nbit-move-pre-v32. */
337 crisv10f_h_nbit_move_pre_v32_get (SIM_CPU *current_cpu)
339 return GET_H_NBIT_MOVE_PRE_V32 ();
342 /* Set a value for h-nbit-move-pre-v32. */
345 crisv10f_h_nbit_move_pre_v32_set (SIM_CPU *current_cpu, BI newval)
347 SET_H_NBIT_MOVE_PRE_V32 (newval);
350 /* Get the value of h-xbit. */
353 crisv10f_h_xbit_get (SIM_CPU *current_cpu)
358 /* Set a value for h-xbit. */
361 crisv10f_h_xbit_set (SIM_CPU *current_cpu, BI newval)
363 CPU (h_xbit) = newval;
366 /* Get the value of h-ibit. */
369 crisv10f_h_ibit_get (SIM_CPU *current_cpu)
371 return GET_H_IBIT ();
374 /* Set a value for h-ibit. */
377 crisv10f_h_ibit_set (SIM_CPU *current_cpu, BI newval)
382 /* Get the value of h-ibit-pre-v32. */
385 crisv10f_h_ibit_pre_v32_get (SIM_CPU *current_cpu)
387 return CPU (h_ibit_pre_v32);
390 /* Set a value for h-ibit-pre-v32. */
393 crisv10f_h_ibit_pre_v32_set (SIM_CPU *current_cpu, BI newval)
395 CPU (h_ibit_pre_v32) = newval;
398 /* Get the value of h-pbit. */
401 crisv10f_h_pbit_get (SIM_CPU *current_cpu)
406 /* Set a value for h-pbit. */
409 crisv10f_h_pbit_set (SIM_CPU *current_cpu, BI newval)
411 CPU (h_pbit) = newval;
414 /* Get the value of h-ubit. */
417 crisv10f_h_ubit_get (SIM_CPU *current_cpu)
419 return GET_H_UBIT ();
422 /* Set a value for h-ubit. */
425 crisv10f_h_ubit_set (SIM_CPU *current_cpu, BI newval)
430 /* Get the value of h-ubit-pre-v32. */
433 crisv10f_h_ubit_pre_v32_get (SIM_CPU *current_cpu)
435 return CPU (h_ubit_pre_v32);
438 /* Set a value for h-ubit-pre-v32. */
441 crisv10f_h_ubit_pre_v32_set (SIM_CPU *current_cpu, BI newval)
443 CPU (h_ubit_pre_v32) = newval;
446 /* Get the value of h-insn-prefixed-p. */
449 crisv10f_h_insn_prefixed_p_get (SIM_CPU *current_cpu)
451 return GET_H_INSN_PREFIXED_P ();
454 /* Set a value for h-insn-prefixed-p. */
457 crisv10f_h_insn_prefixed_p_set (SIM_CPU *current_cpu, BI newval)
459 SET_H_INSN_PREFIXED_P (newval);
462 /* Get the value of h-insn-prefixed-p-pre-v32. */
465 crisv10f_h_insn_prefixed_p_pre_v32_get (SIM_CPU *current_cpu)
467 return CPU (h_insn_prefixed_p_pre_v32);
470 /* Set a value for h-insn-prefixed-p-pre-v32. */
473 crisv10f_h_insn_prefixed_p_pre_v32_set (SIM_CPU *current_cpu, BI newval)
475 CPU (h_insn_prefixed_p_pre_v32) = newval;
478 /* Get the value of h-prefixreg-pre-v32. */
481 crisv10f_h_prefixreg_pre_v32_get (SIM_CPU *current_cpu)
483 return CPU (h_prefixreg_pre_v32);
486 /* Set a value for h-prefixreg-pre-v32. */
489 crisv10f_h_prefixreg_pre_v32_set (SIM_CPU *current_cpu, SI newval)
491 CPU (h_prefixreg_pre_v32) = newval;
494 /* Record trace results for INSN. */
497 crisv10f_record_trace_results (SIM_CPU *current_cpu, CGEN_INSN *insn,
498 int *indices, TRACE_RECORD *tr)