1 # Makefile template for Configure for the CRIS simulator, based on a mix
2 # of the ones for m32r and i960.
4 # Copyright (C) 2004-2018 Free Software Foundation, Inc.
5 # Contributed by Axis Communications.
7 # This program is free software; you can redistribute it and/or modify
8 # it under the terms of the GNU General Public License as published by
9 # the Free Software Foundation; either version 3 of the License, or
10 # (at your option) any later version.
12 # This program is distributed in the hope that it will be useful,
13 # but WITHOUT ANY WARRANTY; without even the implied warranty of
14 # MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 # GNU General Public License for more details.
17 # You should have received a copy of the GNU General Public License
18 # along with this program. If not, see <http://www.gnu.org/licenses/>.
20 ## COMMON_PRE_CONFIG_FRAG
22 CRISV10F_OBJS = crisv10f.o cpuv10.o decodev10.o modelv10.o mloopv10f.o
23 CRISV32F_OBJS = crisv32f.o cpuv32.o decodev32.o modelv32.o mloopv32f.o
26 $(SIM_NEW_COMMON_OBJS) \
27 cgen-utils.o cgen-trace.o cgen-scache.o \
35 # Extra headers included by sim-main.h.
36 # FIXME: $(srccom)/cgen-ops.h should be in CGEN_INCLUDE_DEPS.
38 $(CGEN_INCLUDE_DEPS) $(srccom)/cgen-ops.h \
39 arch.h cpuall.h cris-sim.h cris-desc.h
41 SIM_EXTRA_CLEAN = cris-clean
43 # This selects the cris newlib/libgloss syscall definitions.
44 NL_TARGET = -DNL_TARGET_cris
46 ## COMMON_POST_CONFIG_FRAG
50 sim-if.o: sim-if.c $(SIM_MAIN_DEPS) $(sim-core_h) $(sim-options_h)
52 # Needs CPU-specific knowledge.
53 dv-cris.o: dv-cris.c $(SIM_MAIN_DEPS) $(sim-core_h)
55 # This is the same rule as dv-core.o etc.
56 dv-rv.o: dv-rv.c $(hw_main_headers) $(sim_main_headers)
58 arch.o: arch.c $(SIM_MAIN_DEPS)
60 traps.o: traps.c targ-vals.h $(SIM_MAIN_DEPS) $(sim-options_h)
61 devices.o: devices.c $(SIM_MAIN_DEPS)
63 # rvdummy is just used for testing. It does nothing if
64 # --enable-sim-hardware isn't active.
68 check: rvdummy$(EXEEXT)
70 rvdummy$(EXEEXT): rvdummy.o $(EXTRA_LIBDEPS)
71 $(CC) $(ALL_CFLAGS) -o rvdummy$(EXEEXT) rvdummy.o $(EXTRA_LIBS)
73 rvdummy.o: rvdummy.c config.h $(remote_sim_h) $(callback_h)
77 CRISV10F_INCLUDE_DEPS = \
78 $(CGEN_MAIN_CPU_DEPS) \
79 cpuv10.h decodev10.h engv10.h
81 crisv10f.o: crisv10f.c cris-tmpl.c $(CRISV10F_INCLUDE_DEPS)
83 # FIXME: What is mono and what does "Use of `mono' is wip" mean (other
84 # than the apparent; some "mono" feature is work in progress)?
85 mloopv10f.c engv10.h: stamp-v10fmloop
86 stamp-v10fmloop: $(srcdir)/../common/genmloop.sh mloop.in Makefile
87 $(SHELL) $(srccom)/genmloop.sh -shell $(SHELL) \
88 -mono -no-fast -pbb -switch semcrisv10f-switch.c \
89 -cpu crisv10f -infile $(srcdir)/mloop.in
90 $(SHELL) $(srcroot)/move-if-change eng.hin engv10.h
91 $(SHELL) $(srcroot)/move-if-change mloop.cin mloopv10f.c
93 mloopv10f.o: mloopv10f.c semcrisv10f-switch.c $(CRISV10F_INCLUDE_DEPS)
95 cpuv10.o: cpuv10.c $(CRISV10F_INCLUDE_DEPS)
96 decodev10.o: decodev10.c $(CRISV10F_INCLUDE_DEPS)
97 modelv10.o: modelv10.c $(CRISV10F_INCLUDE_DEPS)
101 CRISV32F_INCLUDE_DEPS = \
102 $(CGEN_MAIN_CPU_DEPS) \
103 cpuv32.h decodev32.h engv32.h
105 crisv32f.o: crisv32f.c cris-tmpl.c $(CRISV32F_INCLUDE_DEPS)
107 # FIXME: What is mono and what does "Use of `mono' is wip" mean (other
108 # than the apparent; some "mono" feature is work in progress)?
109 mloopv32f.c engv32.h: stamp-v32fmloop
110 # We depend on stamp-v10fmloop to get serialization to avoid
111 # racing with it for the same temporary file-names when "make -j".
112 stamp-v32fmloop: stamp-v10fmloop $(srcdir)/../common/genmloop.sh mloop.in Makefile
113 $(SHELL) $(srccom)/genmloop.sh -shell $(SHELL) \
114 -mono -no-fast -pbb -switch semcrisv32f-switch.c \
115 -cpu crisv32f -infile $(srcdir)/mloop.in
116 $(SHELL) $(srcroot)/move-if-change eng.hin engv32.h
117 $(SHELL) $(srcroot)/move-if-change mloop.cin mloopv32f.c
118 touch stamp-v32fmloop
119 mloopv32f.o: mloopv32f.c semcrisv32f-switch.c $(CRISV32F_INCLUDE_DEPS)
121 cpuv32.o: cpuv32.c $(CRISV32F_INCLUDE_DEPS)
122 decodev32.o: decodev32.c $(CRISV32F_INCLUDE_DEPS)
123 modelv32.o: modelv32.c $(CRISV32F_INCLUDE_DEPS)
127 rm -f mloopv$${v}f.c engv$${v}.h stamp-v$${v}fmloop; \
128 rm -f stamp-v$${v}fcpu; \
130 -rm -f stamp-arch stamp-desc
133 # cgen support, enable with --enable-cgen-maint
135 # The following line is commented in or out depending upon --enable-cgen-maint.
136 @CGEN_MAINT@CGEN_MAINT =
138 # Useful when making CGEN-generated files manually, without --enable-cgen-maint.
139 stamps: stamp-v10fmloop stamp-v32fmloop stamp-arch stamp-v10fcpu stamp-v32fcpu stamp-desc
141 stamp-arch: $(CGEN_READ_SCM) $(CGEN_ARCH_SCM) $(CPU_DIR)/cris.cpu Makefile
142 $(MAKE) cgen-arch $(CGEN_FLAGS_TO_PASS) mach=crisv10,crisv32 \
143 archfile=$(CPU_DIR)/cris.cpu \
144 FLAGS="with-scache with-profile=fn"
146 arch.h arch.c cpuall.h: $(CGEN_MAINT) stamp-arch
148 # The sed-hack is supposed to be temporary, until we get CGEN to emit it.
149 stamp-v10fcpu: $(CGEN_READ_SCM) $(CGEN_CPU_SCM) $(CGEN_DECODE_SCM) $(CPU_DIR)/cris.cpu Makefile
150 $(MAKE) cgen-cpu-decode $(CGEN_FLAGS_TO_PASS) \
151 archfile=$(CPU_DIR)/cris.cpu \
152 cpu=crisv10f mach=crisv10 SUFFIX=v10 FLAGS="with-scache with-profile=fn" EXTRAFILES="$(CGEN_CPU_SEMSW)"
153 $(SHELL) $(srcroot)/move-if-change $(srcdir)/semv10-switch.c $(srcdir)/semcrisv10f-switch.c
154 sed -ne 'p; s/^\(#include "sim-assert.h"\)$$/#include "cgen-ops.h"/p' < $(srcdir)/decodev10.c > decodev10.c.tmp
155 mv decodev10.c.tmp $(srcdir)/decodev10.c
157 cpuv10.h cpuv10.c semcrisv10f-switch.c modelv10.c decodev10.c decodev10.h: $(CGEN_MAINT) stamp-v10fcpu
159 stamp-v32fcpu: $(CGEN_READ_SCM) $(CGEN_CPU_SCM) $(CGEN_DECODE_SCM) $(CPU_DIR)/cris.cpu Makefile
160 $(MAKE) cgen-cpu-decode $(CGEN_FLAGS_TO_PASS) \
161 archfile=$(CPU_DIR)/cris.cpu \
162 cpu=crisv32f mach=crisv32 SUFFIX=v32 FLAGS="with-scache with-profile=fn" EXTRAFILES="$(CGEN_CPU_SEMSW)"
163 $(SHELL) $(srcroot)/move-if-change $(srcdir)/semv32-switch.c $(srcdir)/semcrisv32f-switch.c
164 sed -ne 'p; s/^\(#include "sim-assert.h"\)$$/#include "cgen-ops.h"/p' < $(srcdir)/decodev32.c > decodev32.c.tmp
165 mv decodev32.c.tmp $(srcdir)/decodev32.c
167 cpuv32.h cpuv32.c semcrisv32f-switch.c modelv32.c decodev32.c decodev32.h: $(CGEN_MAINT) stamp-v32fcpu
169 stamp-desc: $(CGEN_READ_SCM) $(CGEN_DESC_SCM) $(CPU_DIR)/cris.cpu Makefile
170 $(MAKE) cgen-desc $(CGEN_FLAGS_TO_PASS) \
171 archfile=$(CPU_DIR)/cris.cpu \
174 cris-desc.c cris-desc.h cris-opc.h: $(CGEN_MAINT) stamp-desc