1 /* This file is part of the program psim.
3 Copyright (C) 1994-1997, Andrew Cagney <cagney@highland.com.au>
5 This program is free software; you can redistribute it and/or modify
6 it under the terms of the GNU General Public License as published by
7 the Free Software Foundation; either version 2 of the License, or
8 (at your option) any later version.
10 This program is distributed in the hope that it will be useful,
11 but WITHOUT ANY WARRANTY; without even the implied warranty of
12 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 GNU General Public License for more details.
15 You should have received a copy of the GNU General Public License
16 along with this program; if not, write to the Free Software
17 Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
26 #include "sim-assert.h"
32 /* "core" module install handler.
34 This is called via sim_module_install to install the "core" subsystem
35 into the simulator. */
37 static MODULE_INIT_FN sim_core_init;
38 static MODULE_UNINSTALL_FN sim_core_uninstall;
41 /* TODO: create sim/common/device.h */
42 void device_error (device *me, char* message, ...);
43 int device_io_read_buffer(device *me, void *dest, int space, address_word addr, unsigned nr_bytes, sim_cpu *processor, sim_cia cia);
44 int device_io_write_buffer(device *me, const void *source, int space, address_word addr, unsigned nr_bytes, sim_cpu *processor, sim_cia cia);
49 sim_core_install (SIM_DESC sd)
51 SIM_ASSERT (STATE_MAGIC (sd) == SIM_MAGIC_NUMBER);
53 /* establish the other handlers */
54 sim_module_add_uninstall_fn (sd, sim_core_uninstall);
55 sim_module_add_init_fn (sd, sim_core_init);
57 /* establish any initial data structures - none */
62 /* Uninstall the "core" subsystem from the simulator. */
66 sim_core_uninstall (SIM_DESC sd)
68 sim_core *core = STATE_CORE(sd);
70 /* blow away any mappings */
71 for (map = 0; map < nr_maps; map++) {
72 sim_core_mapping *curr = core->common.map[map].first;
73 while (curr != NULL) {
74 sim_core_mapping *tbd = curr;
76 if (tbd->free_buffer != NULL) {
77 SIM_ASSERT(tbd->buffer != NULL);
78 zfree(tbd->free_buffer);
82 core->common.map[map].first = NULL;
89 sim_core_init (SIM_DESC sd)
97 #ifndef SIM_CORE_SIGNAL
98 #define SIM_CORE_SIGNAL(SD,CPU,CIA,MAP,NR_BYTES,ADDR,TRANSFER,ERROR) \
99 sim_core_signal ((SD), (CPU), (CIA), (MAP), (NR_BYTES), (ADDR), (TRANSFER), (ERROR))
104 sim_core_signal (SIM_DESC sd,
110 transfer_type transfer,
111 sim_core_signals sig)
113 const char *copy = (transfer == read_transfer ? "read" : "write");
114 address_word ip = CIA_ADDR (cia);
117 case sim_core_unmapped_signal:
118 sim_io_eprintf (sd, "core: %d byte %s to unmapped address 0x%lx at 0x%lx\n",
119 nr_bytes, copy, (unsigned long) addr, (unsigned long) ip);
120 sim_engine_halt (sd, cpu, NULL, cia, sim_stopped, SIM_SIGSEGV);
122 case sim_core_unaligned_signal:
123 sim_io_eprintf (sd, "core: %d byte misaligned %s to address 0x%lx at 0x%lx\n",
124 nr_bytes, copy, (unsigned long) addr, (unsigned long) ip);
125 sim_engine_halt (sd, cpu, NULL, cia, sim_stopped, SIM_SIGBUS);
128 sim_engine_abort (sd, cpu, cia,
129 "sim_core_signal - internal error - bad switch");
136 new_sim_core_mapping (SIM_DESC sd,
140 address_word nr_bytes,
150 sim_core_mapping *new_mapping = ZALLOC(sim_core_mapping);
152 new_mapping->level = level;
153 new_mapping->space = space;
154 new_mapping->base = addr;
155 new_mapping->nr_bytes = nr_bytes;
156 new_mapping->bound = addr + (nr_bytes - 1);
158 new_mapping->mask = (unsigned) 0 - 1;
160 new_mapping->mask = modulo - 1;
161 new_mapping->buffer = buffer;
162 new_mapping->free_buffer = free_buffer;
163 new_mapping->device = device;
170 sim_core_map_attach (SIM_DESC sd,
171 sim_core_map *access_map,
175 address_word nr_bytes,
178 struct hw *client, /*callback/default*/
180 device *client, /*callback/default*/
182 void *buffer, /*raw_memory*/
183 void *free_buffer) /*raw_memory*/
185 /* find the insertion point for this additional mapping and then
187 sim_core_mapping *next_mapping;
188 sim_core_mapping **last_mapping;
190 SIM_ASSERT ((client == NULL) != (buffer == NULL));
191 SIM_ASSERT ((client == NULL) >= (free_buffer != NULL));
193 /* actually do occasionally get a zero size map */
197 device_error(client, "called on sim_core_map_attach with size zero");
200 sim_hw_abort (sd, client, "called on sim_core_map_attach with size zero");
202 sim_io_error (sd, "called on sim_core_map_attach with size zero");
205 /* find the insertion point (between last/next) */
206 next_mapping = access_map->first;
207 last_mapping = &access_map->first;
208 while(next_mapping != NULL
209 && (next_mapping->level < level
210 || (next_mapping->level == level
211 && next_mapping->bound < addr)))
213 /* provided levels are the same */
214 /* assert: next_mapping->base > all bases before next_mapping */
215 /* assert: next_mapping->bound >= all bounds before next_mapping */
216 last_mapping = &next_mapping->next;
217 next_mapping = next_mapping->next;
220 /* check insertion point correct */
221 SIM_ASSERT (next_mapping == NULL || next_mapping->level >= level);
222 if (next_mapping != NULL && next_mapping->level == level
223 && next_mapping->base < (addr + (nr_bytes - 1)))
226 device_error (client, "memory map %d:0x%lx..0x%lx (%ld bytes) overlaps %d:0x%lx..0x%lx (%ld bytes)",
230 (long) (addr + (nr_bytes - 1)),
232 (long) next_mapping->base,
233 (long) next_mapping->bound,
234 (long) next_mapping->nr_bytes);
237 sim_hw_abort (sd, client, "memory map %d:0x%lx..0x%lx (%ld bytes) overlaps %d:0x%lx..0x%lx (%ld bytes)",
241 (long) (addr + (nr_bytes - 1)),
243 (long) next_mapping->base,
244 (long) next_mapping->bound,
245 (long) next_mapping->nr_bytes);
247 sim_io_error (sd, "memory map %d:0x%lx..0x%lx (%ld bytes) overlaps %d:0x%lx..0x%lx (%ld bytes)",
251 (long) (addr + (nr_bytes - 1)),
253 (long) next_mapping->base,
254 (long) next_mapping->bound,
255 (long) next_mapping->nr_bytes);
258 /* create/insert the new mapping */
259 *last_mapping = new_sim_core_mapping(sd,
261 space, addr, nr_bytes, modulo,
262 client, buffer, free_buffer);
263 (*last_mapping)->next = next_mapping;
266 /* Attach memory or a memory mapped device to the simulator.
267 See sim-core.h for a full description. */
271 sim_core_attach (SIM_DESC sd,
277 address_word nr_bytes,
284 void *optional_buffer)
286 sim_core *memory = STATE_CORE(sd);
291 /* check for for attempt to use unimplemented per-processor core map */
293 sim_io_error (sd, "sim_core_map_attach - processor specific memory map not yet supported");
295 /* verify modulo memory */
296 if (!WITH_MODULO_MEMORY && modulo != 0)
299 device_error (client, "sim_core_attach - internal error - modulo memory disabled");
302 sim_hw_abort (sd, client, "sim_core_attach - internal error - modulo memory disabled");
304 sim_io_error (sd, "sim_core_attach - internal error - modulo memory disabled");
306 if (client != NULL && modulo != 0)
309 device_error (client, "sim_core_attach - internal error - modulo and callback memory conflict");
312 sim_hw_abort (sd, client, "sim_core_attach - internal error - modulo and callback memory conflict");
314 sim_io_error (sd, "sim_core_attach - internal error - modulo and callback memory conflict");
318 unsigned mask = modulo - 1;
320 while (mask >= sizeof (unsigned64)) /* minimum modulo */
327 if (mask != sizeof (unsigned64) - 1)
330 device_error (client, "sim_core_attach - internal error - modulo %lx not power of two", (long) modulo);
333 sim_hw_abort (sd, client, "sim_core_attach - internal error - modulo %lx not power of two", (long) modulo);
335 sim_io_error (sd, "sim_core_attach - internal error - modulo %lx not power of two", (long) modulo);
339 /* verify consistency between device and buffer */
340 if (client != NULL && optional_buffer != NULL)
343 device_error (client, "sim_core_attach - internal error - conflicting buffer and attach arguments");
346 sim_hw_abort (sd, client, "sim_core_attach - internal error - conflicting buffer and attach arguments");
348 sim_io_error (sd, "sim_core_attach - internal error - conflicting buffer and attach arguments");
352 if (optional_buffer == NULL)
354 int padding = (addr % sizeof (unsigned64));
355 unsigned long bytes = (modulo == 0 ? nr_bytes : modulo) + padding;
356 free_buffer = zalloc (bytes);
357 buffer = (char*) free_buffer + padding;
361 buffer = optional_buffer;
372 /* attach the region to all applicable access maps */
377 if (mapmask & (1 << map))
379 sim_core_map_attach (sd, &memory->common.map[map],
380 level, space, addr, nr_bytes, modulo,
381 client, buffer, free_buffer);
386 /* Just copy this map to each of the processor specific data structures.
387 FIXME - later this will be replaced by true processor specific
391 for (i = 0; i < MAX_NR_PROCESSORS; i++)
393 CPU_CORE (STATE_CPU (sd, i))->common = STATE_CORE (sd)->common;
399 /* Remove any memory reference related to this address */
400 STATIC_INLINE_SIM_CORE\
402 sim_core_map_detach (SIM_DESC sd,
403 sim_core_map *access_map,
408 sim_core_mapping **entry;
409 for (entry = &access_map->first;
411 entry = &(*entry)->next)
413 if ((*entry)->base == addr
414 && (*entry)->level == level
415 && (*entry)->space == space)
417 sim_core_mapping *dead = (*entry);
418 (*entry) = dead->next;
419 if (dead->free_buffer != NULL)
420 zfree (dead->free_buffer);
429 sim_core_detach (SIM_DESC sd,
435 sim_core *memory = STATE_CORE (sd);
437 for (map = 0; map < nr_maps; map++)
439 sim_core_map_detach (sd, &memory->common.map[map],
440 level, address_space, addr);
442 /* Just copy this update to each of the processor specific data
443 structures. FIXME - later this will be replaced by true
444 processor specific maps. */
447 for (i = 0; i < MAX_NR_PROCESSORS; i++)
449 CPU_CORE (STATE_CPU (sd, i))->common = STATE_CORE (sd)->common;
455 STATIC_INLINE_SIM_CORE\
457 sim_core_find_mapping(sim_core_common *core,
461 transfer_type transfer,
462 int abort, /*either 0 or 1 - hint to inline/-O */
463 sim_cpu *cpu, /* abort => cpu != NULL */
466 sim_core_mapping *mapping = core->map[map].first;
467 ASSERT ((addr & (nr_bytes - 1)) == 0); /* must be aligned */
468 ASSERT ((addr + (nr_bytes - 1)) >= addr); /* must not wrap */
469 ASSERT (!abort || cpu != NULL); /* abort needs a non null CPU */
470 while (mapping != NULL)
472 if (addr >= mapping->base
473 && (addr + (nr_bytes - 1)) <= mapping->bound)
475 mapping = mapping->next;
479 SIM_CORE_SIGNAL (CPU_STATE (cpu), cpu, cia, map, nr_bytes, addr, transfer,
480 sim_core_unmapped_signal);
486 STATIC_INLINE_SIM_CORE\
488 sim_core_translate (sim_core_mapping *mapping,
491 if (WITH_MODULO_MEMORY)
492 return (void *)((unsigned8 *) mapping->buffer
493 + ((addr - mapping->base) & mapping->mask));
495 return (void *)((unsigned8 *) mapping->buffer
496 + addr - mapping->base);
502 sim_core_read_buffer (SIM_DESC sd,
509 sim_core_common *core = (cpu == NULL ? &STATE_CORE (sd)->common : &CPU_CORE (cpu)->common);
513 unsigned_word raddr = addr + count;
514 sim_core_mapping *mapping =
515 sim_core_find_mapping (core, map,
516 raddr, /*nr-bytes*/1,
518 0 /*dont-abort*/, NULL, NULL_CIA);
522 if (mapping->device != NULL)
524 int nr_bytes = len - count;
525 if (raddr + nr_bytes - 1> mapping->bound)
526 nr_bytes = mapping->bound - raddr + 1;
527 if (device_io_read_buffer (mapping->device,
528 (unsigned_1*)buffer + count,
533 CIA_GET (cpu)) != nr_bytes)
540 if (mapping->device != NULL)
542 int nr_bytes = len - count;
543 if (raddr + nr_bytes - 1> mapping->bound)
544 nr_bytes = mapping->bound - raddr + 1;
545 if (sim_hw_io_read_buffer (sd, mapping->device,
546 (unsigned_1*)buffer + count,
549 nr_bytes) != nr_bytes)
555 ((unsigned_1*)buffer)[count] =
556 *(unsigned_1*)sim_core_translate(mapping, raddr);
565 sim_core_write_buffer (SIM_DESC sd,
572 sim_core_common *core = (cpu == NULL ? &STATE_CORE (sd)->common : &CPU_CORE (cpu)->common);
576 unsigned_word raddr = addr + count;
577 sim_core_mapping *mapping =
578 sim_core_find_mapping (core, map,
579 raddr, /*nr-bytes*/1,
581 0 /*dont-abort*/, NULL, NULL_CIA);
585 if (WITH_CALLBACK_MEMORY
586 && mapping->device != NULL)
588 int nr_bytes = len - count;
589 if (raddr + nr_bytes - 1 > mapping->bound)
590 nr_bytes = mapping->bound - raddr + 1;
591 if (device_io_write_buffer (mapping->device,
592 (unsigned_1*)buffer + count,
597 CIA_GET(cpu)) != nr_bytes)
604 if (WITH_CALLBACK_MEMORY
605 && mapping->device != NULL)
607 int nr_bytes = len - count;
608 if (raddr + nr_bytes - 1 > mapping->bound)
609 nr_bytes = mapping->bound - raddr + 1;
610 if (sim_hw_io_write_buffer (sd, mapping->device,
611 (unsigned_1*)buffer + count,
614 nr_bytes) != nr_bytes)
620 *(unsigned_1*)sim_core_translate(mapping, raddr) =
621 ((unsigned_1*)buffer)[count];
630 sim_core_set_xor (SIM_DESC sd,
634 /* set up the XOR map if required. */
635 if (WITH_XOR_ENDIAN) {
637 sim_core *core = STATE_CORE (sd);
638 sim_cpu_core *cpu_core = (cpu != NULL ? CPU_CORE (cpu) : NULL);
639 if (cpu_core != NULL)
644 mask = WITH_XOR_ENDIAN - 1;
647 while (i - 1 < WITH_XOR_ENDIAN)
649 cpu_core->xor[i-1] = mask;
650 mask = (mask << 1) & (WITH_XOR_ENDIAN - 1);
657 core->byte_xor = WITH_XOR_ENDIAN - 1;
665 sim_engine_abort (sd, NULL, NULL_CIA,
666 "Attempted to enable xor-endian mode when permenantly disabled.");
670 STATIC_INLINE_SIM_CORE\
672 reverse_n (unsigned_1 *dest,
673 const unsigned_1 *src,
677 for (i = 0; i < nr_bytes; i++)
679 dest [nr_bytes - i - 1] = src [i];
686 sim_core_xor_read_buffer (SIM_DESC sd,
693 address_word byte_xor = (cpu == NULL ? STATE_CORE (sd)->byte_xor : CPU_CORE (cpu)->xor[0]);
694 if (!WITH_XOR_ENDIAN || !byte_xor)
695 return sim_core_read_buffer (sd, cpu, map, buffer, addr, nr_bytes);
697 /* only break up transfers when xor-endian is both selected and enabled */
699 unsigned_1 x[WITH_XOR_ENDIAN + 1]; /* +1 to avoid zero-sized array */
700 unsigned nr_transfered = 0;
701 address_word start = addr;
702 unsigned nr_this_transfer = (WITH_XOR_ENDIAN - (addr & ~(WITH_XOR_ENDIAN - 1)));
704 /* initial and intermediate transfers are broken when they cross
705 an XOR endian boundary */
706 while (nr_transfered + nr_this_transfer < nr_bytes)
707 /* initial/intermediate transfers */
709 /* since xor-endian is enabled stop^xor defines the start
710 address of the transfer */
711 stop = start + nr_this_transfer - 1;
712 SIM_ASSERT (start <= stop);
713 SIM_ASSERT ((stop ^ byte_xor) <= (start ^ byte_xor));
714 if (sim_core_read_buffer (sd, cpu, map, x, stop ^ byte_xor, nr_this_transfer)
716 return nr_transfered;
717 reverse_n (&((unsigned_1*)buffer)[nr_transfered], x, nr_this_transfer);
718 nr_transfered += nr_this_transfer;
719 nr_this_transfer = WITH_XOR_ENDIAN;
723 nr_this_transfer = nr_bytes - nr_transfered;
724 stop = start + nr_this_transfer - 1;
725 SIM_ASSERT (stop == (addr + nr_bytes - 1));
726 if (sim_core_read_buffer (sd, cpu, map, x, stop ^ byte_xor, nr_this_transfer)
728 return nr_transfered;
729 reverse_n (&((unsigned_1*)buffer)[nr_transfered], x, nr_this_transfer);
737 sim_core_xor_write_buffer (SIM_DESC sd,
744 address_word byte_xor = (cpu == NULL ? STATE_CORE (sd)->byte_xor : CPU_CORE (cpu)->xor[0]);
745 if (!WITH_XOR_ENDIAN || !byte_xor)
746 return sim_core_write_buffer (sd, cpu, map, buffer, addr, nr_bytes);
748 /* only break up transfers when xor-endian is both selected and enabled */
750 unsigned_1 x[WITH_XOR_ENDIAN + 1]; /* +1 to avoid zero sized array */
751 unsigned nr_transfered = 0;
752 address_word start = addr;
753 unsigned nr_this_transfer = (WITH_XOR_ENDIAN - (addr & ~(WITH_XOR_ENDIAN - 1)));
755 /* initial and intermediate transfers are broken when they cross
756 an XOR endian boundary */
757 while (nr_transfered + nr_this_transfer < nr_bytes)
758 /* initial/intermediate transfers */
760 /* since xor-endian is enabled stop^xor defines the start
761 address of the transfer */
762 stop = start + nr_this_transfer - 1;
763 SIM_ASSERT (start <= stop);
764 SIM_ASSERT ((stop ^ byte_xor) <= (start ^ byte_xor));
765 reverse_n (x, &((unsigned_1*)buffer)[nr_transfered], nr_this_transfer);
766 if (sim_core_read_buffer (sd, cpu, map, x, stop ^ byte_xor, nr_this_transfer)
768 return nr_transfered;
769 nr_transfered += nr_this_transfer;
770 nr_this_transfer = WITH_XOR_ENDIAN;
774 nr_this_transfer = nr_bytes - nr_transfered;
775 stop = start + nr_this_transfer - 1;
776 SIM_ASSERT (stop == (addr + nr_bytes - 1));
777 reverse_n (x, &((unsigned_1*)buffer)[nr_transfered], nr_this_transfer);
778 if (sim_core_read_buffer (sd, cpu, map, x, stop ^ byte_xor, nr_this_transfer)
780 return nr_transfered;
787 /* define the read/write 1/2/4/8/16/word functions */
790 #include "sim-n-core.h"
793 #include "sim-n-core.h"
797 #include "sim-n-core.h"
801 #include "sim-n-core.h"
805 #include "sim-n-core.h"
808 #include "sim-n-core.h"
812 #include "sim-n-core.h"
815 #include "sim-n-core.h"
818 #include "sim-n-core.h"