1 /* The common simulator framework for GDB, the GNU Debugger.
3 Copyright 2002-2015 Free Software Foundation, Inc.
5 Contributed by Andrew Cagney and Red Hat.
7 This file is part of GDB.
9 This program is free software; you can redistribute it and/or modify
10 it under the terms of the GNU General Public License as published by
11 the Free Software Foundation; either version 3 of the License, or
12 (at your option) any later version.
14 This program is distributed in the hope that it will be useful,
15 but WITHOUT ANY WARRANTY; without even the implied warranty of
16 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 GNU General Public License for more details.
19 You should have received a copy of the GNU General Public License
20 along with this program. If not, see <http://www.gnu.org/licenses/>. */
27 #include "sim-assert.h"
31 #define device_error(client, ...) device_error ((device *)(client), __VA_ARGS__)
32 #define device_io_read_buffer(client, ...) device_io_read_buffer ((device *)(client), __VA_ARGS__)
33 #define device_io_write_buffer(client, ...) device_io_write_buffer ((device *)(client), __VA_ARGS__)
36 /* "core" module install handler.
38 This is called via sim_module_install to install the "core"
39 subsystem into the simulator. */
42 static MODULE_INIT_FN sim_core_init;
43 static MODULE_UNINSTALL_FN sim_core_uninstall;
48 sim_core_install (SIM_DESC sd)
50 SIM_ASSERT (STATE_MAGIC (sd) == SIM_MAGIC_NUMBER);
52 /* establish the other handlers */
53 sim_module_add_uninstall_fn (sd, sim_core_uninstall);
54 sim_module_add_init_fn (sd, sim_core_init);
56 /* establish any initial data structures - none */
62 /* Uninstall the "core" subsystem from the simulator. */
66 sim_core_uninstall (SIM_DESC sd)
68 sim_core *core = STATE_CORE (sd);
70 /* blow away any mappings */
71 for (map = 0; map < nr_maps; map++) {
72 sim_core_mapping *curr = core->common.map[map].first;
73 while (curr != NULL) {
74 sim_core_mapping *tbd = curr;
76 if (tbd->free_buffer != NULL) {
77 SIM_ASSERT (tbd->buffer != NULL);
78 free (tbd->free_buffer);
82 core->common.map[map].first = NULL;
90 sim_core_init (SIM_DESC sd)
99 #ifndef SIM_CORE_SIGNAL
100 #define SIM_CORE_SIGNAL(SD,CPU,CIA,MAP,NR_BYTES,ADDR,TRANSFER,ERROR) \
101 sim_core_signal ((SD), (CPU), (CIA), (MAP), (NR_BYTES), (ADDR), (TRANSFER), (ERROR))
104 #if EXTERN_SIM_CORE_P
106 sim_core_signal (SIM_DESC sd,
112 transfer_type transfer,
113 sim_core_signals sig)
115 const char *copy = (transfer == read_transfer ? "read" : "write");
116 address_word ip = CIA_ADDR (cia);
119 case sim_core_unmapped_signal:
120 sim_io_eprintf (sd, "core: %d byte %s to unmapped address 0x%lx at 0x%lx\n",
121 nr_bytes, copy, (unsigned long) addr, (unsigned long) ip);
122 sim_engine_halt (sd, cpu, NULL, cia, sim_stopped, SIM_SIGSEGV);
124 case sim_core_unaligned_signal:
125 sim_io_eprintf (sd, "core: %d byte misaligned %s to address 0x%lx at 0x%lx\n",
126 nr_bytes, copy, (unsigned long) addr, (unsigned long) ip);
127 sim_engine_halt (sd, cpu, NULL, cia, sim_stopped, SIM_SIGBUS);
130 sim_engine_abort (sd, cpu, cia,
131 "sim_core_signal - internal error - bad switch");
137 #if EXTERN_SIM_CORE_P
138 static sim_core_mapping *
139 new_sim_core_mapping (SIM_DESC sd,
143 address_word nr_bytes,
153 sim_core_mapping *new_mapping = ZALLOC (sim_core_mapping);
155 new_mapping->level = level;
156 new_mapping->space = space;
157 new_mapping->base = addr;
158 new_mapping->nr_bytes = nr_bytes;
159 new_mapping->bound = addr + (nr_bytes - 1);
160 new_mapping->mask = modulo - 1;
161 new_mapping->buffer = buffer;
162 new_mapping->free_buffer = free_buffer;
163 new_mapping->device = device;
169 #if EXTERN_SIM_CORE_P
171 sim_core_map_attach (SIM_DESC sd,
172 sim_core_map *access_map,
176 address_word nr_bytes,
179 struct hw *client, /*callback/default*/
181 device *client, /*callback/default*/
183 void *buffer, /*raw_memory*/
184 void *free_buffer) /*raw_memory*/
186 /* find the insertion point for this additional mapping and then
188 sim_core_mapping *next_mapping;
189 sim_core_mapping **last_mapping;
191 SIM_ASSERT ((client == NULL) != (buffer == NULL));
192 SIM_ASSERT ((client == NULL) >= (free_buffer != NULL));
194 /* actually do occasionally get a zero size map */
198 device_error (client, "called on sim_core_map_attach with size zero");
201 sim_hw_abort (sd, client, "called on sim_core_map_attach with size zero");
203 sim_io_error (sd, "called on sim_core_map_attach with size zero");
206 /* find the insertion point (between last/next) */
207 next_mapping = access_map->first;
208 last_mapping = &access_map->first;
209 while (next_mapping != NULL
210 && (next_mapping->level < level
211 || (next_mapping->level == level
212 && next_mapping->bound < addr)))
214 /* provided levels are the same */
215 /* assert: next_mapping->base > all bases before next_mapping */
216 /* assert: next_mapping->bound >= all bounds before next_mapping */
217 last_mapping = &next_mapping->next;
218 next_mapping = next_mapping->next;
221 /* check insertion point correct */
222 SIM_ASSERT (next_mapping == NULL || next_mapping->level >= level);
223 if (next_mapping != NULL && next_mapping->level == level
224 && next_mapping->base < (addr + (nr_bytes - 1)))
227 device_error (client, "memory map %d:0x%lx..0x%lx (%ld bytes) overlaps %d:0x%lx..0x%lx (%ld bytes)",
230 (long) (addr + nr_bytes - 1),
233 (long) next_mapping->base,
234 (long) next_mapping->bound,
235 (long) next_mapping->nr_bytes);
238 sim_hw_abort (sd, client, "memory map %d:0x%lx..0x%lx (%ld bytes) overlaps %d:0x%lx..0x%lx (%ld bytes)",
241 (long) (addr + (nr_bytes - 1)),
244 (long) next_mapping->base,
245 (long) next_mapping->bound,
246 (long) next_mapping->nr_bytes);
248 sim_io_error (sd, "memory map %d:0x%lx..0x%lx (%ld bytes) overlaps %d:0x%lx..0x%lx (%ld bytes)",
251 (long) (addr + (nr_bytes - 1)),
254 (long) next_mapping->base,
255 (long) next_mapping->bound,
256 (long) next_mapping->nr_bytes);
259 /* create/insert the new mapping */
260 *last_mapping = new_sim_core_mapping (sd,
262 space, addr, nr_bytes, modulo,
263 client, buffer, free_buffer);
264 (*last_mapping)->next = next_mapping;
269 /* Attach memory or a memory mapped device to the simulator.
270 See sim-core.h for a full description. */
272 #if EXTERN_SIM_CORE_P
274 sim_core_attach (SIM_DESC sd,
280 address_word nr_bytes,
287 void *optional_buffer)
289 sim_core *memory = STATE_CORE (sd);
294 /* check for for attempt to use unimplemented per-processor core map */
296 sim_io_error (sd, "sim_core_map_attach - processor specific memory map not yet supported");
298 if (client != NULL && modulo != 0)
301 device_error (client, "sim_core_attach - internal error - modulo and callback memory conflict");
304 sim_hw_abort (sd, client, "sim_core_attach - internal error - modulo and callback memory conflict");
306 sim_io_error (sd, "sim_core_attach - internal error - modulo and callback memory conflict");
310 unsigned mask = modulo - 1;
312 while (mask >= sizeof (unsigned64)) /* minimum modulo */
319 if (mask != sizeof (unsigned64) - 1)
322 device_error (client, "sim_core_attach - internal error - modulo %lx not power of two", (long) modulo);
325 sim_hw_abort (sd, client, "sim_core_attach - internal error - modulo %lx not power of two", (long) modulo);
327 sim_io_error (sd, "sim_core_attach - internal error - modulo %lx not power of two", (long) modulo);
331 /* verify consistency between device and buffer */
332 if (client != NULL && optional_buffer != NULL)
335 device_error (client, "sim_core_attach - internal error - conflicting buffer and attach arguments");
338 sim_hw_abort (sd, client, "sim_core_attach - internal error - conflicting buffer and attach arguments");
340 sim_io_error (sd, "sim_core_attach - internal error - conflicting buffer and attach arguments");
344 if (optional_buffer == NULL)
346 int padding = (addr % sizeof (unsigned64));
347 unsigned long bytes = (modulo == 0 ? nr_bytes : modulo) + padding;
348 free_buffer = zalloc (bytes);
349 buffer = (char*) free_buffer + padding;
353 buffer = optional_buffer;
364 /* attach the region to all applicable access maps */
369 if (mapmask & (1 << map))
371 sim_core_map_attach (sd, &memory->common.map[map],
372 level, space, addr, nr_bytes, modulo,
373 client, buffer, free_buffer);
378 /* Just copy this map to each of the processor specific data structures.
379 FIXME - later this will be replaced by true processor specific
383 for (i = 0; i < MAX_NR_PROCESSORS; i++)
385 CPU_CORE (STATE_CPU (sd, i))->common = STATE_CORE (sd)->common;
392 /* Remove any memory reference related to this address */
393 #if EXTERN_SIM_CORE_P
395 sim_core_map_detach (SIM_DESC sd,
396 sim_core_map *access_map,
401 sim_core_mapping **entry;
402 for (entry = &access_map->first;
404 entry = &(*entry)->next)
406 if ((*entry)->base == addr
407 && (*entry)->level == level
408 && (*entry)->space == space)
410 sim_core_mapping *dead = (*entry);
411 (*entry) = dead->next;
412 if (dead->free_buffer != NULL)
413 free (dead->free_buffer);
421 #if EXTERN_SIM_CORE_P
423 sim_core_detach (SIM_DESC sd,
429 sim_core *memory = STATE_CORE (sd);
431 for (map = 0; map < nr_maps; map++)
433 sim_core_map_detach (sd, &memory->common.map[map],
434 level, address_space, addr);
436 /* Just copy this update to each of the processor specific data
437 structures. FIXME - later this will be replaced by true
438 processor specific maps. */
441 for (i = 0; i < MAX_NR_PROCESSORS; i++)
443 CPU_CORE (STATE_CPU (sd, i))->common = STATE_CORE (sd)->common;
450 STATIC_INLINE_SIM_CORE\
452 sim_core_find_mapping (sim_core_common *core,
456 transfer_type transfer,
457 int abort, /*either 0 or 1 - hint to inline/-O */
458 sim_cpu *cpu, /* abort => cpu != NULL */
461 sim_core_mapping *mapping = core->map[map].first;
462 ASSERT ((addr & (nr_bytes - 1)) == 0); /* must be aligned */
463 ASSERT ((addr + (nr_bytes - 1)) >= addr); /* must not wrap */
464 ASSERT (!abort || cpu != NULL); /* abort needs a non null CPU */
465 while (mapping != NULL)
467 if (addr >= mapping->base
468 && (addr + (nr_bytes - 1)) <= mapping->bound)
470 mapping = mapping->next;
474 SIM_CORE_SIGNAL (CPU_STATE (cpu), cpu, cia, map, nr_bytes, addr, transfer,
475 sim_core_unmapped_signal);
481 STATIC_INLINE_SIM_CORE\
483 sim_core_translate (sim_core_mapping *mapping,
486 return (void *)((unsigned8 *) mapping->buffer
487 + ((addr - mapping->base) & mapping->mask));
491 #if EXTERN_SIM_CORE_P
493 sim_core_read_buffer (SIM_DESC sd,
500 sim_core_common *core = (cpu == NULL ? &STATE_CORE (sd)->common : &CPU_CORE (cpu)->common);
504 address_word raddr = addr + count;
505 sim_core_mapping *mapping =
506 sim_core_find_mapping (core, map,
507 raddr, /*nr-bytes*/1,
509 0 /*dont-abort*/, NULL, NULL_CIA);
513 if (mapping->device != NULL)
515 int nr_bytes = len - count;
516 sim_cia cia = cpu ? CPU_PC_GET (cpu) : NULL_CIA;
517 if (raddr + nr_bytes - 1> mapping->bound)
518 nr_bytes = mapping->bound - raddr + 1;
519 if (device_io_read_buffer (mapping->device,
520 (unsigned_1*)buffer + count,
533 if (mapping->device != NULL)
535 int nr_bytes = len - count;
536 if (raddr + nr_bytes - 1> mapping->bound)
537 nr_bytes = mapping->bound - raddr + 1;
538 if (sim_hw_io_read_buffer (sd, mapping->device,
539 (unsigned_1*)buffer + count,
542 nr_bytes) != nr_bytes)
548 ((unsigned_1*)buffer)[count] =
549 *(unsigned_1*)sim_core_translate (mapping, raddr);
557 #if EXTERN_SIM_CORE_P
559 sim_core_write_buffer (SIM_DESC sd,
566 sim_core_common *core = (cpu == NULL ? &STATE_CORE (sd)->common : &CPU_CORE (cpu)->common);
570 address_word raddr = addr + count;
571 sim_core_mapping *mapping =
572 sim_core_find_mapping (core, map,
573 raddr, /*nr-bytes*/1,
575 0 /*dont-abort*/, NULL, NULL_CIA);
579 if (WITH_CALLBACK_MEMORY
580 && mapping->device != NULL)
582 int nr_bytes = len - count;
583 sim_cia cia = cpu ? CPU_PC_GET (cpu) : NULL_CIA;
584 if (raddr + nr_bytes - 1 > mapping->bound)
585 nr_bytes = mapping->bound - raddr + 1;
586 if (device_io_write_buffer (mapping->device,
587 (unsigned_1*)buffer + count,
600 if (WITH_CALLBACK_MEMORY
601 && mapping->device != NULL)
603 int nr_bytes = len - count;
604 if (raddr + nr_bytes - 1 > mapping->bound)
605 nr_bytes = mapping->bound - raddr + 1;
606 if (sim_hw_io_write_buffer (sd, mapping->device,
607 (unsigned_1*)buffer + count,
610 nr_bytes) != nr_bytes)
616 *(unsigned_1*)sim_core_translate (mapping, raddr) =
617 ((unsigned_1*)buffer)[count];
625 #if EXTERN_SIM_CORE_P
627 sim_core_set_xor (SIM_DESC sd,
631 /* set up the XOR map if required. */
632 if (WITH_XOR_ENDIAN) {
634 sim_core *core = STATE_CORE (sd);
635 sim_cpu_core *cpu_core = (cpu != NULL ? CPU_CORE (cpu) : NULL);
636 if (cpu_core != NULL)
641 mask = WITH_XOR_ENDIAN - 1;
644 while (i - 1 < WITH_XOR_ENDIAN)
646 cpu_core->xor[i-1] = mask;
647 mask = (mask << 1) & (WITH_XOR_ENDIAN - 1);
654 core->byte_xor = WITH_XOR_ENDIAN - 1;
662 sim_engine_abort (sd, NULL, NULL_CIA,
663 "Attempted to enable xor-endian mode when permenantly disabled.");
669 #if EXTERN_SIM_CORE_P
671 reverse_n (unsigned_1 *dest,
672 const unsigned_1 *src,
676 for (i = 0; i < nr_bytes; i++)
678 dest [nr_bytes - i - 1] = src [i];
684 #if EXTERN_SIM_CORE_P
686 sim_core_xor_read_buffer (SIM_DESC sd,
693 address_word byte_xor = (cpu == NULL ? STATE_CORE (sd)->byte_xor : CPU_CORE (cpu)->xor[0]);
694 if (!WITH_XOR_ENDIAN || !byte_xor)
695 return sim_core_read_buffer (sd, cpu, map, buffer, addr, nr_bytes);
697 /* only break up transfers when xor-endian is both selected and enabled */
699 unsigned_1 x[WITH_XOR_ENDIAN + 1]; /* +1 to avoid zero-sized array */
700 unsigned nr_transfered = 0;
701 address_word start = addr;
702 unsigned nr_this_transfer = (WITH_XOR_ENDIAN - (addr & ~(WITH_XOR_ENDIAN - 1)));
704 /* initial and intermediate transfers are broken when they cross
705 an XOR endian boundary */
706 while (nr_transfered + nr_this_transfer < nr_bytes)
707 /* initial/intermediate transfers */
709 /* since xor-endian is enabled stop^xor defines the start
710 address of the transfer */
711 stop = start + nr_this_transfer - 1;
712 SIM_ASSERT (start <= stop);
713 SIM_ASSERT ((stop ^ byte_xor) <= (start ^ byte_xor));
714 if (sim_core_read_buffer (sd, cpu, map, x, stop ^ byte_xor, nr_this_transfer)
716 return nr_transfered;
717 reverse_n (&((unsigned_1*)buffer)[nr_transfered], x, nr_this_transfer);
718 nr_transfered += nr_this_transfer;
719 nr_this_transfer = WITH_XOR_ENDIAN;
723 nr_this_transfer = nr_bytes - nr_transfered;
724 stop = start + nr_this_transfer - 1;
725 SIM_ASSERT (stop == (addr + nr_bytes - 1));
726 if (sim_core_read_buffer (sd, cpu, map, x, stop ^ byte_xor, nr_this_transfer)
728 return nr_transfered;
729 reverse_n (&((unsigned_1*)buffer)[nr_transfered], x, nr_this_transfer);
736 #if EXTERN_SIM_CORE_P
738 sim_core_xor_write_buffer (SIM_DESC sd,
745 address_word byte_xor = (cpu == NULL ? STATE_CORE (sd)->byte_xor : CPU_CORE (cpu)->xor[0]);
746 if (!WITH_XOR_ENDIAN || !byte_xor)
747 return sim_core_write_buffer (sd, cpu, map, buffer, addr, nr_bytes);
749 /* only break up transfers when xor-endian is both selected and enabled */
751 unsigned_1 x[WITH_XOR_ENDIAN + 1]; /* +1 to avoid zero sized array */
752 unsigned nr_transfered = 0;
753 address_word start = addr;
754 unsigned nr_this_transfer = (WITH_XOR_ENDIAN - (addr & ~(WITH_XOR_ENDIAN - 1)));
756 /* initial and intermediate transfers are broken when they cross
757 an XOR endian boundary */
758 while (nr_transfered + nr_this_transfer < nr_bytes)
759 /* initial/intermediate transfers */
761 /* since xor-endian is enabled stop^xor defines the start
762 address of the transfer */
763 stop = start + nr_this_transfer - 1;
764 SIM_ASSERT (start <= stop);
765 SIM_ASSERT ((stop ^ byte_xor) <= (start ^ byte_xor));
766 reverse_n (x, &((unsigned_1*)buffer)[nr_transfered], nr_this_transfer);
767 if (sim_core_read_buffer (sd, cpu, map, x, stop ^ byte_xor, nr_this_transfer)
769 return nr_transfered;
770 nr_transfered += nr_this_transfer;
771 nr_this_transfer = WITH_XOR_ENDIAN;
775 nr_this_transfer = nr_bytes - nr_transfered;
776 stop = start + nr_this_transfer - 1;
777 SIM_ASSERT (stop == (addr + nr_bytes - 1));
778 reverse_n (x, &((unsigned_1*)buffer)[nr_transfered], nr_this_transfer);
779 if (sim_core_read_buffer (sd, cpu, map, x, stop ^ byte_xor, nr_this_transfer)
781 return nr_transfered;
787 #if EXTERN_SIM_CORE_P
789 sim_core_trans_addr (SIM_DESC sd,
794 sim_core_common *core = (cpu == NULL ? &STATE_CORE (sd)->common : &CPU_CORE (cpu)->common);
795 sim_core_mapping *mapping =
796 sim_core_find_mapping (core, map,
799 0 /*dont-abort*/, NULL, NULL_CIA);
802 return sim_core_translate (mapping, addr);
808 /* define the read/write 1/2/4/8/16/word functions */
811 #include "sim-n-core.h"
814 #include "sim-n-core.h"
818 #include "sim-n-core.h"
822 #include "sim-n-core.h"
826 #include "sim-n-core.h"
829 #include "sim-n-core.h"
833 #include "sim-n-core.h"
836 #include "sim-n-core.h"
839 #include "sim-n-core.h"