2 * Copyright 1998-2003 VIA Technologies, Inc. All Rights Reserved.
3 * Copyright 2001-2003 S3 Graphics, Inc. All Rights Reserved.
5 * Permission is hereby granted, free of charge, to any person obtaining a
6 * copy of this software and associated documentation files (the "Software"),
7 * to deal in the Software without restriction, including without limitation
8 * the rights to use, copy, modify, merge, publish, distribute, sub license,
9 * and/or sell copies of the Software, and to permit persons to whom the
10 * Software is furnished to do so, subject to the following conditions:
12 * The above copyright notice and this permission notice (including the
13 * next paragraph) shall be included in all copies or substantial portions
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
19 * VIA, S3 GRAPHICS, AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
20 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
21 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
22 * DEALINGS IN THE SOFTWARE.
27 /* WARNING: These defines must be the same as what the Xserver uses.
28 * if you change them, you must change the defines in the Xserver.
34 #define VIA_DMA_BUF_ORDER 12
35 #define VIA_DMA_BUF_SZ (1 << VIA_DMA_BUF_ORDER)
36 #define VIA_DMA_BUF_NR 256
37 #define VIA_NR_SAREA_CLIPRECTS 8
38 #define VIA_NR_XVMC_PORTS 10
39 #define VIA_NR_XVMC_LOCKS 5
40 #define VIA_MAX_CACHELINE_SIZE 64
41 #define VIA_PREALLOCATED_PCI_SIZE 16384
42 #define VIA_MAX_PCI_SIZE 65536
43 #define XVMCLOCKPTR(saPriv,lockNo) \
44 ((volatile int *)(((((unsigned long) (saPriv)->XvMCLockArea) + \
45 (VIA_MAX_CACHELINE_SIZE - 1)) & \
46 ~(VIA_MAX_CACHELINE_SIZE - 1)) + \
47 VIA_MAX_CACHELINE_SIZE*(lockNo)))
49 /* Each region is a minimum of 64k, and there are at most 64 of them.
51 #define VIA_NR_TEX_REGIONS 64
52 #define VIA_LOG_MIN_TEX_REGION_SIZE 16
55 #define VIA_UPLOAD_TEX0IMAGE 0x1 /* handled clientside */
56 #define VIA_UPLOAD_TEX1IMAGE 0x2 /* handled clientside */
57 #define VIA_UPLOAD_CTX 0x4
58 #define VIA_UPLOAD_BUFFERS 0x8
59 #define VIA_UPLOAD_TEX0 0x10
60 #define VIA_UPLOAD_TEX1 0x20
61 #define VIA_UPLOAD_CLIPRECTS 0x40
62 #define VIA_UPLOAD_ALL 0xff
64 /* VIA specific ioctls */
65 #define DRM_IOCTL_VIA_ALLOCMEM DRM_IOWR(0x40, drm_via_mem_t)
66 #define DRM_IOCTL_VIA_FREEMEM DRM_IOW(0x41, drm_via_mem_t)
67 #define DRM_IOCTL_VIA_AGP_INIT DRM_IOWR(0x42, drm_via_agp_t)
68 #define DRM_IOCTL_VIA_FB_INIT DRM_IOWR(0x43, drm_via_fb_t)
69 #define DRM_IOCTL_VIA_MAP_INIT DRM_IOWR(0x44, drm_via_init_t)
70 #define DRM_IOCTL_VIA_DEC_FUTEX DRM_IOW(0x45, drm_via_futex_t)
71 #define DRM_IOCTL_VIA_DMA_INIT DRM_IOWR(0x47, drm_via_dma_init_t)
72 #define DRM_IOCTL_VIA_CMDBUFFER DRM_IOW(0x48, drm_via_cmdbuffer_t)
73 #define DRM_IOCTL_VIA_FLUSH DRM_IO(0x49)
74 #define DRM_IOCTL_VIA_PCICMD DRM_IOW(0x4A, drm_via_cmdbuffer_t)
77 /* Indices into buf.Setup where various bits of state are mirrored per
78 * context and per buffer. These can be fired at the card as a unit,
79 * or in a piecewise fashion as required.
82 #define VIA_TEX_SETUP_SIZE 8
84 /* Flags for clear ioctl
89 #define VIA_STENCIL 0x8
103 unsigned int context;
107 unsigned long offset;
110 typedef struct _drm_via_init {
113 VIA_CLEANUP_MAP = 0x02
116 unsigned long sarea_priv_offset;
117 unsigned long fb_offset;
118 unsigned long mmio_offset;
119 unsigned long agpAddr;
122 typedef struct _drm_via_futex {
124 VIA_FUTEX_WAIT = 0x00,
125 VIA_FUTEX_WAKE = 0X01
133 typedef struct _drm_via_dma_init {
136 VIA_CLEANUP_DMA = 0x02
139 unsigned long offset;
141 unsigned long reg_pause_addr;
142 } drm_via_dma_init_t;
144 typedef struct _drm_via_cmdbuffer {
147 } drm_via_cmdbuffer_t;
149 /* Warning: If you change the SAREA structure you must change the Xserver
150 * structure as well */
152 typedef struct _drm_via_tex_region {
153 unsigned char next, prev; /* indices to form a circular LRU */
154 unsigned char inUse; /* owned by a client, or free? */
155 int age; /* tracked by clients to update local LRU's */
156 } drm_via_tex_region_t;
158 typedef struct _drm_via_sarea {
161 drm_clip_rect_t boxes[VIA_NR_SAREA_CLIPRECTS];
162 drm_via_tex_region_t texList[VIA_NR_TEX_REGIONS + 1];
163 int texAge; /* last time texture was uploaded */
164 int ctxOwner; /* last context to upload state */
169 * We want the lock integers alone on, and aligned to, a cache line.
170 * Therefore this somewhat strange construct.
173 char XvMCLockArea[VIA_MAX_CACHELINE_SIZE * (VIA_NR_XVMC_LOCKS + 1)];
175 unsigned int XvMCDisplaying[VIA_NR_XVMC_PORTS];
176 unsigned int XvMCSubPicOn[VIA_NR_XVMC_PORTS];
177 unsigned int XvMCCtxNoGrabbed; /* Last context to hold decoder */
182 typedef struct _drm_via_flush_agp {
186 int discard; /* client is finished with the buffer? */
187 } drm_via_flush_agp_t;
189 typedef struct _drm_via_flush_sys {
193 int discard; /* client is finished with the buffer? */
194 } drm_via_flush_sys_t;
198 int via_fb_init( DRM_IOCTL_ARGS );
199 int via_mem_alloc( DRM_IOCTL_ARGS );
200 int via_mem_free( DRM_IOCTL_ARGS );
201 int via_agp_init( DRM_IOCTL_ARGS );
202 int via_map_init( DRM_IOCTL_ARGS );
203 int via_decoder_futex( DRM_IOCTL_ARGS );
204 int via_dma_init( DRM_IOCTL_ARGS );
205 int via_cmdbuffer( DRM_IOCTL_ARGS );
206 int via_flush_ioctl( DRM_IOCTL_ARGS );
207 int via_pci_cmdbuffer( DRM_IOCTL_ARGS );
210 #endif /* _VIA_DRM_H_ */