2 * Copyright 1998-2003 VIA Technologies, Inc. All Rights Reserved.
3 * Copyright 2001-2003 S3 Graphics, Inc. All Rights Reserved.
5 * Permission is hereby granted, free of charge, to any person obtaining a
6 * copy of this software and associated documentation files (the "Software"),
7 * to deal in the Software without restriction, including without limitation
8 * the rights to use, copy, modify, merge, publish, distribute, sub license,
9 * and/or sell copies of the Software, and to permit persons to whom the
10 * Software is furnished to do so, subject to the following conditions:
12 * The above copyright notice and this permission notice (including the
13 * next paragraph) shall be included in all copies or substantial portions
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
19 * VIA, S3 GRAPHICS, AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
20 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
21 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
22 * DEALINGS IN THE SOFTWARE.
27 /* WARNING: These defines must be the same as what the Xserver uses.
28 * if you change them, you must change the defines in the Xserver.
35 #if !defined(__KERNEL__) && !defined(_KERNEL)
36 #include "via_drmclient.h"
40 * With the arrival of libdrm there is a need to version this file.
41 * As usual, bump MINOR for new features, MAJOR for changes that create
42 * backwards incompatibilities, (which should be avoided whenever possible).
45 #define VIA_DRM_DRIVER_DATE "20060111"
47 #define VIA_DRM_DRIVER_MAJOR 2
48 #define VIA_DRM_DRIVER_MINOR 9
49 #define VIA_DRM_DRIVER_PATCHLEVEL 1
50 #define VIA_DRM_DRIVER_VERSION (((VIA_DRM_DRIVER_MAJOR) << 16) | (VIA_DRM_DRIVER_MINOR))
52 #define VIA_NR_SAREA_CLIPRECTS 8
53 #define VIA_NR_XVMC_PORTS 10
54 #define VIA_NR_XVMC_LOCKS 5
55 #define VIA_MAX_CACHELINE_SIZE 64
56 #define XVMCLOCKPTR(saPriv,lockNo) \
57 ((volatile drm_hw_lock_t *)(((((unsigned long) (saPriv)->XvMCLockArea) + \
58 (VIA_MAX_CACHELINE_SIZE - 1)) & \
59 ~(VIA_MAX_CACHELINE_SIZE - 1)) + \
60 VIA_MAX_CACHELINE_SIZE*(lockNo)))
62 /* Each region is a minimum of 64k, and there are at most 64 of them.
64 #define VIA_NR_TEX_REGIONS 64
65 #define VIA_LOG_MIN_TEX_REGION_SIZE 16
68 #define VIA_UPLOAD_TEX0IMAGE 0x1 /* handled clientside */
69 #define VIA_UPLOAD_TEX1IMAGE 0x2 /* handled clientside */
70 #define VIA_UPLOAD_CTX 0x4
71 #define VIA_UPLOAD_BUFFERS 0x8
72 #define VIA_UPLOAD_TEX0 0x10
73 #define VIA_UPLOAD_TEX1 0x20
74 #define VIA_UPLOAD_CLIPRECTS 0x40
75 #define VIA_UPLOAD_ALL 0xff
77 /* VIA specific ioctls */
78 #define DRM_VIA_ALLOCMEM 0x00
79 #define DRM_VIA_FREEMEM 0x01
80 #define DRM_VIA_AGP_INIT 0x02
81 #define DRM_VIA_FB_INIT 0x03
82 #define DRM_VIA_MAP_INIT 0x04
83 #define DRM_VIA_DEC_FUTEX 0x05
85 #define DRM_VIA_DMA_INIT 0x07
86 #define DRM_VIA_CMDBUFFER 0x08
87 #define DRM_VIA_FLUSH 0x09
88 #define DRM_VIA_PCICMD 0x0a
89 #define DRM_VIA_CMDBUF_SIZE 0x0b
91 #define DRM_VIA_WAIT_IRQ 0x0d
92 #define DRM_VIA_DMA_BLIT 0x0e
93 #define DRM_VIA_BLIT_SYNC 0x0f
95 #define DRM_IOCTL_VIA_ALLOCMEM DRM_IOWR(DRM_COMMAND_BASE + DRM_VIA_ALLOCMEM, drm_via_mem_t)
96 #define DRM_IOCTL_VIA_FREEMEM DRM_IOW( DRM_COMMAND_BASE + DRM_VIA_FREEMEM, drm_via_mem_t)
97 #define DRM_IOCTL_VIA_AGP_INIT DRM_IOWR(DRM_COMMAND_BASE + DRM_VIA_AGP_INIT, drm_via_agp_t)
98 #define DRM_IOCTL_VIA_FB_INIT DRM_IOWR(DRM_COMMAND_BASE + DRM_VIA_FB_INIT, drm_via_fb_t)
99 #define DRM_IOCTL_VIA_MAP_INIT DRM_IOWR(DRM_COMMAND_BASE + DRM_VIA_MAP_INIT, drm_via_init_t)
100 #define DRM_IOCTL_VIA_DEC_FUTEX DRM_IOW( DRM_COMMAND_BASE + DRM_VIA_DEC_FUTEX, drm_via_futex_t)
101 #define DRM_IOCTL_VIA_DMA_INIT DRM_IOWR(DRM_COMMAND_BASE + DRM_VIA_DMA_INIT, drm_via_dma_init_t)
102 #define DRM_IOCTL_VIA_CMDBUFFER DRM_IOW( DRM_COMMAND_BASE + DRM_VIA_CMDBUFFER, drm_via_cmdbuffer_t)
103 #define DRM_IOCTL_VIA_FLUSH DRM_IO( DRM_COMMAND_BASE + DRM_VIA_FLUSH)
104 #define DRM_IOCTL_VIA_PCICMD DRM_IOW( DRM_COMMAND_BASE + DRM_VIA_PCICMD, drm_via_cmdbuffer_t)
105 #define DRM_IOCTL_VIA_CMDBUF_SIZE DRM_IOWR( DRM_COMMAND_BASE + DRM_VIA_CMDBUF_SIZE, \
106 drm_via_cmdbuf_size_t)
107 #define DRM_IOCTL_VIA_WAIT_IRQ DRM_IOWR( DRM_COMMAND_BASE + DRM_VIA_WAIT_IRQ, drm_via_irqwait_t)
108 #define DRM_IOCTL_VIA_DMA_BLIT DRM_IOW(DRM_COMMAND_BASE + DRM_VIA_DMA_BLIT, drm_via_dmablit_t)
109 #define DRM_IOCTL_VIA_BLIT_SYNC DRM_IOW(DRM_COMMAND_BASE + DRM_VIA_BLIT_SYNC, drm_via_blitsync_t)
111 /* Indices into buf.Setup where various bits of state are mirrored per
112 * context and per buffer. These can be fired at the card as a unit,
113 * or in a piecewise fashion as required.
116 #define VIA_TEX_SETUP_SIZE 8
118 /* Flags for clear ioctl
120 #define VIA_FRONT 0x1
122 #define VIA_DEPTH 0x4
123 #define VIA_STENCIL 0x8
125 #define VIA_MEM_VIDEO 0 /* matches drm constant */
126 #define VIA_MEM_AGP 1 /* matches drm constant */
127 #define VIA_MEM_SYSTEM 2
128 #define VIA_MEM_MIXED 3
129 #define VIA_MEM_UNKNOWN 4
146 unsigned long offset;
149 typedef struct _drm_via_init {
152 VIA_CLEANUP_MAP = 0x02
155 unsigned long sarea_priv_offset;
156 unsigned long fb_offset;
157 unsigned long mmio_offset;
158 unsigned long agpAddr;
161 typedef struct _drm_via_futex {
163 VIA_FUTEX_WAIT = 0x00,
164 VIA_FUTEX_WAKE = 0X01
171 typedef struct _drm_via_dma_init {
174 VIA_CLEANUP_DMA = 0x02,
175 VIA_DMA_INITIALIZED = 0x03
178 unsigned long offset;
180 unsigned long reg_pause_addr;
181 } drm_via_dma_init_t;
183 typedef struct _drm_via_cmdbuffer {
186 } drm_via_cmdbuffer_t;
188 /* Warning: If you change the SAREA structure you must change the Xserver
189 * structure as well */
191 typedef struct _drm_via_tex_region {
192 unsigned char next, prev; /* indices to form a circular LRU */
193 unsigned char inUse; /* owned by a client, or free? */
194 int age; /* tracked by clients to update local LRU's */
195 } drm_via_tex_region_t;
197 typedef struct _drm_via_sarea {
200 drm_clip_rect_t boxes[VIA_NR_SAREA_CLIPRECTS];
201 drm_via_tex_region_t texList[VIA_NR_TEX_REGIONS + 1];
202 int texAge; /* last time texture was uploaded */
203 int ctxOwner; /* last context to upload state */
208 * We want the lock integers alone on, and aligned to, a cache line.
209 * Therefore this somewhat strange construct.
212 char XvMCLockArea[VIA_MAX_CACHELINE_SIZE * (VIA_NR_XVMC_LOCKS + 1)];
214 unsigned int XvMCDisplaying[VIA_NR_XVMC_PORTS];
215 unsigned int XvMCSubPicOn[VIA_NR_XVMC_PORTS];
216 unsigned int XvMCCtxNoGrabbed; /* Last context to hold decoder */
218 /* Used by the 3d driver only at this point, for pageflipping:
220 unsigned int pfCurrentOffset;
223 typedef struct _drm_via_cmdbuf_size {
225 VIA_CMDBUF_SPACE = 0x01,
226 VIA_CMDBUF_LAG = 0x02
230 } drm_via_cmdbuf_size_t;
233 VIA_IRQ_ABSOLUTE = 0x0,
234 VIA_IRQ_RELATIVE = 0x1,
235 VIA_IRQ_SIGNAL = 0x10000000,
236 VIA_IRQ_FORCE_SEQUENCE = 0x20000000
237 } via_irq_seq_type_t;
239 #define VIA_IRQ_FLAGS_MASK 0xF0000000
242 drm_via_irq_hqv0 = 0,
251 struct drm_via_wait_irq_request{
253 via_irq_seq_type_t type;
258 typedef union drm_via_irqwait {
259 struct drm_via_wait_irq_request request;
260 struct drm_wait_vblank_reply reply;
263 typedef struct drm_via_blitsync {
264 uint32_t sync_handle;
266 } drm_via_blitsync_t;
269 * Below,"flags" is currently unused but will be used for possible future
270 * extensions like kernel space bounce buffers for bad alignments and
271 * blit engine busy-wait polling for better latency in the absence of
275 typedef struct drm_via_dmablit {
277 uint32_t line_length;
282 unsigned char *mem_addr;
288 drm_via_blitsync_t sync;
292 #endif /* _VIA_DRM_H_ */