2 * Copyright 2007 Jérôme Glisse
3 * Copyright 2007 Alex Deucher
4 * Copyright 2007 Dave Airlie
7 * Permission is hereby granted, free of charge, to any person obtaining a
8 * copy of this software and associated documentation files (the "Software"),
9 * to deal in the Software without restriction, including without limitation
10 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
11 * and/or sell copies of the Software, and to permit persons to whom the
12 * Software is furnished to do so, subject to the following conditions:
14 * The above copyright notice and this permission notice (including the next
15 * paragraph) shall be included in all copies or substantial portions of the
18 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
19 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
20 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
21 * PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
22 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
23 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
24 * DEALINGS IN THE SOFTWARE.
28 * Jerome Glisse <glisse@freedesktop.org>
30 #include "drm_pciids.h"
31 #include "radeon_ms.h"
32 #include "amd_legacy_fence.h"
35 static uint32_t radeon_ms_mem_prios[] = {
41 static uint32_t radeon_ms_busy_prios[] = {
47 struct drm_bo_driver radeon_ms_bo_driver = {
48 .mem_type_prio = radeon_ms_mem_prios,
49 .mem_busy_prio = radeon_ms_busy_prios,
50 .num_mem_type_prio = sizeof(radeon_ms_mem_prios)/sizeof(uint32_t),
51 .num_mem_busy_prio = sizeof(radeon_ms_busy_prios)/sizeof(uint32_t),
52 .create_ttm_backend_entry = radeon_ms_create_ttm_backend,
53 .fence_type = r3xx_fence_types,
54 .invalidate_caches = radeon_ms_invalidate_caches,
55 .init_mem_type = radeon_ms_init_mem_type,
56 .evict_flags = radeon_ms_evict_flags,
57 .move = radeon_ms_bo_move,
58 .ttm_cache_flush = radeon_ms_ttm_flush,
61 struct drm_ioctl_desc radeon_ms_ioctls[] = {
62 DRM_IOCTL_DEF(DRM_RADEON_EXECBUFFER, radeon_ms_execbuffer, DRM_AUTH),
64 int radeon_ms_num_ioctls = DRM_ARRAY_SIZE(radeon_ms_ioctls);
66 int radeon_ms_driver_dma_ioctl(struct drm_device *dev, void *data,
67 struct drm_file *file_priv)
69 struct drm_device_dma *dma = dev->dma;
70 struct drm_dma *d = data;
72 LOCK_TEST_WITH_RETURN(dev, file_priv);
74 /* Please don't send us buffers.
76 if (d->send_count != 0) {
77 DRM_ERROR("Process %d trying to send %d buffers via drmDMA\n",
78 DRM_CURRENTPID, d->send_count);
82 /* Don't ask us buffer neither :)
84 DRM_ERROR("Process %d trying to get %d buffers (of %d max)\n",
85 DRM_CURRENTPID, d->request_count, dma->buf_count);
89 void radeon_ms_driver_lastclose(struct drm_device * dev)
93 int radeon_ms_driver_load(struct drm_device *dev, unsigned long flags)
95 struct drm_radeon_private *dev_priv;
98 DRM_INFO("[radeon_ms] loading\n");
99 /* allocate and clear device private structure */
100 dev_priv = drm_alloc(sizeof(struct drm_radeon_private), DRM_MEM_DRIVER);
101 if (dev_priv == NULL)
103 memset(dev_priv, 0, sizeof(struct drm_radeon_private));
104 dev->dev_private = (void *)dev_priv;
106 /* initialize modesetting structure (must be done here) */
107 drm_mode_config_init(dev);
109 /* flags correspond to chipset family */
110 dev_priv->usec_timeout = 100;
111 dev_priv->family = flags & 0xffffU;
112 dev_priv->bus_type = flags & 0xff0000U;
113 /* initialize family functions */
114 ret = radeon_ms_family_init(dev);
116 radeon_ms_driver_unload(dev);
120 dev_priv->fence = drm_alloc(sizeof(struct legacy_fence), DRM_MEM_DRIVER);
121 if (dev_priv->fence == NULL) {
122 radeon_ms_driver_unload(dev);
125 memset(dev_priv->fence, 0, sizeof(struct legacy_fence));
127 /* we don't want userspace to be able to map this so don't use
129 dev_priv->mmio.offset = drm_get_resource_start(dev, 2);
130 dev_priv->mmio.size = drm_get_resource_len(dev, 2);
131 dev_priv->mmio.type = _DRM_REGISTERS;
132 dev_priv->mmio.flags = _DRM_RESTRICTED;
133 drm_core_ioremap(&dev_priv->mmio, dev);
134 /* map vram FIXME: IGP likely don't have any of this */
135 dev_priv->vram.offset = drm_get_resource_start(dev, 0);
136 dev_priv->vram.size = drm_get_resource_len(dev, 0);
137 dev_priv->vram.type = _DRM_FRAME_BUFFER;
138 dev_priv->vram.flags = _DRM_RESTRICTED;
139 drm_core_ioremap(&dev_priv->vram, dev);
141 /* save radeon initial state which will be restored upon module
143 radeon_ms_state_save(dev, &dev_priv->load_state);
144 dev_priv->restore_state = 1;
145 memcpy(&dev_priv->driver_state, &dev_priv->load_state,
146 sizeof(struct radeon_state));
149 ret = radeon_ms_irq_init(dev);
151 radeon_ms_driver_unload(dev);
156 dev_priv->fence_id_last = 1;
157 dev_priv->fence_reg = SCRATCH_REG2;
158 drm_bo_driver_init(dev);
159 /* initialize vram */
160 ret = drm_bo_init_mm(dev, DRM_BO_MEM_VRAM, 0, dev_priv->vram.size, 1);
162 radeon_ms_driver_unload(dev);
166 /* initialize gpu address space (only after) VRAM initialization */
167 ret = radeon_ms_gpu_initialize(dev);
169 radeon_ms_driver_unload(dev);
172 radeon_ms_gpu_restore(dev, &dev_priv->driver_state);
175 ret = drm_bo_init_mm(dev, DRM_BO_MEM_TT, 0,
176 dev_priv->gpu_gart_size / RADEON_PAGE_SIZE, 1);
178 radeon_ms_driver_unload(dev);
182 /* initialize ring buffer */
183 /* set ring size to 4Mo FIXME: should make a parameter for this */
184 dev_priv->write_back_area_size = 4 * 1024;
185 dev_priv->ring_buffer_size = 4 * 1024 * 1024;
186 ret = radeon_ms_cp_init(dev);
188 radeon_ms_driver_unload(dev);
192 /* initialize modesetting */
193 dev->mode_config.min_width = 0;
194 dev->mode_config.min_height = 0;
195 dev->mode_config.max_width = 4096;
196 dev->mode_config.max_height = 4096;
197 dev->mode_config.fb_base = dev_priv->vram.offset;
198 ret = radeon_ms_crtc_create(dev, 1);
200 radeon_ms_driver_unload(dev);
203 ret = radeon_ms_outputs_from_rom(dev);
205 radeon_ms_driver_unload(dev);
208 ret = radeon_ms_outputs_from_properties(dev);
210 radeon_ms_driver_unload(dev);
212 } else if (ret == 0) {
213 DRM_INFO("[radeon_ms] no outputs !\n");
216 DRM_INFO("[radeon_ms] added %d outputs from rom.\n", ret);
218 ret = radeon_ms_connectors_from_rom(dev);
220 radeon_ms_driver_unload(dev);
223 ret = radeon_ms_connectors_from_properties(dev);
225 radeon_ms_driver_unload(dev);
228 DRM_INFO("[radeon_ms] no connectors !\n");
231 DRM_INFO("[radeon_ms] added %d connectors from rom.\n", ret);
233 radeon_ms_outputs_save(dev, &dev_priv->load_state);
234 drm_initial_config(dev, false);
236 ret = drm_irq_install(dev);
238 radeon_ms_driver_unload(dev);
242 DRM_INFO("[radeon_ms] successfull initialization\n");
246 int radeon_ms_driver_open(struct drm_device * dev, struct drm_file *file_priv)
252 int radeon_ms_driver_unload(struct drm_device *dev)
254 struct drm_radeon_private *dev_priv = dev->dev_private;
256 if (dev_priv == NULL) {
260 /* cleanup modesetting */
261 drm_mode_config_cleanup(dev);
262 DRM_INFO("[radeon_ms] modesetting clean\n");
263 radeon_ms_outputs_restore(dev, &dev_priv->load_state);
264 radeon_ms_connectors_destroy(dev);
265 radeon_ms_outputs_destroy(dev);
267 /* shutdown cp engine */
268 radeon_ms_cp_finish(dev);
269 DRM_INFO("[radeon_ms] cp clean\n");
271 drm_irq_uninstall(dev);
272 DRM_INFO("[radeon_ms] irq uninstalled\n");
274 DRM_INFO("[radeon_ms] unloading\n");
275 /* clean ttm memory manager */
276 mutex_lock(&dev->struct_mutex);
277 if (drm_bo_clean_mm(dev, DRM_BO_MEM_TT, 1)) {
278 DRM_ERROR("TT memory manager not clean. Delaying takedown\n");
280 mutex_unlock(&dev->struct_mutex);
281 DRM_INFO("[radeon_ms] TT memory clean\n");
283 if (dev_priv->bus_finish) {
284 dev_priv->bus_finish(dev);
286 DRM_INFO("[radeon_ms] bus down\n");
287 /* clean vram memory manager */
288 mutex_lock(&dev->struct_mutex);
289 if (drm_bo_clean_mm(dev, DRM_BO_MEM_VRAM, 1)) {
290 DRM_ERROR("VRAM memory manager not clean. Delaying takedown\n");
292 mutex_unlock(&dev->struct_mutex);
293 DRM_INFO("[radeon_ms] VRAM memory clean\n");
294 /* clean memory manager */
295 drm_bo_driver_finish(dev);
296 DRM_INFO("[radeon_ms] memory manager clean\n");
297 /* restore card state */
298 if (dev_priv->restore_state) {
299 radeon_ms_state_restore(dev, &dev_priv->load_state);
301 DRM_INFO("[radeon_ms] state restored\n");
302 if (dev_priv->mmio.handle) {
303 drm_core_ioremapfree(&dev_priv->mmio, dev);
305 if (dev_priv->vram.handle) {
306 drm_core_ioremapfree(&dev_priv->vram, dev);
308 DRM_INFO("[radeon_ms] map released\n");
309 drm_free(dev_priv->fence, sizeof(struct legacy_fence), DRM_MEM_DRIVER);
310 drm_free(dev_priv, sizeof(*dev_priv), DRM_MEM_DRIVER);
311 dev->dev_private = NULL;
314 DRM_INFO("[radeon_ms] that's all the folks\n");