shared-core/nouveau_mem.c

   1 /*
   2  * Copyright (C) The Weather Channel, Inc.  2002.  All Rights Reserved.
   3  * Copyright 2005 Stephane Marchesin
   4  *
   5  * The Weather Channel (TM) funded Tungsten Graphics to develop the
   6  * initial release of the Radeon 8500 driver under the XFree86 license.
   7  * This notice must be preserved.
   8  *
   9  * Permission is hereby granted, free of charge, to any person obtaining a
  10  * copy of this software and associated documentation files (the "Software"),
  11  * to deal in the Software without restriction, including without limitation
  12  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
  13  * and/or sell copies of the Software, and to permit persons to whom the
  14  * Software is furnished to do so, subject to the following conditions:
  15  *
  16  * The above copyright notice and this permission notice (including the next
  17  * paragraph) shall be included in all copies or substantial portions of the
  18  * Software.
  19  *
  20  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  21  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  22  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  23  * THE AUTHORS AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
  24  * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
  25  * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
  26  * DEALINGS IN THE SOFTWARE.
  27  *
  28  * Authors:
  29  *    Keith Whitwell <keith@tungstengraphics.com>
  30  */
  31
  32
  33 #include "drmP.h"
  34 #include "drm.h"
  35 #include "drm_sarea.h"
  36 #include "nouveau_drv.h"
  37
  38 static struct mem_block *
  39 split_block(struct mem_block *p, uint64_t start, uint64_t size,
  40             struct drm_file *file_priv)
  41 {
  42         /* Maybe cut off the start of an existing block */
  43         if (start > p->start) {
  44                 struct mem_block *newblock =
  45                         drm_alloc(sizeof(*newblock), DRM_MEM_BUFS);
  46                 if (!newblock)
  47                         goto out;
  48                 newblock->start = start;
  49                 newblock->size = p->size - (start - p->start);
  50                 newblock->file_priv = NULL;
  51                 newblock->next = p->next;
  52                 newblock->prev = p;
  53                 p->next->prev = newblock;
  54                 p->next = newblock;
  55                 p->size -= newblock->size;
  56                 p = newblock;
  57         }
  58
  59         /* Maybe cut off the end of an existing block */
  60         if (size < p->size) {
  61                 struct mem_block *newblock =
  62                         drm_alloc(sizeof(*newblock), DRM_MEM_BUFS);
  63                 if (!newblock)
  64                         goto out;
  65                 newblock->start = start + size;
  66                 newblock->size = p->size - size;
  67                 newblock->file_priv = NULL;
  68                 newblock->next = p->next;
  69                 newblock->prev = p;
  70                 p->next->prev = newblock;
  71                 p->next = newblock;
  72                 p->size = size;
  73         }
  74
  75 out:
  76         /* Our block is in the middle */
  77         p->file_priv = file_priv;
  78         return p;
  79 }
  80
  81 struct mem_block *
  82 nouveau_mem_alloc_block(struct mem_block *heap, uint64_t size,
  83                         int align2, struct drm_file *file_priv, int tail)
  84 {
  85         struct mem_block *p;
  86         uint64_t mask = (1 << align2) - 1;
  87
  88         if (!heap)
  89                 return NULL;
  90
  91         if (tail) {
  92                 list_for_each_prev(p, heap) {
  93                         uint64_t start = ((p->start + p->size) - size) & ~mask;
  94
  95                         if (p->file_priv == 0 && start >= p->start &&
  96                             start + size <= p->start + p->size)
  97                                 return split_block(p, start, size, file_priv);
  98                 }
  99         } else {
 100                 list_for_each(p, heap) {
 101                         uint64_t start = (p->start + mask) & ~mask;
 102
 103                         if (p->file_priv == 0 &&
 104                             start + size <= p->start + p->size)
 105                                 return split_block(p, start, size, file_priv);
 106                 }
 107         }
 108
 109         return NULL;
 110 }
 111
 112 static struct mem_block *find_block(struct mem_block *heap, uint64_t start)
 113 {
 114         struct mem_block *p;
 115
 116         list_for_each(p, heap)
 117                 if (p->start == start)
 118                         return p;
 119
 120         return NULL;
 121 }
 122
 123 void nouveau_mem_free_block(struct mem_block *p)
 124 {
 125         p->file_priv = NULL;
 126
 127         /* Assumes a single contiguous range.  Needs a special file_priv in
 128          * 'heap' to stop it being subsumed.
 129          */
 130         if (p->next->file_priv == 0) {
 131                 struct mem_block *q = p->next;
 132                 p->size += q->size;
 133                 p->next = q->next;
 134                 p->next->prev = p;
 135                 drm_free(q, sizeof(*q), DRM_MEM_BUFS);
 136         }
 137
 138         if (p->prev->file_priv == 0) {
 139                 struct mem_block *q = p->prev;
 140                 q->size += p->size;
 141                 q->next = p->next;
 142                 q->next->prev = q;
 143                 drm_free(p, sizeof(*q), DRM_MEM_BUFS);
 144         }
 145 }
 146
 147 /* Initialize.  How to check for an uninitialized heap?
 148  */
 149 int nouveau_mem_init_heap(struct mem_block **heap, uint64_t start,
 150                           uint64_t size)
 151 {
 152         struct mem_block *blocks = drm_alloc(sizeof(*blocks), DRM_MEM_BUFS);
 153
 154         if (!blocks)
 155                 return -ENOMEM;
 156
 157         *heap = drm_alloc(sizeof(**heap), DRM_MEM_BUFS);
 158         if (!*heap) {
 159                 drm_free(blocks, sizeof(*blocks), DRM_MEM_BUFS);
 160                 return -ENOMEM;
 161         }
 162
 163         blocks->start = start;
 164         blocks->size = size;
 165         blocks->file_priv = NULL;
 166         blocks->next = blocks->prev = *heap;
 167
 168         memset(*heap, 0, sizeof(**heap));
 169         (*heap)->file_priv = (struct drm_file *) - 1;
 170         (*heap)->next = (*heap)->prev = blocks;
 171         return 0;
 172 }
 173
 174 /*
 175  * Free all blocks associated with the releasing file_priv
 176  */
 177 void nouveau_mem_release(struct drm_file *file_priv, struct mem_block *heap)
 178 {
 179         struct mem_block *p;
 180
 181         if (!heap || !heap->next)
 182                 return;
 183
 184         list_for_each(p, heap) {
 185                 if (p->file_priv == file_priv)
 186                         p->file_priv = NULL;
 187         }
 188
 189         /* Assumes a single contiguous range.  Needs a special file_priv in
 190          * 'heap' to stop it being subsumed.
 191          */
 192         list_for_each(p, heap) {
 193                 while ((p->file_priv == 0) && (p->next->file_priv == 0) &&
 194                        (p->next!=heap)) {
 195                         struct mem_block *q = p->next;
 196                         p->size += q->size;
 197                         p->next = q->next;
 198                         p->next->prev = p;
 199                         drm_free(q, sizeof(*q), DRM_MEM_DRIVER);
 200                 }
 201         }
 202 }
 203
 204 /*
 205  * Cleanup everything
 206  */
 207 void nouveau_mem_takedown(struct mem_block **heap)
 208 {
 209         struct mem_block *p;
 210
 211         if (!*heap)
 212                 return;
 213
 214         for (p = (*heap)->next; p != *heap;) {
 215                 struct mem_block *q = p;
 216                 p = p->next;
 217                 drm_free(q, sizeof(*q), DRM_MEM_DRIVER);
 218         }
 219
 220         drm_free(*heap, sizeof(**heap), DRM_MEM_DRIVER);
 221         *heap = NULL;
 222 }
 223
 224 void nouveau_mem_close(struct drm_device *dev)
 225 {
 226         struct drm_nouveau_private *dev_priv = dev->dev_private;
 227
 228         nouveau_mem_takedown(&dev_priv->agp_heap);
 229         nouveau_mem_takedown(&dev_priv->fb_heap);
 230         if (dev_priv->pci_heap)
 231                 nouveau_mem_takedown(&dev_priv->pci_heap);
 232 }
 233
 234 /*XXX won't work on BSD because of pci_read_config_dword */
 235 static uint32_t
 236 nouveau_mem_fb_amount_igp(struct drm_device *dev)
 237 {
 238 #if defined(__linux__) && (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,19))
 239         struct drm_nouveau_private *dev_priv = dev->dev_private;
 240         struct pci_dev *bridge;
 241         uint32_t mem;
 242
 243         bridge = pci_get_bus_and_slot(0, PCI_DEVFN(0,1));
 244         if (!bridge) {
 245                 DRM_ERROR("no bridge device\n");
 246                 return 0;
 247         }
 248
 249         if (dev_priv->flags&NV_NFORCE) {
 250                 pci_read_config_dword(bridge, 0x7C, &mem);
 251                 return (uint64_t)(((mem >> 6) & 31) + 1)*1024*1024;
 252         } else
 253         if(dev_priv->flags&NV_NFORCE2) {
 254                 pci_read_config_dword(bridge, 0x84, &mem);
 255                 return (uint64_t)(((mem >> 4) & 127) + 1)*1024*1024;
 256         }
 257
 258         DRM_ERROR("impossible!\n");
 259 #else
 260         DRM_ERROR("Linux kernel >= 2.6.19 required to check for igp memory amount\n");
 261 #endif
 262
 263         return 0;
 264 }
 265
 266 /* returns the amount of FB ram in bytes */
 267 uint64_t nouveau_mem_fb_amount(struct drm_device *dev)
 268 {
 269         struct drm_nouveau_private *dev_priv=dev->dev_private;
 270         switch(dev_priv->card_type)
 271         {
 272                 case NV_04:
 273                 case NV_05:
 274                         if (NV_READ(NV03_BOOT_0) & 0x00000100) {
 275                                 return (((NV_READ(NV03_BOOT_0) >> 12) & 0xf)*2+2)*1024*1024;
 276                         } else
 277                         switch(NV_READ(NV03_BOOT_0)&NV03_BOOT_0_RAM_AMOUNT)
 278                         {
 279                                 case NV04_BOOT_0_RAM_AMOUNT_32MB:
 280                                         return 32*1024*1024;
 281                                 case NV04_BOOT_0_RAM_AMOUNT_16MB:
 282                                         return 16*1024*1024;
 283                                 case NV04_BOOT_0_RAM_AMOUNT_8MB:
 284                                         return 8*1024*1024;
 285                                 case NV04_BOOT_0_RAM_AMOUNT_4MB:
 286                                         return 4*1024*1024;
 287                         }
 288                         break;
 289                 case NV_10:
 290                 case NV_11:
 291                 case NV_17:
 292                 case NV_20:
 293                 case NV_30:
 294                 case NV_40:
 295                 case NV_44:
 296                 case NV_50:
 297                 default:
 298                         if (dev_priv->flags & (NV_NFORCE | NV_NFORCE2)) {
 299                                 return nouveau_mem_fb_amount_igp(dev);
 300                         } else {
 301                                 uint64_t mem;
 302
 303                                 mem = (NV_READ(NV04_FIFO_DATA) &
 304                                        NV10_FIFO_DATA_RAM_AMOUNT_MB_MASK) >>
 305                                       NV10_FIFO_DATA_RAM_AMOUNT_MB_SHIFT;
 306                                 return mem*1024*1024;
 307                         }
 308                         break;
 309         }
 310
 311         DRM_ERROR("Unable to detect video ram size. Please report your setup to " DRIVER_EMAIL "\n");
 312         return 0;
 313 }
 314
 315 static void nouveau_mem_reset_agp(struct drm_device *dev)
 316 {
 317         struct drm_nouveau_private *dev_priv = dev->dev_private;
 318         uint32_t saved_pci_nv_1, saved_pci_nv_19, pmc_enable;
 319
 320         saved_pci_nv_1 = NV_READ(NV04_PBUS_PCI_NV_1);
 321         saved_pci_nv_19 = NV_READ(NV04_PBUS_PCI_NV_19);
 322
 323         /* clear busmaster bit */
 324         NV_WRITE(NV04_PBUS_PCI_NV_1, saved_pci_nv_1 & ~0x4);
 325         /* clear SBA and AGP bits */
 326         NV_WRITE(NV04_PBUS_PCI_NV_19, saved_pci_nv_19 & 0xfffff0ff);
 327
 328         /* power cycle pgraph, if enabled */
 329         pmc_enable = NV_READ(NV03_PMC_ENABLE);
 330         if (pmc_enable & NV_PMC_ENABLE_PGRAPH) {
 331                 NV_WRITE(NV03_PMC_ENABLE, pmc_enable & ~NV_PMC_ENABLE_PGRAPH);
 332                 NV_WRITE(NV03_PMC_ENABLE, NV_READ(NV03_PMC_ENABLE) |
 333                                 NV_PMC_ENABLE_PGRAPH);
 334         }
 335
 336         /* and restore (gives effect of resetting AGP) */
 337         NV_WRITE(NV04_PBUS_PCI_NV_19, saved_pci_nv_19);
 338         NV_WRITE(NV04_PBUS_PCI_NV_1, saved_pci_nv_1);
 339 }
 340
 341 static int
 342 nouveau_mem_init_agp(struct drm_device *dev, int ttm)
 343 {
 344         struct drm_nouveau_private *dev_priv = dev->dev_private;
 345         struct drm_agp_info info;
 346         struct drm_agp_mode mode;
 347         int ret;
 348
 349         nouveau_mem_reset_agp(dev);
 350
 351         ret = drm_agp_acquire(dev);
 352         if (ret) {
 353                 DRM_ERROR("Unable to acquire AGP: %d\n", ret);
 354                 return ret;
 355         }
 356
 357         ret = drm_agp_info(dev, &info);
 358         if (ret) {
 359                 DRM_ERROR("Unable to get AGP info: %d\n", ret);
 360                 return ret;
 361         }
 362
 363         /* see agp.h for the AGPSTAT_* modes available */
 364         mode.mode = info.mode;
 365         ret = drm_agp_enable(dev, mode);
 366         if (ret) {
 367                 DRM_ERROR("Unable to enable AGP: %d\n", ret);
 368                 return ret;
 369         }
 370
 371         if (!ttm) {
 372                 struct drm_agp_buffer agp_req;
 373                 struct drm_agp_binding bind_req;
 374
 375                 agp_req.size = info.aperture_size;
 376                 agp_req.type = 0;
 377                 ret = drm_agp_alloc(dev, &agp_req);
 378                 if (ret) {
 379                         DRM_ERROR("Unable to alloc AGP: %d\n", ret);
 380                                 return ret;
 381                 }
 382
 383                 bind_req.handle = agp_req.handle;
 384                 bind_req.offset = 0;
 385                 ret = drm_agp_bind(dev, &bind_req);
 386                 if (ret) {
 387                         DRM_ERROR("Unable to bind AGP: %d\n", ret);
 388                         return ret;
 389                 }
 390         }
 391
 392         dev_priv->gart_info.type        = NOUVEAU_GART_AGP;
 393         dev_priv->gart_info.aper_base   = info.aperture_base;
 394         dev_priv->gart_info.aper_size   = info.aperture_size;
 395         return 0;
 396 }
 397
 398 #define HACK_OLD_MM
 399 int
 400 nouveau_mem_init_ttm(struct drm_device *dev)
 401 {
 402         struct drm_nouveau_private *dev_priv = dev->dev_private;
 403         uint32_t vram_size, bar1_size;
 404         int ret;
 405
 406         dev_priv->agp_heap = dev_priv->pci_heap = dev_priv->fb_heap = NULL;
 407         dev_priv->fb_phys = drm_get_resource_start(dev,1);
 408         dev_priv->gart_info.type = NOUVEAU_GART_NONE;
 409
 410         drm_bo_driver_init(dev);
 411
 412         /* non-mappable vram */
 413         dev_priv->fb_available_size = nouveau_mem_fb_amount(dev);
 414         dev_priv->fb_available_size -= dev_priv->ramin_rsvd_vram;
 415         vram_size = dev_priv->fb_available_size >> PAGE_SHIFT;
 416         bar1_size = drm_get_resource_len(dev, 1) >> PAGE_SHIFT;
 417         if (bar1_size < vram_size) {
 418                 if ((ret = drm_bo_init_mm(dev, DRM_BO_MEM_PRIV0,
 419                                           bar1_size, vram_size - bar1_size, 1))) {
 420                         DRM_ERROR("Failed PRIV0 mm init: %d\n", ret);
 421                         return ret;
 422                 }
 423                 vram_size = bar1_size;
 424         }
 425
 426         /* mappable vram */
 427 #ifdef HACK_OLD_MM
 428         vram_size /= 4;
 429 #endif
 430         if ((ret = drm_bo_init_mm(dev, DRM_BO_MEM_VRAM, 0, vram_size, 1))) {
 431                 DRM_ERROR("Failed VRAM mm init: %d\n", ret);
 432                 return ret;
 433         }
 434
 435         /* GART */
 436 #if !defined(__powerpc__) && !defined(__ia64__)
 437         if (drm_device_is_agp(dev) && dev->agp) {
 438                 if ((ret = nouveau_mem_init_agp(dev, 1)))
 439                         DRM_ERROR("Error initialising AGP: %d\n", ret);
 440         }
 441 #endif
 442
 443         if (dev_priv->gart_info.type == NOUVEAU_GART_NONE) {
 444                 if ((ret = nouveau_sgdma_init(dev)))
 445                         DRM_ERROR("Error initialising PCI SGDMA: %d\n", ret);
 446         }
 447
 448         if ((ret = drm_bo_init_mm(dev, DRM_BO_MEM_TT, 0,
 449                                   dev_priv->gart_info.aper_size >>
 450                                   PAGE_SHIFT, 1))) {
 451                 DRM_ERROR("Failed TT mm init: %d\n", ret);
 452                 return ret;
 453         }
 454
 455 #ifdef HACK_OLD_MM
 456         vram_size <<= PAGE_SHIFT;
 457         DRM_INFO("Old MM using %dKiB VRAM\n", (vram_size * 3) >> 10);
 458         if (nouveau_mem_init_heap(&dev_priv->fb_heap, vram_size, vram_size * 3))
 459                 return -ENOMEM;
 460 #endif
 461
 462         return 0;
 463 }
 464
 465 int nouveau_mem_init(struct drm_device *dev)
 466 {
 467         struct drm_nouveau_private *dev_priv = dev->dev_private;
 468         uint32_t fb_size;
 469         int ret = 0;
 470
 471         dev_priv->agp_heap = dev_priv->pci_heap = dev_priv->fb_heap = NULL;
 472         dev_priv->fb_phys = 0;
 473         dev_priv->gart_info.type = NOUVEAU_GART_NONE;
 474
 475         /* setup a mtrr over the FB */
 476         dev_priv->fb_mtrr = drm_mtrr_add(drm_get_resource_start(dev, 1),
 477                                          nouveau_mem_fb_amount(dev),
 478                                          DRM_MTRR_WC);
 479
 480         /* Init FB */
 481         dev_priv->fb_phys=drm_get_resource_start(dev,1);
 482         fb_size = nouveau_mem_fb_amount(dev);
 483         /* On G80, limit VRAM to 512MiB temporarily due to limits in how
 484          * we handle VRAM page tables.
 485          */
 486         if (dev_priv->card_type >= NV_50 && fb_size > (512 * 1024 * 1024))
 487                 fb_size = (512 * 1024 * 1024);
 488         /* On at least NV40, RAMIN is actually at the end of vram.
 489          * We don't want to allocate this... */
 490         if (dev_priv->card_type >= NV_40)
 491                 fb_size -= dev_priv->ramin_rsvd_vram;
 492         dev_priv->fb_available_size = fb_size;
 493         DRM_DEBUG("Available VRAM: %dKiB\n", fb_size>>10);
 494
 495         if (fb_size>256*1024*1024) {
 496                 /* On cards with > 256Mb, you can't map everything.
 497                  * So we create a second FB heap for that type of memory */
 498                 if (nouveau_mem_init_heap(&dev_priv->fb_heap,
 499                                           0, 256*1024*1024))
 500                         return -ENOMEM;
 501                 if (nouveau_mem_init_heap(&dev_priv->fb_nomap_heap,
 502                                           256*1024*1024, fb_size-256*1024*1024))
 503                         return -ENOMEM;
 504         } else {
 505                 if (nouveau_mem_init_heap(&dev_priv->fb_heap, 0, fb_size))
 506                         return -ENOMEM;
 507                 dev_priv->fb_nomap_heap=NULL;
 508         }
 509
 510 #if !defined(__powerpc__) && !defined(__ia64__)
 511         /* Init AGP / NV50 PCIEGART */
 512         if (drm_device_is_agp(dev) && dev->agp) {
 513                 if ((ret = nouveau_mem_init_agp(dev, 0)))
 514                         DRM_ERROR("Error initialising AGP: %d\n", ret);
 515         }
 516 #endif
 517
 518         /*Note: this is *not* just NV50 code, but only used on NV50 for now */
 519         if (dev_priv->gart_info.type == NOUVEAU_GART_NONE &&
 520             dev_priv->card_type >= NV_50) {
 521                 ret = nouveau_sgdma_init(dev);
 522                 if (!ret) {
 523                         ret = nouveau_sgdma_nottm_hack_init(dev);
 524                         if (ret)
 525                                 nouveau_sgdma_takedown(dev);
 526                 }
 527
 528                 if (ret)
 529                         DRM_ERROR("Error initialising SG DMA: %d\n", ret);
 530         }
 531
 532         if (dev_priv->gart_info.type != NOUVEAU_GART_NONE) {
 533                 if (nouveau_mem_init_heap(&dev_priv->agp_heap,
 534                                           0, dev_priv->gart_info.aper_size)) {
 535                         if (dev_priv->gart_info.type == NOUVEAU_GART_SGDMA) {
 536                                 nouveau_sgdma_nottm_hack_takedown(dev);
 537                                 nouveau_sgdma_takedown(dev);
 538                         }
 539                 }
 540         }
 541
 542         /* NV04-NV40 PCIEGART */
 543         if (!dev_priv->agp_heap && dev_priv->card_type < NV_50) {
 544                 struct drm_scatter_gather sgreq;
 545
 546                 DRM_DEBUG("Allocating sg memory for PCI DMA\n");
 547                 sgreq.size = 16 << 20; //16MB of PCI scatter-gather zone
 548
 549                 if (drm_sg_alloc(dev, &sgreq)) {
 550                         DRM_ERROR("Unable to allocate %ldMB of scatter-gather"
 551                                   " pages for PCI DMA!",sgreq.size>>20);
 552                 } else {
 553                         if (nouveau_mem_init_heap(&dev_priv->pci_heap, 0,
 554                                                   dev->sg->pages * PAGE_SIZE)) {
 555                                 DRM_ERROR("Unable to initialize pci_heap!");
 556                         }
 557                 }
 558         }
 559
 560         /* G8x: Allocate shared page table to map real VRAM pages into */
 561         if (dev_priv->card_type >= NV_50) {
 562                 unsigned size = ((512 * 1024 * 1024) / 65536) * 8;
 563
 564                 ret = nouveau_gpuobj_new(dev, NULL, size, 0,
 565                                          NVOBJ_FLAG_ZERO_ALLOC |
 566                                          NVOBJ_FLAG_ALLOW_NO_REFS,
 567                                          &dev_priv->vm_vram_pt);
 568                 if (ret) {
 569                         DRM_ERROR("Error creating VRAM page table: %d\n", ret);
 570                         return ret;
 571                 }
 572         }
 573
 574
 575         return 0;
 576 }
 577
 578 struct mem_block *
 579 nouveau_mem_alloc(struct drm_device *dev, int alignment, uint64_t size,
 580                   int flags, struct drm_file *file_priv)
 581 {
 582         struct drm_nouveau_private *dev_priv = dev->dev_private;
 583         struct mem_block *block;
 584         int type, tail = !(flags & NOUVEAU_MEM_USER);
 585
 586         /*
 587          * Make things easier on ourselves: all allocations are page-aligned.
 588          * We need that to map allocated regions into the user space
 589          */
 590         if (alignment < PAGE_SHIFT)
 591                 alignment = PAGE_SHIFT;
 592
 593         /* Align allocation sizes to 64KiB blocks on G8x.  We use a 64KiB
 594          * page size in the GPU VM.
 595          */
 596         if (flags & NOUVEAU_MEM_FB && dev_priv->card_type >= NV_50) {
 597                 size = (size + 65535) & ~65535;
 598                 if (alignment < 16)
 599                         alignment = 16;
 600         }
 601
 602         /*
 603          * Warn about 0 sized allocations, but let it go through. It'll return 1 page
 604          */
 605         if (size == 0)
 606                 DRM_INFO("warning : 0 byte allocation\n");
 607
 608         /*
 609          * Keep alloc size a multiple of the page size to keep drm_addmap() happy
 610          */
 611         if (size & (~PAGE_MASK))
 612                 size = ((size/PAGE_SIZE) + 1) * PAGE_SIZE;
 613
 614
 615 #define NOUVEAU_MEM_ALLOC_AGP {\
 616                 type=NOUVEAU_MEM_AGP;\
 617                 block = nouveau_mem_alloc_block(dev_priv->agp_heap, size,\
 618                                                 alignment, file_priv, tail); \
 619                 if (block) goto alloc_ok;\
 620                 }
 621
 622 #define NOUVEAU_MEM_ALLOC_PCI {\
 623                 type = NOUVEAU_MEM_PCI;\
 624                 block = nouveau_mem_alloc_block(dev_priv->pci_heap, size, \
 625                                                 alignment, file_priv, tail); \
 626                 if ( block ) goto alloc_ok;\
 627                 }
 628
 629 #define NOUVEAU_MEM_ALLOC_FB {\
 630                 type=NOUVEAU_MEM_FB;\
 631                 if (!(flags&NOUVEAU_MEM_MAPPED)) {\
 632                         block = nouveau_mem_alloc_block(dev_priv->fb_nomap_heap,\
 633                                                         size, alignment, \
 634                                                         file_priv, tail); \
 635                         if (block) goto alloc_ok;\
 636                 }\
 637                 block = nouveau_mem_alloc_block(dev_priv->fb_heap, size,\
 638                                                 alignment, file_priv, tail);\
 639                 if (block) goto alloc_ok;\
 640                 }
 641
 642
 643         if (flags&NOUVEAU_MEM_FB) NOUVEAU_MEM_ALLOC_FB
 644         if (flags&NOUVEAU_MEM_AGP) NOUVEAU_MEM_ALLOC_AGP
 645         if (flags&NOUVEAU_MEM_PCI) NOUVEAU_MEM_ALLOC_PCI
 646         if (flags&NOUVEAU_MEM_FB_ACCEPTABLE) NOUVEAU_MEM_ALLOC_FB
 647         if (flags&NOUVEAU_MEM_AGP_ACCEPTABLE) NOUVEAU_MEM_ALLOC_AGP
 648         if (flags&NOUVEAU_MEM_PCI_ACCEPTABLE) NOUVEAU_MEM_ALLOC_PCI
 649
 650
 651         return NULL;
 652
 653 alloc_ok:
 654         block->flags=type;
 655
 656         /* On G8x, map memory into VM */
 657         if (block->flags & NOUVEAU_MEM_FB && dev_priv->card_type >= NV_50 &&
 658             !(flags & NOUVEAU_MEM_NOVM)) {
 659                 struct nouveau_gpuobj *pt = dev_priv->vm_vram_pt;
 660                 unsigned offset = block->start;
 661                 unsigned count = block->size / 65536;
 662                 unsigned tile = 0;
 663
 664                 if (!pt) {
 665                         DRM_ERROR("vm alloc without vm pt\n");
 666                         nouveau_mem_free_block(block);
 667                         return NULL;
 668                 }
 669
 670                 /* The tiling stuff is *not* what NVIDIA does - but both the
 671                  * 2D and 3D engines seem happy with this simpler method.
 672                  * Should look into why NVIDIA do what they do at some point.
 673                  */
 674                 if (flags & NOUVEAU_MEM_TILE) {
 675                         if (flags & NOUVEAU_MEM_TILE_ZETA)
 676                                 tile = 0x00002800;
 677                         else
 678                                 tile = 0x00007000;
 679                 }
 680
 681                 while (count--) {
 682                         unsigned pte = offset / 65536;
 683
 684                         INSTANCE_WR(pt, (pte * 2) + 0, offset | 1);
 685                         INSTANCE_WR(pt, (pte * 2) + 1, 0x00000000 | tile);
 686                         offset += 65536;
 687                 }
 688         } else {
 689                 block->flags |= NOUVEAU_MEM_NOVM;
 690         }
 691
 692         if (flags&NOUVEAU_MEM_MAPPED)
 693         {
 694                 struct drm_map_list *entry;
 695                 int ret = 0;
 696                 block->flags|=NOUVEAU_MEM_MAPPED;
 697
 698                 if (type == NOUVEAU_MEM_AGP) {
 699                         if (dev_priv->gart_info.type != NOUVEAU_GART_SGDMA)
 700                         ret = drm_addmap(dev, block->start, block->size,
 701                                          _DRM_AGP, 0, &block->map);
 702                         else
 703                         ret = drm_addmap(dev, block->start, block->size,
 704                                          _DRM_SCATTER_GATHER, 0, &block->map);
 705                 }
 706                 else if (type == NOUVEAU_MEM_FB)
 707                         ret = drm_addmap(dev, block->start + dev_priv->fb_phys,
 708                                          block->size, _DRM_FRAME_BUFFER,
 709                                          0, &block->map);
 710                 else if (type == NOUVEAU_MEM_PCI)
 711                         ret = drm_addmap(dev, block->start, block->size,
 712                                          _DRM_SCATTER_GATHER, 0, &block->map);
 713
 714                 if (ret) {
 715                         nouveau_mem_free_block(block);
 716                         return NULL;
 717                 }
 718
 719                 entry = drm_find_matching_map(dev, block->map);
 720                 if (!entry) {
 721                         nouveau_mem_free_block(block);
 722                         return NULL;
 723                 }
 724                 block->map_handle = entry->user_token;
 725         }
 726
 727         DRM_DEBUG("allocated %lld bytes at 0x%llx type=0x%08x\n", block->size, block->start, block->flags);
 728         return block;
 729 }
 730
 731 void nouveau_mem_free(struct drm_device* dev, struct mem_block* block)
 732 {
 733         struct drm_nouveau_private *dev_priv = dev->dev_private;
 734
 735         DRM_DEBUG("freeing 0x%llx type=0x%08x\n", block->start, block->flags);
 736
 737         if (block->flags&NOUVEAU_MEM_MAPPED)
 738                 drm_rmmap(dev, block->map);
 739
 740         /* G8x: Remove pages from vm */
 741         if (block->flags & NOUVEAU_MEM_FB && dev_priv->card_type >= NV_50 &&
 742             !(block->flags & NOUVEAU_MEM_NOVM)) {
 743                 struct nouveau_gpuobj *pt = dev_priv->vm_vram_pt;
 744                 unsigned offset = block->start;
 745                 unsigned count = block->size / 65536;
 746
 747                 if (!pt) {
 748                         DRM_ERROR("vm free without vm pt\n");
 749                         goto out_free;
 750                 }
 751
 752                 while (count--) {
 753                         unsigned pte = offset / 65536;
 754                         INSTANCE_WR(pt, (pte * 2) + 0, 0);
 755                         INSTANCE_WR(pt, (pte * 2) + 1, 0);
 756                         offset += 65536;
 757                 }
 758         }
 759
 760 out_free:
 761         nouveau_mem_free_block(block);
 762 }
 763
 764 /*
 765  * Ioctls
 766  */
 767
 768 int
 769 nouveau_ioctl_mem_alloc(struct drm_device *dev, void *data,
 770                         struct drm_file *file_priv)
 771 {
 772         struct drm_nouveau_private *dev_priv = dev->dev_private;
 773         struct drm_nouveau_mem_alloc *alloc = data;
 774         struct mem_block *block;
 775
 776         NOUVEAU_CHECK_INITIALISED_WITH_RETURN;
 777
 778         if (alloc->flags & NOUVEAU_MEM_INTERNAL)
 779                 return -EINVAL;
 780
 781         block = nouveau_mem_alloc(dev, alloc->alignment, alloc->size,
 782                                   alloc->flags | NOUVEAU_MEM_USER, file_priv);
 783         if (!block)
 784                 return -ENOMEM;
 785         alloc->map_handle=block->map_handle;
 786         alloc->offset=block->start;
 787         alloc->flags=block->flags;
 788
 789         if (dev_priv->card_type >= NV_50 && alloc->flags & NOUVEAU_MEM_FB)
 790                 alloc->offset += 512*1024*1024;
 791
 792         return 0;
 793 }
 794
 795 int
 796 nouveau_ioctl_mem_free(struct drm_device *dev, void *data,
 797                        struct drm_file *file_priv)
 798 {
 799         struct drm_nouveau_private *dev_priv = dev->dev_private;
 800         struct drm_nouveau_mem_free *memfree = data;
 801         struct mem_block *block;
 802
 803         NOUVEAU_CHECK_INITIALISED_WITH_RETURN;
 804
 805         if (dev_priv->card_type >= NV_50 && memfree->flags & NOUVEAU_MEM_FB)
 806                 memfree->offset -= 512*1024*1024;
 807
 808         block=NULL;
 809         if (memfree->flags & NOUVEAU_MEM_FB)
 810                 block = find_block(dev_priv->fb_heap, memfree->offset);
 811         else if (memfree->flags & NOUVEAU_MEM_AGP)
 812                 block = find_block(dev_priv->agp_heap, memfree->offset);
 813         else if (memfree->flags & NOUVEAU_MEM_PCI)
 814                 block = find_block(dev_priv->pci_heap, memfree->offset);
 815         if (!block)
 816                 return -EFAULT;
 817         if (block->file_priv != file_priv)
 818                 return -EPERM;
 819
 820         nouveau_mem_free(dev, block);
 821         return 0;
 822 }
 823
 824 int
 825 nouveau_ioctl_mem_tile(struct drm_device *dev, void *data,
 826                        struct drm_file *file_priv)
 827 {
 828         struct drm_nouveau_private *dev_priv = dev->dev_private;
 829         struct drm_nouveau_mem_tile *memtile = data;
 830         struct mem_block *block = NULL;
 831
 832         NOUVEAU_CHECK_INITIALISED_WITH_RETURN;
 833
 834         if (dev_priv->card_type < NV_50)
 835                 return -EINVAL;
 836
 837         if (memtile->flags & NOUVEAU_MEM_FB) {
 838                 memtile->offset -= 512*1024*1024;
 839                 block = find_block(dev_priv->fb_heap, memtile->offset);
 840         }
 841
 842         if (!block)
 843                 return -EINVAL;
 844
 845         if (block->file_priv != file_priv)
 846                 return -EPERM;
 847
 848         {
 849                 struct nouveau_gpuobj *pt = dev_priv->vm_vram_pt;
 850                 unsigned offset = block->start + memtile->delta;
 851                 unsigned count = memtile->size / 65536;
 852                 unsigned tile = 0;
 853
 854                 if (memtile->flags & NOUVEAU_MEM_TILE) {
 855                         if (memtile->flags & NOUVEAU_MEM_TILE_ZETA)
 856                                 tile = 0x00002800;
 857                         else
 858                                 tile = 0x00007000;
 859                 }
 860
 861                 while (count--) {
 862                         unsigned pte = offset / 65536;
 863
 864                         INSTANCE_WR(pt, (pte * 2) + 0, offset | 1);
 865                         INSTANCE_WR(pt, (pte * 2) + 1, 0x00000000 | tile);
 866                         offset += 65536;
 867                 }
 868         }
 869
 870         return 0;
 871 }
 872