2 * Copyright 2005 Stephane Marchesin.
5 * Permission is hereby granted, free of charge, to any person obtaining a
6 * copy of this software and associated documentation files (the "Software"),
7 * to deal in the Software without restriction, including without limitation
8 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
9 * and/or sell copies of the Software, and to permit persons to whom the
10 * Software is furnished to do so, subject to the following conditions:
12 * The above copyright notice and this permission notice (including the next
13 * paragraph) shall be included in all copies or substantial portions of the
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
19 * VA LINUX SYSTEMS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
20 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
21 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
22 * OTHER DEALINGS IN THE SOFTWARE.
25 #ifndef __NOUVEAU_DRV_H__
26 #define __NOUVEAU_DRV_H__
28 #define DRIVER_AUTHOR "Stephane Marchesin"
29 #define DRIVER_EMAIL "dri-devel@lists.sourceforge.net"
31 #define DRIVER_NAME "nouveau"
32 #define DRIVER_DESC "nVidia Riva/TNT/GeForce"
33 #define DRIVER_DATE "20060213"
35 #define DRIVER_MAJOR 0
36 #define DRIVER_MINOR 0
37 #define DRIVER_PATCHLEVEL 9
39 #define NOUVEAU_FAMILY 0x0000FFFF
40 #define NOUVEAU_FLAGS 0xFFFF0000
42 #include "nouveau_drm.h"
43 #include "nouveau_reg.h"
46 struct mem_block *next;
47 struct mem_block *prev;
50 struct drm_file *file_priv; /* NULL: free, -1: heap, other: real files */
53 drm_handle_t map_handle;
57 NV_NFORCE =0x10000000,
58 NV_NFORCE2 =0x20000000
61 #define NVOBJ_ENGINE_SW 0
62 #define NVOBJ_ENGINE_GR 1
63 #define NVOBJ_ENGINE_INT 0xdeadbeef
65 #define NVOBJ_FLAG_ALLOW_NO_REFS (1 << 0)
66 #define NVOBJ_FLAG_ZERO_ALLOC (1 << 1)
67 #define NVOBJ_FLAG_ZERO_FREE (1 << 2)
68 #define NVOBJ_FLAG_FAKE (1 << 3)
69 struct nouveau_gpuobj {
70 struct nouveau_gpuobj *next;
71 struct nouveau_gpuobj *prev;
74 struct mem_block *im_pramin;
75 struct mem_block *im_backing;
85 struct nouveau_gpuobj_ref {
86 struct nouveau_gpuobj_ref *next;
88 struct nouveau_gpuobj *gpuobj;
97 /* owner of this fifo */
98 struct drm_file *file_priv;
99 /* mapping of the fifo itself */
100 drm_local_map_t *map;
101 /* mapping of the regs controling the fifo */
102 drm_local_map_t *regs;
104 /* DMA push buffer */
105 struct nouveau_gpuobj_ref *pushbuf;
106 struct mem_block *pushbuf_mem;
107 uint32_t pushbuf_base;
109 /* Notifier memory */
110 struct mem_block *notifier_block;
111 struct mem_block *notifier_heap;
112 drm_local_map_t *notifier_map;
115 struct nouveau_gpuobj_ref *ramfc;
118 struct nouveau_gpuobj_ref *ramin_grctx;
119 uint32_t pgraph_ctx [340]; /* XXX dynamic alloc ? */
122 struct nouveau_gpuobj *vm_pd;
123 struct nouveau_gpuobj_ref *vm_gart_pt;
126 struct nouveau_gpuobj_ref *ramin; /* Private instmem */
127 struct mem_block *ramin_heap; /* Private PRAMIN heap */
128 struct nouveau_gpuobj_ref *ramht; /* Hash table */
129 struct nouveau_gpuobj_ref *ramht_refs; /* Objects referenced by RAMHT */
132 struct nouveau_config {
139 struct nouveau_engine_func {
143 int (*init)(struct drm_device *dev);
144 void (*takedown)(struct drm_device *dev);
146 int (*populate)(struct drm_device *, struct nouveau_gpuobj *,
148 void (*clear)(struct drm_device *, struct nouveau_gpuobj *);
149 int (*bind)(struct drm_device *, struct nouveau_gpuobj *);
150 int (*unbind)(struct drm_device *, struct nouveau_gpuobj *);
154 int (*init)(struct drm_device *dev);
155 void (*takedown)(struct drm_device *dev);
159 int (*init)(struct drm_device *dev);
160 uint64_t (*read)(struct drm_device *dev);
161 void (*takedown)(struct drm_device *dev);
165 int (*init)(struct drm_device *dev);
166 void (*takedown)(struct drm_device *dev);
170 int (*init)(struct drm_device *);
171 void (*takedown)(struct drm_device *);
173 int (*create_context)(struct drm_device *, int channel);
174 void (*destroy_context)(struct drm_device *, int channel);
175 int (*load_context)(struct drm_device *, int channel);
176 int (*save_context)(struct drm_device *, int channel);
182 int (*init)(struct drm_device *);
183 void (*takedown)(struct drm_device *);
185 int (*create_context)(struct drm_device *, int channel);
186 void (*destroy_context)(struct drm_device *, int channel);
187 int (*load_context)(struct drm_device *, int channel);
188 int (*save_context)(struct drm_device *, int channel);
192 struct drm_nouveau_private {
194 NOUVEAU_CARD_INIT_DOWN,
195 NOUVEAU_CARD_INIT_DONE,
196 NOUVEAU_CARD_INIT_FAILED
199 /* the card type, takes NV_* as values */
201 /* exact chipset, derived from NV_PMC_BOOT_0 */
205 drm_local_map_t *mmio;
207 drm_local_map_t *ramin; /* NV40 onwards */
209 int fifo_alloc_count;
210 struct nouveau_fifo *fifos[NV_MAX_FIFO_NUMBER];
212 struct nouveau_engine_func Engine;
214 /* RAMIN configuration, RAMFC, RAMHT and RAMRO offsets */
215 struct nouveau_gpuobj *ramht;
216 uint32_t ramin_rsvd_vram;
217 uint32_t ramht_offset;
220 uint32_t ramfc_offset;
222 uint32_t ramro_offset;
225 /* base physical adresses */
227 uint64_t fb_available_size;
231 NOUVEAU_GART_NONE = 0,
238 struct nouveau_gpuobj *sg_ctxdma;
239 struct page *sg_dummy_page;
240 dma_addr_t sg_dummy_bus;
243 struct drm_ttm_backend *sg_be;
244 unsigned long sg_handle;
247 /* the mtrr covering the FB */
250 struct mem_block *agp_heap;
251 struct mem_block *fb_heap;
252 struct mem_block *fb_nomap_heap;
253 struct mem_block *ramin_heap;
254 struct mem_block *pci_heap;
256 /* context table pointed to be NV_PGRAPH_CHANNEL_CTX_TABLE (0x400780) */
257 uint32_t ctx_table_size;
258 struct nouveau_gpuobj_ref *ctx_table;
260 struct nouveau_config config;
262 struct nouveau_gpuobj *gpuobj_all;
265 /* nouveau_state.c */
266 extern void nouveau_preclose(struct drm_device * dev,
267 struct drm_file *file_priv);
268 extern int nouveau_load(struct drm_device *dev, unsigned long flags);
269 extern int nouveau_firstopen(struct drm_device *dev);
270 extern void nouveau_lastclose(struct drm_device *dev);
271 extern int nouveau_unload(struct drm_device *dev);
272 extern int nouveau_ioctl_getparam(DRM_IOCTL_ARGS);
273 extern int nouveau_ioctl_setparam(DRM_IOCTL_ARGS);
274 extern void nouveau_wait_for_idle(struct drm_device *dev);
275 extern int nouveau_ioctl_card_init(DRM_IOCTL_ARGS);
278 extern int nouveau_mem_init_heap(struct mem_block **,
279 uint64_t start, uint64_t size);
280 extern struct mem_block *nouveau_mem_alloc_block(struct mem_block *,
281 uint64_t size, int align2,
282 struct drm_file *file_priv);
283 extern void nouveau_mem_takedown(struct mem_block **heap);
284 extern void nouveau_mem_free_block(struct mem_block *);
285 extern uint64_t nouveau_mem_fb_amount(struct drm_device *dev);
286 extern void nouveau_mem_release(struct drm_file *file_priv,
287 struct mem_block *heap);
288 extern int nouveau_ioctl_mem_alloc(DRM_IOCTL_ARGS);
289 extern int nouveau_ioctl_mem_free(DRM_IOCTL_ARGS);
290 extern struct mem_block* nouveau_mem_alloc(struct drm_device *dev,
291 int alignment, uint64_t size,
293 struct drm_file *file_priv);
294 extern void nouveau_mem_free(struct drm_device* dev, struct mem_block*);
295 extern int nouveau_mem_init(struct drm_device *dev);
296 extern void nouveau_mem_close(struct drm_device *dev);
298 /* nouveau_notifier.c */
299 extern int nouveau_notifier_init_channel(struct drm_device *, int channel,
300 struct drm_file *file_priv);
301 extern void nouveau_notifier_takedown_channel(struct drm_device *, int channel);
302 extern int nouveau_notifier_alloc(struct drm_device *, int channel,
303 uint32_t handle, int cout, uint32_t *offset);
304 extern int nouveau_ioctl_notifier_alloc(DRM_IOCTL_ARGS);
307 extern int nouveau_fifo_init(struct drm_device *dev);
308 extern int nouveau_fifo_number(struct drm_device *dev);
309 extern int nouveau_fifo_ctx_size(struct drm_device *dev);
310 extern void nouveau_fifo_cleanup(struct drm_device *dev,
311 struct drm_file *file_priv);
312 extern int nouveau_fifo_owner(struct drm_device *dev,
313 struct drm_file *file_priv, int channel);
314 extern void nouveau_fifo_free(struct drm_device *dev, int channel);
316 /* nouveau_object.c */
317 extern void nouveau_gpuobj_takedown(struct drm_device *dev);
318 extern int nouveau_gpuobj_channel_init(struct drm_device *, int channel,
319 uint32_t vram_h, uint32_t tt_h);
320 extern void nouveau_gpuobj_channel_takedown(struct drm_device *, int channel);
321 extern int nouveau_gpuobj_new(struct drm_device *, int channel, int size, int align,
322 uint32_t flags, struct nouveau_gpuobj **);
323 extern int nouveau_gpuobj_del(struct drm_device *, struct nouveau_gpuobj **);
324 extern int nouveau_gpuobj_ref_add(struct drm_device *, int channel, uint32_t handle,
325 struct nouveau_gpuobj *,
326 struct nouveau_gpuobj_ref **);
327 extern int nouveau_gpuobj_ref_del(struct drm_device *, struct nouveau_gpuobj_ref **);
328 extern int nouveau_gpuobj_new_ref(struct drm_device *, int chan_obj, int chan_ref,
329 uint32_t handle, int size, int align,
330 uint32_t flags, struct nouveau_gpuobj_ref **);
331 extern int nouveau_gpuobj_new_fake(struct drm_device *, uint32_t offset,
332 uint32_t size, uint32_t flags,
333 struct nouveau_gpuobj**,
334 struct nouveau_gpuobj_ref**);
335 extern int nouveau_gpuobj_dma_new(struct drm_device *, int channel, int class,
336 uint64_t offset, uint64_t size,
337 int access, int target,
338 struct nouveau_gpuobj **);
339 extern int nouveau_gpuobj_gart_dma_new(struct drm_device *, int channel,
340 uint64_t offset, uint64_t size,
341 int access, struct nouveau_gpuobj **,
343 extern int nouveau_gpuobj_gr_new(struct drm_device *, int channel, int class,
344 struct nouveau_gpuobj **);
345 extern int nouveau_ioctl_grobj_alloc(DRM_IOCTL_ARGS);
348 extern irqreturn_t nouveau_irq_handler(DRM_IRQ_ARGS);
349 extern void nouveau_irq_preinstall(struct drm_device*);
350 extern void nouveau_irq_postinstall(struct drm_device*);
351 extern void nouveau_irq_uninstall(struct drm_device*);
353 /* nouveau_sgdma.c */
354 extern int nouveau_sgdma_init(struct drm_device *);
355 extern void nouveau_sgdma_takedown(struct drm_device *);
356 extern struct drm_ttm_backend *nouveau_sgdma_init_ttm(struct drm_device *);
357 extern int nouveau_sgdma_nottm_hack_init(struct drm_device *);
358 extern void nouveau_sgdma_nottm_hack_takedown(struct drm_device *);
361 extern int nv04_fb_init(struct drm_device *dev);
362 extern void nv04_fb_takedown(struct drm_device *dev);
365 extern int nv10_fb_init(struct drm_device *dev);
366 extern void nv10_fb_takedown(struct drm_device *dev);
369 extern int nv40_fb_init(struct drm_device *dev);
370 extern void nv40_fb_takedown(struct drm_device *dev);
373 extern int nv04_fifo_create_context(struct drm_device *dev, int channel);
374 extern void nv04_fifo_destroy_context(struct drm_device *dev, int channel);
375 extern int nv04_fifo_load_context(struct drm_device *dev, int channel);
376 extern int nv04_fifo_save_context(struct drm_device *dev, int channel);
379 extern int nv10_fifo_create_context(struct drm_device *dev, int channel);
380 extern void nv10_fifo_destroy_context(struct drm_device *dev, int channel);
381 extern int nv10_fifo_load_context(struct drm_device *dev, int channel);
382 extern int nv10_fifo_save_context(struct drm_device *dev, int channel);
385 extern int nv40_fifo_create_context(struct drm_device *, int channel);
386 extern void nv40_fifo_destroy_context(struct drm_device *, int channel);
387 extern int nv40_fifo_load_context(struct drm_device *, int channel);
388 extern int nv40_fifo_save_context(struct drm_device *, int channel);
391 extern int nv50_fifo_init(struct drm_device *);
392 extern void nv50_fifo_takedown(struct drm_device *);
393 extern int nv50_fifo_create_context(struct drm_device *, int channel);
394 extern void nv50_fifo_destroy_context(struct drm_device *, int channel);
395 extern int nv50_fifo_load_context(struct drm_device *, int channel);
396 extern int nv50_fifo_save_context(struct drm_device *, int channel);
399 extern void nouveau_nv04_context_switch(struct drm_device *dev);
400 extern int nv04_graph_init(struct drm_device *dev);
401 extern void nv04_graph_takedown(struct drm_device *dev);
402 extern int nv04_graph_create_context(struct drm_device *dev, int channel);
403 extern void nv04_graph_destroy_context(struct drm_device *dev, int channel);
404 extern int nv04_graph_load_context(struct drm_device *dev, int channel);
405 extern int nv04_graph_save_context(struct drm_device *dev, int channel);
408 extern void nouveau_nv10_context_switch(struct drm_device *dev);
409 extern int nv10_graph_init(struct drm_device *dev);
410 extern void nv10_graph_takedown(struct drm_device *dev);
411 extern int nv10_graph_create_context(struct drm_device *dev, int channel);
412 extern void nv10_graph_destroy_context(struct drm_device *dev, int channel);
413 extern int nv10_graph_load_context(struct drm_device *dev, int channel);
414 extern int nv10_graph_save_context(struct drm_device *dev, int channel);
417 extern void nouveau_nv20_context_switch(struct drm_device *dev);
418 extern int nv20_graph_init(struct drm_device *dev);
419 extern void nv20_graph_takedown(struct drm_device *dev);
420 extern int nv20_graph_create_context(struct drm_device *dev, int channel);
421 extern void nv20_graph_destroy_context(struct drm_device *dev, int channel);
422 extern int nv20_graph_load_context(struct drm_device *dev, int channel);
423 extern int nv20_graph_save_context(struct drm_device *dev, int channel);
426 extern int nv30_graph_init(struct drm_device *dev);
427 extern void nv30_graph_takedown(struct drm_device *dev);
428 extern int nv30_graph_create_context(struct drm_device *, int channel);
429 extern void nv30_graph_destroy_context(struct drm_device *, int channel);
430 extern int nv30_graph_load_context(struct drm_device *, int channel);
431 extern int nv30_graph_save_context(struct drm_device *, int channel);
434 extern int nv40_graph_init(struct drm_device *);
435 extern void nv40_graph_takedown(struct drm_device *);
436 extern int nv40_graph_create_context(struct drm_device *, int channel);
437 extern void nv40_graph_destroy_context(struct drm_device *, int channel);
438 extern int nv40_graph_load_context(struct drm_device *, int channel);
439 extern int nv40_graph_save_context(struct drm_device *, int channel);
442 extern int nv50_graph_init(struct drm_device *);
443 extern void nv50_graph_takedown(struct drm_device *);
444 extern int nv50_graph_create_context(struct drm_device *, int channel);
445 extern void nv50_graph_destroy_context(struct drm_device *, int channel);
446 extern int nv50_graph_load_context(struct drm_device *, int channel);
447 extern int nv50_graph_save_context(struct drm_device *, int channel);
450 extern int nv04_instmem_init(struct drm_device *dev);
451 extern void nv04_instmem_takedown(struct drm_device *dev);
452 extern int nv04_instmem_populate(struct drm_device*, struct nouveau_gpuobj*,
454 extern void nv04_instmem_clear(struct drm_device*, struct nouveau_gpuobj*);
455 extern int nv04_instmem_bind(struct drm_device*, struct nouveau_gpuobj*);
456 extern int nv04_instmem_unbind(struct drm_device*, struct nouveau_gpuobj*);
459 extern int nv50_instmem_init(struct drm_device *dev);
460 extern void nv50_instmem_takedown(struct drm_device *dev);
461 extern int nv50_instmem_populate(struct drm_device*, struct nouveau_gpuobj*,
463 extern void nv50_instmem_clear(struct drm_device*, struct nouveau_gpuobj*);
464 extern int nv50_instmem_bind(struct drm_device*, struct nouveau_gpuobj*);
465 extern int nv50_instmem_unbind(struct drm_device*, struct nouveau_gpuobj*);
468 extern int nv04_mc_init(struct drm_device *dev);
469 extern void nv04_mc_takedown(struct drm_device *dev);
472 extern int nv40_mc_init(struct drm_device *dev);
473 extern void nv40_mc_takedown(struct drm_device *dev);
476 extern int nv50_mc_init(struct drm_device *dev);
477 extern void nv50_mc_takedown(struct drm_device *dev);
480 extern int nv04_timer_init(struct drm_device *dev);
481 extern uint64_t nv04_timer_read(struct drm_device *dev);
482 extern void nv04_timer_takedown(struct drm_device *dev);
484 extern long nouveau_compat_ioctl(struct file *file, unsigned int cmd,
487 #if defined(__powerpc__)
488 #define NV_READ(reg) in_be32((void __iomem *)(dev_priv->mmio)->handle + (reg) )
489 #define NV_WRITE(reg,val) out_be32((void __iomem *)(dev_priv->mmio)->handle + (reg) , (val) )
491 #define NV_READ(reg) DRM_READ32( dev_priv->mmio, (reg) )
492 #define NV_WRITE(reg,val) DRM_WRITE32( dev_priv->mmio, (reg), (val) )
496 #if defined(__powerpc__)
497 #define NV_RI32(o) in_be32((void __iomem *)(dev_priv->ramin)->handle+(o))
498 #define NV_WI32(o,v) out_be32((void __iomem*)(dev_priv->ramin)->handle+(o), (v))
500 #define NV_RI32(o) DRM_READ32(dev_priv->ramin, (o))
501 #define NV_WI32(o,v) DRM_WRITE32(dev_priv->ramin, (o), (v))
504 #define INSTANCE_RD(o,i) NV_RI32((o)->im_pramin->start + ((i)<<2))
505 #define INSTANCE_WR(o,i,v) NV_WI32((o)->im_pramin->start + ((i)<<2), (v))
507 #endif /* __NOUVEAU_DRV_H__ */