2 * Copyright 2005 Stephane Marchesin.
5 * Permission is hereby granted, free of charge, to any person obtaining a
6 * copy of this software and associated documentation files (the "Software"),
7 * to deal in the Software without restriction, including without limitation
8 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
9 * and/or sell copies of the Software, and to permit persons to whom the
10 * Software is furnished to do so, subject to the following conditions:
12 * The above copyright notice and this permission notice (including the next
13 * paragraph) shall be included in all copies or substantial portions of the
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
19 * VA LINUX SYSTEMS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
20 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
21 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
22 * OTHER DEALINGS IN THE SOFTWARE.
25 #ifndef __NOUVEAU_DRV_H__
26 #define __NOUVEAU_DRV_H__
28 #define DRIVER_AUTHOR "Stephane Marchesin"
29 #define DRIVER_EMAIL "dri-devel@lists.sourceforge.net"
31 #define DRIVER_NAME "nouveau"
32 #define DRIVER_DESC "nVidia Riva/TNT/GeForce"
33 #define DRIVER_DATE "20060213"
35 #define DRIVER_MAJOR 0
36 #define DRIVER_MINOR 0
37 #define DRIVER_PATCHLEVEL 7
39 #define NOUVEAU_FAMILY 0x0000FFFF
40 #define NOUVEAU_FLAGS 0xFFFF0000
42 #include "nouveau_drm.h"
43 #include "nouveau_reg.h"
46 struct mem_block *next;
47 struct mem_block *prev;
50 DRMFILE filp; /* 0: free, -1: heap, other: real files */
56 NV_NFORCE =0x10000000,
57 NV_NFORCE2 =0x20000000
62 struct nouveau_object *next;
63 struct nouveau_object *prev;
66 struct mem_block *instance;
76 /* owner of this fifo */
78 /* mapping of the fifo itself */
80 /* mapping of the regs controling the fifo */
81 drm_local_map_t *regs;
82 /* dma object for the command buffer itself */
83 struct mem_block *cmdbuf_mem;
84 struct nouveau_object *cmdbuf_obj;
85 uint32_t pushbuf_base;
87 struct mem_block *notifier_block;
88 struct mem_block *notifier_heap;
89 drm_local_map_t *notifier_map;
90 /* PGRAPH context, for cards that keep it in RAMIN */
91 struct mem_block *ramin_grctx;
92 /* objects belonging to this fifo */
93 struct nouveau_object *objs;
95 /* XXX dynamic alloc ? */
96 uint32_t pgraph_ctx [340];
99 struct nouveau_config {
106 typedef struct nouveau_engine_func {
108 int (*init)(drm_device_t *dev);
109 void (*takedown)(drm_device_t *dev);
113 int (*init)(drm_device_t *dev);
114 void (*takedown)(drm_device_t *dev);
118 int (*init)(drm_device_t *dev);
119 void (*takedown)(drm_device_t *dev);
123 int (*init)(drm_device_t *);
124 void (*takedown)(drm_device_t *);
126 int (*create_context)(drm_device_t *, int channel);
127 void (*destroy_context)(drm_device_t *, int channel);
128 int (*load_context)(drm_device_t *, int channel);
129 int (*save_context)(drm_device_t *, int channel);
133 int (*init)(drm_device_t *);
134 void (*takedown)(drm_device_t *);
136 int (*create_context)(drm_device_t *, int channel);
137 void (*destroy_context)(drm_device_t *, int channel);
138 int (*load_context)(drm_device_t *, int channel);
139 int (*save_context)(drm_device_t *, int channel);
141 } nouveau_engine_func_t;
143 typedef struct drm_nouveau_private {
144 /* the card type, takes NV_* as values */
146 /* exact chipset, derived from NV_PMC_BOOT_0 */
150 drm_local_map_t *mmio;
152 drm_local_map_t *ramin; /* NV40 onwards */
154 int fifo_alloc_count;
155 struct nouveau_fifo fifos[NV_MAX_FIFO_NUMBER];
157 struct nouveau_engine_func Engine;
159 /* RAMIN configuration, RAMFC, RAMHT and RAMRO offsets */
161 uint32_t ramht_offset;
164 uint32_t ramfc_offset;
166 uint32_t ramro_offset;
169 /* base physical adresses */
171 uint64_t fb_available_size;
173 uint64_t agp_available_size;
175 /* the mtrr covering the FB */
178 struct mem_block *agp_heap;
179 struct mem_block *fb_heap;
180 struct mem_block *fb_nomap_heap;
181 struct mem_block *ramin_heap;
183 /* context table pointed to be NV_PGRAPH_CHANNEL_CTX_TABLE (0x400780) */
184 uint32_t ctx_table_size;
185 struct mem_block *ctx_table;
187 struct nouveau_config config;
189 drm_nouveau_private_t;
191 /* nouveau_state.c */
192 extern void nouveau_preclose(drm_device_t * dev, DRMFILE filp);
193 extern int nouveau_load(struct drm_device *dev, unsigned long flags);
194 extern int nouveau_firstopen(struct drm_device *dev);
195 extern void nouveau_lastclose(struct drm_device *dev);
196 extern int nouveau_unload(struct drm_device *dev);
197 extern int nouveau_ioctl_getparam(DRM_IOCTL_ARGS);
198 extern int nouveau_ioctl_setparam(DRM_IOCTL_ARGS);
199 extern void nouveau_wait_for_idle(struct drm_device *dev);
200 extern int nouveau_ioctl_card_init(DRM_IOCTL_ARGS);
203 extern int nouveau_mem_init_heap(struct mem_block **,
204 uint64_t start, uint64_t size);
205 extern struct mem_block *nouveau_mem_alloc_block(struct mem_block *,
206 uint64_t size, int align2,
208 extern void nouveau_mem_free_block(struct mem_block *);
209 extern uint64_t nouveau_mem_fb_amount(struct drm_device *dev);
210 extern void nouveau_mem_release(DRMFILE filp, struct mem_block *heap);
211 extern int nouveau_ioctl_mem_alloc(DRM_IOCTL_ARGS);
212 extern int nouveau_ioctl_mem_free(DRM_IOCTL_ARGS);
213 extern struct mem_block* nouveau_mem_alloc(struct drm_device *dev, int alignment, uint64_t size, int flags, DRMFILE filp);
214 extern void nouveau_mem_free(struct drm_device* dev, struct mem_block*);
215 extern int nouveau_mem_init(struct drm_device *dev);
216 extern void nouveau_mem_close(struct drm_device *dev);
217 extern int nouveau_instmem_init(struct drm_device *dev);
218 extern struct mem_block* nouveau_instmem_alloc(struct drm_device *dev,
219 uint32_t size, uint32_t align);
220 extern void nouveau_instmem_free(struct drm_device *dev,
221 struct mem_block *block);
223 /* nouveau_notifier.c */
224 extern int nouveau_notifier_init_channel(drm_device_t *, int channel, DRMFILE);
225 extern void nouveau_notifier_takedown_channel(drm_device_t *, int channel);
226 extern int nouveau_notifier_alloc(drm_device_t *, int channel,
227 uint32_t handle, int cout, uint32_t *offset);
228 extern int nouveau_ioctl_notifier_alloc(DRM_IOCTL_ARGS);
231 extern int nouveau_fifo_init(drm_device_t *dev);
232 extern int nouveau_fifo_number(drm_device_t *dev);
233 extern int nouveau_fifo_ctx_size(drm_device_t *dev);
234 extern void nouveau_fifo_cleanup(drm_device_t *dev, DRMFILE filp);
235 extern int nouveau_fifo_owner(drm_device_t *dev, DRMFILE filp, int channel);
236 extern void nouveau_fifo_free(drm_device_t *dev, int channel);
238 /* nouveau_object.c */
239 extern int nouveau_object_init_channel(drm_device_t *, int channel,
240 uint32_t vram_handle,
242 extern void nouveau_object_takedown_channel(drm_device_t *dev, int channel);
243 extern void nouveau_object_cleanup(drm_device_t *dev, int channel);
244 extern int nouveau_ramht_insert(drm_device_t *, int channel,
245 uint32_t handle, struct nouveau_object *);
246 extern struct nouveau_object *
247 nouveau_object_gr_create(drm_device_t *dev, int channel, int class);
248 extern struct nouveau_object *
249 nouveau_object_dma_create(drm_device_t *dev, int channel, int class,
250 uint32_t offset, uint32_t size,
251 int access, int target);
252 extern void nouveau_object_free(drm_device_t *dev, struct nouveau_object *obj);
253 extern int nouveau_ioctl_grobj_alloc(DRM_IOCTL_ARGS);
254 extern uint32_t nouveau_chip_instance_get(drm_device_t *dev, struct mem_block *mem);
257 extern irqreturn_t nouveau_irq_handler(DRM_IRQ_ARGS);
258 extern void nouveau_irq_preinstall(drm_device_t*);
259 extern void nouveau_irq_postinstall(drm_device_t*);
260 extern void nouveau_irq_uninstall(drm_device_t*);
263 extern int nv04_fb_init(drm_device_t *dev);
264 extern void nv04_fb_takedown(drm_device_t *dev);
267 extern int nv10_fb_init(drm_device_t *dev);
268 extern void nv10_fb_takedown(drm_device_t *dev);
271 extern int nv40_fb_init(drm_device_t *dev);
272 extern void nv40_fb_takedown(drm_device_t *dev);
275 extern int nv04_fifo_create_context(drm_device_t *dev, int channel);
276 extern void nv04_fifo_destroy_context(drm_device_t *dev, int channel);
277 extern int nv04_fifo_load_context(drm_device_t *dev, int channel);
278 extern int nv04_fifo_save_context(drm_device_t *dev, int channel);
281 extern int nv10_fifo_create_context(drm_device_t *dev, int channel);
282 extern void nv10_fifo_destroy_context(drm_device_t *dev, int channel);
283 extern int nv10_fifo_load_context(drm_device_t *dev, int channel);
284 extern int nv10_fifo_save_context(drm_device_t *dev, int channel);
287 extern int nv40_fifo_create_context(drm_device_t *, int channel);
288 extern void nv40_fifo_destroy_context(drm_device_t *, int channel);
289 extern int nv40_fifo_load_context(drm_device_t *, int channel);
290 extern int nv40_fifo_save_context(drm_device_t *, int channel);
293 extern int nv50_fifo_init(drm_device_t *);
294 extern void nv50_fifo_takedown(drm_device_t *);
295 extern int nv50_fifo_create_context(drm_device_t *, int channel);
296 extern void nv50_fifo_destroy_context(drm_device_t *, int channel);
297 extern int nv50_fifo_load_context(drm_device_t *, int channel);
298 extern int nv50_fifo_save_context(drm_device_t *, int channel);
301 extern void nouveau_nv04_context_switch(drm_device_t *dev);
302 extern int nv04_graph_init(drm_device_t *dev);
303 extern void nv04_graph_takedown(drm_device_t *dev);
304 extern int nv04_graph_create_context(drm_device_t *dev, int channel);
305 extern void nv04_graph_destroy_context(drm_device_t *dev, int channel);
306 extern int nv04_graph_load_context(drm_device_t *dev, int channel);
307 extern int nv04_graph_save_context(drm_device_t *dev, int channel);
310 extern void nouveau_nv10_context_switch(drm_device_t *dev);
311 extern int nv10_graph_init(drm_device_t *dev);
312 extern void nv10_graph_takedown(drm_device_t *dev);
313 extern int nv10_graph_create_context(drm_device_t *dev, int channel);
314 extern void nv10_graph_destroy_context(drm_device_t *dev, int channel);
315 extern int nv10_graph_load_context(drm_device_t *dev, int channel);
316 extern int nv10_graph_save_context(drm_device_t *dev, int channel);
319 extern void nouveau_nv20_context_switch(drm_device_t *dev);
320 extern int nv20_graph_init(drm_device_t *dev);
321 extern void nv20_graph_takedown(drm_device_t *dev);
322 extern int nv20_graph_create_context(drm_device_t *dev, int channel);
323 extern void nv20_graph_destroy_context(drm_device_t *dev, int channel);
324 extern int nv20_graph_load_context(drm_device_t *dev, int channel);
325 extern int nv20_graph_save_context(drm_device_t *dev, int channel);
328 extern int nv30_graph_init(drm_device_t *dev);
329 extern void nv30_graph_takedown(drm_device_t *dev);
330 extern int nv30_graph_create_context(drm_device_t *, int channel);
331 extern void nv30_graph_destroy_context(drm_device_t *, int channel);
332 extern int nv30_graph_load_context(drm_device_t *, int channel);
333 extern int nv30_graph_save_context(drm_device_t *, int channel);
336 extern int nv40_graph_init(drm_device_t *);
337 extern void nv40_graph_takedown(drm_device_t *);
338 extern int nv40_graph_create_context(drm_device_t *, int channel);
339 extern void nv40_graph_destroy_context(drm_device_t *, int channel);
340 extern int nv40_graph_load_context(drm_device_t *, int channel);
341 extern int nv40_graph_save_context(drm_device_t *, int channel);
344 extern int nv50_graph_init(drm_device_t *);
345 extern void nv50_graph_takedown(drm_device_t *);
346 extern int nv50_graph_create_context(drm_device_t *, int channel);
347 extern void nv50_graph_destroy_context(drm_device_t *, int channel);
348 extern int nv50_graph_load_context(drm_device_t *, int channel);
349 extern int nv50_graph_save_context(drm_device_t *, int channel);
352 extern int nv04_mc_init(drm_device_t *dev);
353 extern void nv04_mc_takedown(drm_device_t *dev);
356 extern int nv40_mc_init(drm_device_t *dev);
357 extern void nv40_mc_takedown(drm_device_t *dev);
360 extern int nv50_mc_init(drm_device_t *dev);
361 extern void nv50_mc_takedown(drm_device_t *dev);
364 extern int nv04_timer_init(drm_device_t *dev);
365 extern void nv04_timer_takedown(drm_device_t *dev);
367 extern long nouveau_compat_ioctl(struct file *filp, unsigned int cmd,
370 #if defined(__powerpc__)
371 #define NV_READ(reg) in_be32((void __iomem *)(dev_priv->mmio)->handle + (reg) )
372 #define NV_WRITE(reg,val) out_be32((void __iomem *)(dev_priv->mmio)->handle + (reg) , (val) )
374 #define NV_READ(reg) DRM_READ32( dev_priv->mmio, (reg) )
375 #define NV_WRITE(reg,val) DRM_WRITE32( dev_priv->mmio, (reg), (val) )
379 #if defined(__powerpc__)
380 #define NV_RI32(o) in_be32((void __iomem *)(dev_priv->ramin)->handle+(o))
381 #define NV_WI32(o,v) out_be32((void __iomem*)(dev_priv->ramin)->handle+(o), (v))
383 #define NV_RI32(o) DRM_READ32(dev_priv->ramin, (o))
384 #define NV_WI32(o,v) DRM_WRITE32(dev_priv->ramin, (o), (v))
387 #define INSTANCE_RD(o,i) NV_RI32((o)->start + ((i)<<2))
388 #define INSTANCE_WR(o,i,v) NV_WI32((o)->start + ((i)<<2), (v))
390 #endif /* __NOUVEAU_DRV_H__ */