2 * Copyright 2005 Stephane Marchesin.
5 * Permission is hereby granted, free of charge, to any person obtaining a
6 * copy of this software and associated documentation files (the "Software"),
7 * to deal in the Software without restriction, including without limitation
8 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
9 * and/or sell copies of the Software, and to permit persons to whom the
10 * Software is furnished to do so, subject to the following conditions:
12 * The above copyright notice and this permission notice (including the next
13 * paragraph) shall be included in all copies or substantial portions of the
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
19 * VA LINUX SYSTEMS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
20 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
21 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
22 * OTHER DEALINGS IN THE SOFTWARE.
25 #ifndef __NOUVEAU_DRV_H__
26 #define __NOUVEAU_DRV_H__
28 #define DRIVER_AUTHOR "Stephane Marchesin"
29 #define DRIVER_EMAIL "dri-devel@lists.sourceforge.net"
31 #define DRIVER_NAME "nouveau"
32 #define DRIVER_DESC "nVidia Riva/TNT/GeForce"
33 #define DRIVER_DATE "20060213"
35 #define DRIVER_MAJOR 0
36 #define DRIVER_MINOR 0
37 #define DRIVER_PATCHLEVEL 10
39 #define NOUVEAU_FAMILY 0x0000FFFF
40 #define NOUVEAU_FLAGS 0xFFFF0000
42 #include "nouveau_drm.h"
43 #include "nouveau_reg.h"
47 struct mem_block *next;
48 struct mem_block *prev;
51 struct drm_file *file_priv; /* NULL: free, -1: heap, other: real files */
54 drm_handle_t map_handle;
58 NV_NFORCE =0x10000000,
59 NV_NFORCE2 =0x20000000
62 #define NVOBJ_ENGINE_SW 0
63 #define NVOBJ_ENGINE_GR 1
64 #define NVOBJ_ENGINE_INT 0xdeadbeef
66 #define NVOBJ_FLAG_ALLOW_NO_REFS (1 << 0)
67 #define NVOBJ_FLAG_ZERO_ALLOC (1 << 1)
68 #define NVOBJ_FLAG_ZERO_FREE (1 << 2)
69 #define NVOBJ_FLAG_FAKE (1 << 3)
70 struct nouveau_gpuobj {
71 struct list_head list;
74 struct mem_block *im_pramin;
75 struct mem_block *im_backing;
84 void (*dtor)(struct drm_device *, struct nouveau_gpuobj *);
88 struct nouveau_gpuobj_ref {
89 struct list_head list;
91 struct nouveau_gpuobj *gpuobj;
98 struct nouveau_channel
100 struct drm_device *dev;
103 /* owner of this fifo */
104 struct drm_file *file_priv;
105 /* mapping of the fifo itself */
106 drm_local_map_t *map;
107 /* mapping of the regs controling the fifo */
108 drm_local_map_t *regs;
110 /* DMA push buffer */
111 struct nouveau_gpuobj_ref *pushbuf;
112 struct mem_block *pushbuf_mem;
113 uint32_t pushbuf_base;
115 /* Notifier memory */
116 struct mem_block *notifier_block;
117 struct mem_block *notifier_heap;
118 drm_local_map_t *notifier_map;
121 struct nouveau_gpuobj_ref *ramfc;
124 /* XXX may be merge 2 pointers as private data ??? */
125 struct nouveau_gpuobj_ref *ramin_grctx;
129 struct nouveau_gpuobj *vm_pd;
130 struct nouveau_gpuobj_ref *vm_gart_pt;
133 struct nouveau_gpuobj_ref *ramin; /* Private instmem */
134 struct mem_block *ramin_heap; /* Private PRAMIN heap */
135 struct nouveau_gpuobj_ref *ramht; /* Hash table */
136 struct list_head ramht_refs; /* Objects referenced by RAMHT */
139 struct nouveau_drm_channel {
140 struct nouveau_channel *chan;
143 int max, put, cur, free;
145 volatile uint32_t *pushbuf;
148 uint32_t notify0_offset;
151 uint32_t next_sequence;
154 uint32_t m2mf_dma_source;
155 uint32_t m2mf_dma_destin;
158 struct nouveau_config {
165 struct nouveau_instmem_engine {
168 int (*init)(struct drm_device *dev);
169 void (*takedown)(struct drm_device *dev);
171 int (*populate)(struct drm_device *, struct nouveau_gpuobj *,
173 void (*clear)(struct drm_device *, struct nouveau_gpuobj *);
174 int (*bind)(struct drm_device *, struct nouveau_gpuobj *);
175 int (*unbind)(struct drm_device *, struct nouveau_gpuobj *);
178 struct nouveau_mc_engine {
179 int (*init)(struct drm_device *dev);
180 void (*takedown)(struct drm_device *dev);
183 struct nouveau_timer_engine {
184 int (*init)(struct drm_device *dev);
185 void (*takedown)(struct drm_device *dev);
186 uint64_t (*read)(struct drm_device *dev);
189 struct nouveau_fb_engine {
190 int (*init)(struct drm_device *dev);
191 void (*takedown)(struct drm_device *dev);
194 struct nouveau_fifo_engine {
197 int (*init)(struct drm_device *);
198 void (*takedown)(struct drm_device *);
200 int (*create_context)(struct nouveau_channel *);
201 void (*destroy_context)(struct nouveau_channel *);
202 int (*load_context)(struct nouveau_channel *);
203 int (*save_context)(struct nouveau_channel *);
206 struct nouveau_pgraph_engine {
207 int (*init)(struct drm_device *);
208 void (*takedown)(struct drm_device *);
210 int (*create_context)(struct nouveau_channel *);
211 void (*destroy_context)(struct nouveau_channel *);
212 int (*load_context)(struct nouveau_channel *);
213 int (*save_context)(struct nouveau_channel *);
216 struct nouveau_engine {
217 struct nouveau_instmem_engine instmem;
218 struct nouveau_mc_engine mc;
219 struct nouveau_timer_engine timer;
220 struct nouveau_fb_engine fb;
221 struct nouveau_pgraph_engine graph;
222 struct nouveau_fifo_engine fifo;
225 struct drm_nouveau_private {
227 NOUVEAU_CARD_INIT_DOWN,
228 NOUVEAU_CARD_INIT_DONE,
229 NOUVEAU_CARD_INIT_FAILED
232 /* the card type, takes NV_* as values */
234 /* exact chipset, derived from NV_PMC_BOOT_0 */
238 drm_local_map_t *mmio;
240 drm_local_map_t *ramin; /* NV40 onwards */
242 int fifo_alloc_count;
243 struct nouveau_channel *fifos[NV_MAX_FIFO_NUMBER];
245 struct nouveau_engine Engine;
246 struct nouveau_drm_channel channel;
248 /* RAMIN configuration, RAMFC, RAMHT and RAMRO offsets */
249 struct nouveau_gpuobj *ramht;
250 uint32_t ramin_rsvd_vram;
251 uint32_t ramht_offset;
254 uint32_t ramfc_offset;
256 uint32_t ramro_offset;
259 /* base physical adresses */
261 uint64_t fb_available_size;
265 NOUVEAU_GART_NONE = 0,
272 struct nouveau_gpuobj *sg_ctxdma;
273 struct page *sg_dummy_page;
274 dma_addr_t sg_dummy_bus;
277 struct drm_ttm_backend *sg_be;
278 unsigned long sg_handle;
281 /* the mtrr covering the FB */
284 struct mem_block *agp_heap;
285 struct mem_block *fb_heap;
286 struct mem_block *fb_nomap_heap;
287 struct mem_block *ramin_heap;
288 struct mem_block *pci_heap;
290 /* context table pointed to be NV_PGRAPH_CHANNEL_CTX_TABLE (0x400780) */
291 uint32_t ctx_table_size;
292 struct nouveau_gpuobj_ref *ctx_table;
294 struct nouveau_config config;
296 struct list_head gpuobj_list;
299 #define NOUVEAU_CHECK_INITIALISED_WITH_RETURN do { \
300 struct drm_nouveau_private *nv = dev->dev_private; \
301 if (nv->init_state != NOUVEAU_CARD_INIT_DONE) { \
302 DRM_ERROR("called without init\n"); \
307 #define NOUVEAU_GET_USER_CHANNEL_WITH_RETURN(id,cl,ch) do { \
308 struct drm_nouveau_private *nv = dev->dev_private; \
309 if (!nouveau_fifo_owner(dev, (cl), (id))) { \
310 DRM_ERROR("pid %d doesn't own channel %d\n", \
311 DRM_CURRENTPID, (id)); \
314 (ch) = nv->fifos[(id)]; \
317 /* nouveau_state.c */
318 extern void nouveau_preclose(struct drm_device *dev, struct drm_file *);
319 extern int nouveau_load(struct drm_device *, unsigned long flags);
320 extern int nouveau_firstopen(struct drm_device *);
321 extern void nouveau_lastclose(struct drm_device *);
322 extern int nouveau_unload(struct drm_device *);
323 extern int nouveau_ioctl_getparam(struct drm_device *, void *data,
325 extern int nouveau_ioctl_setparam(struct drm_device *, void *data,
327 extern void nouveau_wait_for_idle(struct drm_device *);
328 extern int nouveau_card_init(struct drm_device *);
329 extern int nouveau_ioctl_card_init(struct drm_device *, void *data,
333 extern int nouveau_mem_init_heap(struct mem_block **, uint64_t start,
335 extern struct mem_block *nouveau_mem_alloc_block(struct mem_block *,
336 uint64_t size, int align2,
338 extern void nouveau_mem_takedown(struct mem_block **heap);
339 extern void nouveau_mem_free_block(struct mem_block *);
340 extern uint64_t nouveau_mem_fb_amount(struct drm_device *);
341 extern void nouveau_mem_release(struct drm_file *, struct mem_block *heap);
342 extern int nouveau_ioctl_mem_alloc(struct drm_device *, void *data,
344 extern int nouveau_ioctl_mem_free(struct drm_device *, void *data,
346 extern struct mem_block* nouveau_mem_alloc(struct drm_device *,
347 int alignment, uint64_t size,
348 int flags, struct drm_file *);
349 extern void nouveau_mem_free(struct drm_device *dev, struct mem_block*);
350 extern int nouveau_mem_init(struct drm_device *);
351 extern void nouveau_mem_close(struct drm_device *);
353 /* nouveau_notifier.c */
354 extern int nouveau_notifier_init_channel(struct nouveau_channel *);
355 extern void nouveau_notifier_takedown_channel(struct nouveau_channel *);
356 extern int nouveau_notifier_alloc(struct nouveau_channel *, uint32_t handle,
357 int cout, uint32_t *offset);
358 extern int nouveau_ioctl_notifier_alloc(struct drm_device *, void *data,
360 extern int nouveau_ioctl_notifier_free(struct drm_device *, void *data,
364 extern int nouveau_fifo_init(struct drm_device *);
365 extern int nouveau_fifo_number(struct drm_device *);
366 extern int nouveau_fifo_ctx_size(struct drm_device *);
367 extern void nouveau_fifo_cleanup(struct drm_device *, struct drm_file *);
368 extern int nouveau_fifo_owner(struct drm_device *, struct drm_file *,
370 extern int nouveau_fifo_alloc(struct drm_device *dev,
371 struct nouveau_channel **chan,
372 struct drm_file *file_priv,
373 struct mem_block *pushbuf,
374 uint32_t fb_ctxdma, uint32_t tt_ctxdma);
375 extern void nouveau_fifo_free(struct nouveau_channel *);
377 /* nouveau_object.c */
378 extern int nouveau_gpuobj_early_init(struct drm_device *);
379 extern int nouveau_gpuobj_init(struct drm_device *);
380 extern void nouveau_gpuobj_takedown(struct drm_device *);
381 extern void nouveau_gpuobj_late_takedown(struct drm_device *);
382 extern int nouveau_gpuobj_channel_init(struct nouveau_channel *,
383 uint32_t vram_h, uint32_t tt_h);
384 extern void nouveau_gpuobj_channel_takedown(struct nouveau_channel *);
385 extern int nouveau_gpuobj_new(struct drm_device *, struct nouveau_channel *,
386 int size, int align, uint32_t flags,
387 struct nouveau_gpuobj **);
388 extern int nouveau_gpuobj_del(struct drm_device *, struct nouveau_gpuobj **);
389 extern int nouveau_gpuobj_ref_add(struct drm_device *, struct nouveau_channel *,
390 uint32_t handle, struct nouveau_gpuobj *,
391 struct nouveau_gpuobj_ref **);
392 extern int nouveau_gpuobj_ref_del(struct drm_device *,
393 struct nouveau_gpuobj_ref **);
394 extern int nouveau_gpuobj_ref_find(struct nouveau_channel *, uint32_t handle,
395 struct nouveau_gpuobj_ref **ref_ret);
396 extern int nouveau_gpuobj_new_ref(struct drm_device *,
397 struct nouveau_channel *alloc_chan,
398 struct nouveau_channel *ref_chan,
399 uint32_t handle, int size, int align,
400 uint32_t flags, struct nouveau_gpuobj_ref **);
401 extern int nouveau_gpuobj_new_fake(struct drm_device *,
402 uint32_t p_offset, uint32_t b_offset,
403 uint32_t size, uint32_t flags,
404 struct nouveau_gpuobj **,
405 struct nouveau_gpuobj_ref**);
406 extern int nouveau_gpuobj_dma_new(struct nouveau_channel *, int class,
407 uint64_t offset, uint64_t size, int access,
408 int target, struct nouveau_gpuobj **);
409 extern int nouveau_gpuobj_gart_dma_new(struct nouveau_channel *,
410 uint64_t offset, uint64_t size,
411 int access, struct nouveau_gpuobj **,
413 extern int nouveau_gpuobj_gr_new(struct nouveau_channel *, int class,
414 struct nouveau_gpuobj **);
415 extern int nouveau_ioctl_grobj_alloc(struct drm_device *, void *data,
417 extern int nouveau_ioctl_gpuobj_free(struct drm_device *, void *data,
421 extern irqreturn_t nouveau_irq_handler(DRM_IRQ_ARGS);
422 extern void nouveau_irq_preinstall(struct drm_device *);
423 extern void nouveau_irq_postinstall(struct drm_device *);
424 extern void nouveau_irq_uninstall(struct drm_device *);
426 /* nouveau_sgdma.c */
427 extern int nouveau_sgdma_init(struct drm_device *);
428 extern void nouveau_sgdma_takedown(struct drm_device *);
429 extern int nouveau_sgdma_get_page(struct drm_device *, uint32_t offset,
431 extern struct drm_ttm_backend *nouveau_sgdma_init_ttm(struct drm_device *);
432 extern int nouveau_sgdma_nottm_hack_init(struct drm_device *);
433 extern void nouveau_sgdma_nottm_hack_takedown(struct drm_device *);
436 extern int nouveau_dma_channel_init(struct drm_device *);
437 extern void nouveau_dma_channel_takedown(struct drm_device *);
438 extern int nouveau_dma_wait(struct drm_device *, int size);
441 extern int nv04_fb_init(struct drm_device *);
442 extern void nv04_fb_takedown(struct drm_device *);
445 extern int nv10_fb_init(struct drm_device *);
446 extern void nv10_fb_takedown(struct drm_device *);
449 extern int nv40_fb_init(struct drm_device *);
450 extern void nv40_fb_takedown(struct drm_device *);
453 extern int nv04_fifo_create_context(struct nouveau_channel *);
454 extern void nv04_fifo_destroy_context(struct nouveau_channel *);
455 extern int nv04_fifo_load_context(struct nouveau_channel *);
456 extern int nv04_fifo_save_context(struct nouveau_channel *);
459 extern int nv10_fifo_create_context(struct nouveau_channel *);
460 extern void nv10_fifo_destroy_context(struct nouveau_channel *);
461 extern int nv10_fifo_load_context(struct nouveau_channel *);
462 extern int nv10_fifo_save_context(struct nouveau_channel *);
465 extern int nv40_fifo_init(struct drm_device *);
466 extern int nv40_fifo_create_context(struct nouveau_channel *);
467 extern void nv40_fifo_destroy_context(struct nouveau_channel *);
468 extern int nv40_fifo_load_context(struct nouveau_channel *);
469 extern int nv40_fifo_save_context(struct nouveau_channel *);
472 extern int nv50_fifo_init(struct drm_device *);
473 extern void nv50_fifo_takedown(struct drm_device *);
474 extern int nv50_fifo_create_context(struct nouveau_channel *);
475 extern void nv50_fifo_destroy_context(struct nouveau_channel *);
476 extern int nv50_fifo_load_context(struct nouveau_channel *);
477 extern int nv50_fifo_save_context(struct nouveau_channel *);
480 extern void nouveau_nv04_context_switch(struct drm_device *);
481 extern int nv04_graph_init(struct drm_device *);
482 extern void nv04_graph_takedown(struct drm_device *);
483 extern int nv04_graph_create_context(struct nouveau_channel *);
484 extern void nv04_graph_destroy_context(struct nouveau_channel *);
485 extern int nv04_graph_load_context(struct nouveau_channel *);
486 extern int nv04_graph_save_context(struct nouveau_channel *);
489 extern void nouveau_nv10_context_switch(struct drm_device *);
490 extern int nv10_graph_init(struct drm_device *);
491 extern void nv10_graph_takedown(struct drm_device *);
492 extern int nv10_graph_create_context(struct nouveau_channel *);
493 extern void nv10_graph_destroy_context(struct nouveau_channel *);
494 extern int nv10_graph_load_context(struct nouveau_channel *);
495 extern int nv10_graph_save_context(struct nouveau_channel *);
498 extern int nv20_graph_create_context(struct nouveau_channel *);
499 extern void nv20_graph_destroy_context(struct nouveau_channel *);
500 extern int nv20_graph_load_context(struct nouveau_channel *);
501 extern int nv20_graph_save_context(struct nouveau_channel *);
502 extern int nv20_graph_init(struct drm_device *);
503 extern void nv20_graph_takedown(struct drm_device *);
504 extern int nv30_graph_init(struct drm_device *);
507 extern int nv40_graph_init(struct drm_device *);
508 extern void nv40_graph_takedown(struct drm_device *);
509 extern int nv40_graph_create_context(struct nouveau_channel *);
510 extern void nv40_graph_destroy_context(struct nouveau_channel *);
511 extern int nv40_graph_load_context(struct nouveau_channel *);
512 extern int nv40_graph_save_context(struct nouveau_channel *);
515 extern int nv50_graph_init(struct drm_device *);
516 extern void nv50_graph_takedown(struct drm_device *);
517 extern int nv50_graph_create_context(struct nouveau_channel *);
518 extern void nv50_graph_destroy_context(struct nouveau_channel *);
519 extern int nv50_graph_load_context(struct nouveau_channel *);
520 extern int nv50_graph_save_context(struct nouveau_channel *);
523 extern int nv04_instmem_init(struct drm_device *);
524 extern void nv04_instmem_takedown(struct drm_device *);
525 extern int nv04_instmem_populate(struct drm_device *, struct nouveau_gpuobj *,
527 extern void nv04_instmem_clear(struct drm_device *, struct nouveau_gpuobj *);
528 extern int nv04_instmem_bind(struct drm_device *, struct nouveau_gpuobj *);
529 extern int nv04_instmem_unbind(struct drm_device *, struct nouveau_gpuobj *);
532 extern int nv50_instmem_init(struct drm_device *);
533 extern void nv50_instmem_takedown(struct drm_device *);
534 extern int nv50_instmem_populate(struct drm_device *, struct nouveau_gpuobj *,
536 extern void nv50_instmem_clear(struct drm_device *, struct nouveau_gpuobj *);
537 extern int nv50_instmem_bind(struct drm_device *, struct nouveau_gpuobj *);
538 extern int nv50_instmem_unbind(struct drm_device *, struct nouveau_gpuobj *);
541 extern int nv04_mc_init(struct drm_device *);
542 extern void nv04_mc_takedown(struct drm_device *);
545 extern int nv40_mc_init(struct drm_device *);
546 extern void nv40_mc_takedown(struct drm_device *);
549 extern int nv50_mc_init(struct drm_device *);
550 extern void nv50_mc_takedown(struct drm_device *);
553 extern int nv04_timer_init(struct drm_device *);
554 extern uint64_t nv04_timer_read(struct drm_device *);
555 extern void nv04_timer_takedown(struct drm_device *);
557 extern long nouveau_compat_ioctl(struct file *file, unsigned int cmd,
560 /* nouveau_buffer.c */
561 extern struct drm_bo_driver nouveau_bo_driver;
563 /* nouveau_fence.c */
564 extern struct drm_fence_driver nouveau_fence_driver;
565 extern void nouveau_fence_handler(struct drm_device *dev, int channel);
567 #if defined(__powerpc__)
568 #define NV_READ(reg) in_be32((void __iomem *)(dev_priv->mmio)->handle + (reg) )
569 #define NV_WRITE(reg,val) out_be32((void __iomem *)(dev_priv->mmio)->handle + (reg) , (val) )
571 #define NV_READ(reg) DRM_READ32( dev_priv->mmio, (reg) )
572 #define NV_WRITE(reg,val) DRM_WRITE32( dev_priv->mmio, (reg), (val) )
576 #if defined(__powerpc__)
577 #define NV_RI32(o) in_be32((void __iomem *)(dev_priv->ramin)->handle+(o))
578 #define NV_WI32(o,v) out_be32((void __iomem*)(dev_priv->ramin)->handle+(o), (v))
580 #define NV_RI32(o) DRM_READ32(dev_priv->ramin, (o))
581 #define NV_WI32(o,v) DRM_WRITE32(dev_priv->ramin, (o), (v))
584 #define INSTANCE_RD(o,i) NV_RI32((o)->im_pramin->start + ((i)<<2))
585 #define INSTANCE_WR(o,i,v) NV_WI32((o)->im_pramin->start + ((i)<<2), (v))
587 #endif /* __NOUVEAU_DRV_H__ */