2 * Copyright 2005 Stephane Marchesin.
5 * Permission is hereby granted, free of charge, to any person obtaining a
6 * copy of this software and associated documentation files (the "Software"),
7 * to deal in the Software without restriction, including without limitation
8 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
9 * and/or sell copies of the Software, and to permit persons to whom the
10 * Software is furnished to do so, subject to the following conditions:
12 * The above copyright notice and this permission notice (including the next
13 * paragraph) shall be included in all copies or substantial portions of the
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
19 * VA LINUX SYSTEMS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
20 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
21 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
22 * OTHER DEALINGS IN THE SOFTWARE.
25 #ifndef __NOUVEAU_DRV_H__
26 #define __NOUVEAU_DRV_H__
28 #define DRIVER_AUTHOR "Stephane Marchesin"
29 #define DRIVER_EMAIL "dri-devel@lists.sourceforge.net"
31 #define DRIVER_NAME "nouveau"
32 #define DRIVER_DESC "nVidia Riva/TNT/GeForce"
33 #define DRIVER_DATE "20060213"
35 #define DRIVER_MAJOR 0
36 #define DRIVER_MINOR 0
37 #define DRIVER_PATCHLEVEL 2
39 #define NOUVEAU_FAMILY 0x0000FFFF
40 #define NOUVEAU_FLAGS 0xFFFF0000
42 #include "nouveau_drm.h"
43 #include "nouveau_reg.h"
46 struct mem_block *next;
47 struct mem_block *prev;
50 DRMFILE filp; /* 0: free, -1: heap, other: real files */
56 NV_NFORCE =0x10000000,
57 NV_NFORCE2 =0x20000000
62 struct nouveau_object *next;
63 struct nouveau_object *prev;
65 struct mem_block *instance;
73 #define NV_DMA_TARGET_VIDMEM 0
74 #define NV_DMA_TARGET_PCI 2
75 #define NV_DMA_TARGET_AGP 3
79 /* owner of this fifo */
81 /* mapping of the fifo itself */
83 /* mapping of the regs controling the fifo */
84 drm_local_map_t *regs;
85 /* dma object for the command buffer itself */
86 struct mem_block *cmdbuf_mem;
87 struct nouveau_object *cmdbuf_obj;
88 /* PGRAPH context, for cards that keep it in RAMIN */
89 struct mem_block *ramin_grctx;
90 /* objects belonging to this fifo */
91 struct nouveau_object *objs;
93 /* XXX move this in PGRAPH struct */
94 uint32_t pgraph_ctx_user;
97 struct nouveau_config {
104 typedef struct drm_nouveau_private {
105 /* the card type, takes NV_* as values */
109 drm_local_map_t *mmio;
112 //TODO: Remove me, I'm bogus :)
115 struct nouveau_object *fb_obj;
117 struct mem_block* cmdbuf_alloc;
119 int fifo_alloc_count;
120 struct nouveau_fifo fifos[NV_MAX_FIFO_NUMBER];
122 /* RAMFC and RAMRO offsets */
123 uint32_t ramht_offset;
126 uint32_t ramfc_offset;
128 uint32_t ramro_offset;
131 /* base physical adresses */
135 struct mem_block *agp_heap;
136 struct mem_block *fb_heap;
137 struct mem_block *fb_nomap_heap;
138 struct mem_block *ramin_heap;
140 struct nouveau_config config;
142 drm_nouveau_private_t;
144 /* nouveau_state.c */
145 extern void nouveau_preclose(drm_device_t * dev, DRMFILE filp);
146 extern int nouveau_load(struct drm_device *dev, unsigned long flags);
147 extern int nouveau_firstopen(struct drm_device *dev);
148 extern int nouveau_unload(struct drm_device *dev);
149 extern int nouveau_ioctl_getparam(DRM_IOCTL_ARGS);
150 extern int nouveau_ioctl_setparam(DRM_IOCTL_ARGS);
151 extern void nouveau_wait_for_idle(struct drm_device *dev);
154 extern uint64_t nouveau_mem_fb_amount(struct drm_device *dev);
155 extern void nouveau_mem_release(DRMFILE filp, struct mem_block *heap);
156 extern int nouveau_ioctl_mem_alloc(DRM_IOCTL_ARGS);
157 extern int nouveau_ioctl_mem_free(DRM_IOCTL_ARGS);
158 extern struct mem_block* nouveau_mem_alloc(struct drm_device *dev, int alignment, uint64_t size, int flags, DRMFILE filp);
159 extern void nouveau_mem_free(struct drm_device* dev, struct mem_block*);
160 extern int nouveau_mem_init(struct drm_device *dev);
161 extern void nouveau_mem_close(struct drm_device *dev);
162 extern int nouveau_instmem_init(struct drm_device *dev,
163 uint32_t offset, uint32_t size);
164 extern struct mem_block* nouveau_instmem_alloc(struct drm_device *dev,
165 uint32_t size, uint32_t align);
166 extern void nouveau_instmem_free(struct drm_device *dev,
167 struct mem_block *block);
170 extern int nouveau_fifo_init(drm_device_t *dev);
171 extern int nouveau_fifo_number(drm_device_t *dev);
172 extern void nouveau_fifo_cleanup(drm_device_t *dev, DRMFILE filp);
173 extern int nouveau_fifo_id_get(drm_device_t *dev, DRMFILE filp);
174 extern void nouveau_fifo_free(drm_device_t *dev, int channel);
176 /* nouveau_object.c */
177 extern void nouveau_object_cleanup(drm_device_t *dev, DRMFILE filp);
178 extern struct nouveau_object *nouveau_dma_object_create(drm_device_t *dev,
179 uint32_t offset, uint32_t size, int access, uint32_t target);
180 extern int nouveau_ioctl_object_init(DRM_IOCTL_ARGS);
181 extern int nouveau_ioctl_dma_object_init(DRM_IOCTL_ARGS);
182 extern uint32_t nouveau_chip_instance_get(drm_device_t *dev, struct mem_block *mem);
185 extern irqreturn_t nouveau_irq_handler(DRM_IRQ_ARGS);
186 extern void nouveau_irq_preinstall(drm_device_t*);
187 extern void nouveau_irq_postinstall(drm_device_t*);
188 extern void nouveau_irq_uninstall(drm_device_t*);
191 extern int nv40_graph_init(drm_device_t *dev);
192 extern int nv40_graph_context_create(drm_device_t *dev, int channel);
193 extern void nv40_graph_context_save_current(drm_device_t *dev);
194 extern void nv40_graph_context_restore(drm_device_t *dev, int channel);
196 extern long nouveau_compat_ioctl(struct file *filp, unsigned int cmd,
199 #if defined(__powerpc__)
200 #define NV_READ(reg) in_be32((void __iomem *)(dev_priv->mmio)->handle + (reg) )
201 #define NV_WRITE(reg,val) out_be32((void __iomem *)(dev_priv->mmio)->handle + (reg) , (val) )
203 #define NV_READ(reg) DRM_READ32( dev_priv->mmio, (reg) )
204 #define NV_WRITE(reg,val) DRM_WRITE32( dev_priv->mmio, (reg), (val) )
207 #define INSTANCE_WR(mem,ofs,val) NV_WRITE(NV_RAMIN+(uint32_t)(mem)->start+((ofs)<<2),(val))
208 #define INSTANCE_RD(mem,ofs) NV_READ(NV_RAMIN+(uint32_t)(mem)->start+((ofs)<<2))
210 #endif /* __NOUVEAU_DRV_H__ */