2 * Copyright 2005 Stephane Marchesin.
5 * Permission is hereby granted, free of charge, to any person obtaining a
6 * copy of this software and associated documentation files (the "Software"),
7 * to deal in the Software without restriction, including without limitation
8 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
9 * and/or sell copies of the Software, and to permit persons to whom the
10 * Software is furnished to do so, subject to the following conditions:
12 * The above copyright notice and this permission notice (including the next
13 * paragraph) shall be included in all copies or substantial portions of the
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
19 * VA LINUX SYSTEMS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
20 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
21 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
22 * OTHER DEALINGS IN THE SOFTWARE.
25 #ifndef __NOUVEAU_DRM_H__
26 #define __NOUVEAU_DRM_H__
28 #define NOUVEAU_DRM_HEADER_PATCHLEVEL 11
30 struct drm_nouveau_channel_alloc {
31 uint32_t fb_ctxdma_handle;
32 uint32_t tt_ctxdma_handle;
36 /* FIFO control regs */
39 /* DMA command buffer */
43 drm_handle_t notifier;
47 struct drm_nouveau_channel_free {
51 struct drm_nouveau_grobj_alloc {
57 #define NOUVEAU_MEM_ACCESS_RO 1
58 #define NOUVEAU_MEM_ACCESS_WO 2
59 #define NOUVEAU_MEM_ACCESS_RW 3
60 struct drm_nouveau_notifierobj_alloc {
68 struct drm_nouveau_gpuobj_free {
73 #define NOUVEAU_MEM_FB 0x00000001
74 #define NOUVEAU_MEM_AGP 0x00000002
75 #define NOUVEAU_MEM_FB_ACCEPTABLE 0x00000004
76 #define NOUVEAU_MEM_AGP_ACCEPTABLE 0x00000008
77 #define NOUVEAU_MEM_PCI 0x00000010
78 #define NOUVEAU_MEM_PCI_ACCEPTABLE 0x00000020
79 #define NOUVEAU_MEM_PINNED 0x00000040
80 #define NOUVEAU_MEM_USER_BACKED 0x00000080
81 #define NOUVEAU_MEM_MAPPED 0x00000100
82 #define NOUVEAU_MEM_INSTANCE 0x00000200 /* internal */
83 #define NOUVEAU_MEM_NOTIFIER 0x00000400 /* internal */
85 struct drm_nouveau_mem_alloc {
88 uint64_t size; // in bytes
90 drm_handle_t map_handle;
93 struct drm_nouveau_mem_free {
98 /* FIXME : maybe unify {GET,SET}PARAMs */
99 #define NOUVEAU_GETPARAM_PCI_VENDOR 3
100 #define NOUVEAU_GETPARAM_PCI_DEVICE 4
101 #define NOUVEAU_GETPARAM_BUS_TYPE 5
102 #define NOUVEAU_GETPARAM_FB_PHYSICAL 6
103 #define NOUVEAU_GETPARAM_AGP_PHYSICAL 7
104 #define NOUVEAU_GETPARAM_FB_SIZE 8
105 #define NOUVEAU_GETPARAM_AGP_SIZE 9
106 #define NOUVEAU_GETPARAM_PCI_PHYSICAL 10
107 #define NOUVEAU_GETPARAM_CHIPSET_ID 11
108 struct drm_nouveau_getparam {
113 #define NOUVEAU_SETPARAM_CMDBUF_LOCATION 1
114 #define NOUVEAU_SETPARAM_CMDBUF_SIZE 2
115 struct drm_nouveau_setparam {
120 struct drm_nouveau_bo_validate {
123 enum nouveau_card_type {
138 enum nouveau_bus_type {
144 #define NOUVEAU_MAX_SAREA_CLIPRECTS 16
146 struct drm_nouveau_sarea {
148 struct drm_clip_rect boxes[NOUVEAU_MAX_SAREA_CLIPRECTS];
152 #define DRM_NOUVEAU_CARD_INIT 0x00
153 #define DRM_NOUVEAU_GETPARAM 0x01
154 #define DRM_NOUVEAU_SETPARAM 0x02
155 #define DRM_NOUVEAU_CHANNEL_ALLOC 0x03
156 #define DRM_NOUVEAU_CHANNEL_FREE 0x04
157 #define DRM_NOUVEAU_GROBJ_ALLOC 0x05
158 #define DRM_NOUVEAU_NOTIFIEROBJ_ALLOC 0x06
159 #define DRM_NOUVEAU_GPUOBJ_FREE 0x07
160 #define DRM_NOUVEAU_MEM_ALLOC 0x08
161 #define DRM_NOUVEAU_MEM_FREE 0x09
162 #define DRM_NOUVEAU_BO_VALIDATE 0x0a
164 #endif /* __NOUVEAU_DRM_H__ */