shared-core/mga_warp.c

   1 /* mga_warp.c -- Matrox G200/G400 WARP engine management -*- linux-c -*-
   2  * Created: Thu Jan 11 21:29:32 2001 by gareth@valinux.com
   3  *
   4  * Copyright 2000 VA Linux Systems, Inc., Sunnyvale, California.
   5  * All Rights Reserved.
   6  *
   7  * Permission is hereby granted, free of charge, to any person obtaining a
   8  * copy of this software and associated documentation files (the "Software"),
   9  * to deal in the Software without restriction, including without limitation
  10  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
  11  * and/or sell copies of the Software, and to permit persons to whom the
  12  * Software is furnished to do so, subject to the following conditions:
  13  *
  14  * The above copyright notice and this permission notice (including the next
  15  * paragraph) shall be included in all copies or substantial portions of the
  16  * Software.
  17  *
  18  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  19  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  20  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  21  * VA LINUX SYSTEMS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
  22  * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
  23  * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
  24  * OTHER DEALINGS IN THE SOFTWARE.
  25  *
  26  * Authors:
  27  *    Gareth Hughes <gareth@valinux.com>
  28  */
  29
  30 #include "drmP.h"
  31 #include "drm.h"
  32 #include "mga_drm.h"
  33 #include "mga_drv.h"
  34 #include "mga_ucode.h"
  35
  36 #define MGA_WARP_CODE_ALIGN             256     /* in bytes */
  37
  38 #define WARP_UCODE_SIZE( which )                                        \
  39         ((sizeof(which) / MGA_WARP_CODE_ALIGN + 1) * MGA_WARP_CODE_ALIGN)
  40
  41 #define WARP_UCODE_INSTALL( which, where )                              \
  42 do {                                                                    \
  43         DRM_DEBUG( " pcbase = 0x%08lx  vcbase = %p\n", pcbase, vcbase );\
  44         dev_priv->warp_pipe_phys[where] = pcbase;                       \
  45         memcpy( vcbase, which, sizeof(which) );                         \
  46         pcbase += WARP_UCODE_SIZE( which );                             \
  47         vcbase += WARP_UCODE_SIZE( which );                             \
  48 } while (0)
  49
  50 static const unsigned int mga_warp_g400_microcode_size =
  51                (WARP_UCODE_SIZE(warp_g400_tgz) +
  52                 WARP_UCODE_SIZE(warp_g400_tgza) +
  53                 WARP_UCODE_SIZE(warp_g400_tgzaf) +
  54                 WARP_UCODE_SIZE(warp_g400_tgzf) +
  55                 WARP_UCODE_SIZE(warp_g400_tgzs) +
  56                 WARP_UCODE_SIZE(warp_g400_tgzsa) +
  57                 WARP_UCODE_SIZE(warp_g400_tgzsaf) +
  58                 WARP_UCODE_SIZE(warp_g400_tgzsf) +
  59                 WARP_UCODE_SIZE(warp_g400_t2gz) +
  60                 WARP_UCODE_SIZE(warp_g400_t2gza) +
  61                 WARP_UCODE_SIZE(warp_g400_t2gzaf) +
  62                 WARP_UCODE_SIZE(warp_g400_t2gzf) +
  63                 WARP_UCODE_SIZE(warp_g400_t2gzs) +
  64                 WARP_UCODE_SIZE(warp_g400_t2gzsa) +
  65                 WARP_UCODE_SIZE(warp_g400_t2gzsaf) +
  66                 WARP_UCODE_SIZE(warp_g400_t2gzsf));
  67
  68 static const unsigned int mga_warp_g200_microcode_size =
  69                (WARP_UCODE_SIZE(warp_g200_tgz) +
  70                 WARP_UCODE_SIZE(warp_g200_tgza) +
  71                 WARP_UCODE_SIZE(warp_g200_tgzaf) +
  72                 WARP_UCODE_SIZE(warp_g200_tgzf) +
  73                 WARP_UCODE_SIZE(warp_g200_tgzs) +
  74                 WARP_UCODE_SIZE(warp_g200_tgzsa) +
  75                 WARP_UCODE_SIZE(warp_g200_tgzsaf) +
  76                 WARP_UCODE_SIZE(warp_g200_tgzsf));
  77
  78
  79 unsigned int mga_warp_microcode_size(const drm_mga_private_t * dev_priv)
  80 {
  81         switch (dev_priv->chipset) {
  82         case MGA_CARD_TYPE_G400:
  83         case MGA_CARD_TYPE_G550:
  84                 return PAGE_ALIGN(mga_warp_g400_microcode_size);
  85         case MGA_CARD_TYPE_G200:
  86                 return PAGE_ALIGN(mga_warp_g200_microcode_size);
  87         default:
  88                 DRM_ERROR("Unknown chipset value: 0x%x\n", dev_priv->chipset);
  89                 return 0;
  90         }
  91 }
  92
  93 static int mga_warp_install_g400_microcode(drm_mga_private_t * dev_priv)
  94 {
  95         unsigned char *vcbase = dev_priv->warp->handle;
  96         unsigned long pcbase = dev_priv->warp->offset;
  97
  98         memset(dev_priv->warp_pipe_phys, 0, sizeof(dev_priv->warp_pipe_phys));
  99
 100         WARP_UCODE_INSTALL(warp_g400_tgz, MGA_WARP_TGZ);
 101         WARP_UCODE_INSTALL(warp_g400_tgzf, MGA_WARP_TGZF);
 102         WARP_UCODE_INSTALL(warp_g400_tgza, MGA_WARP_TGZA);
 103         WARP_UCODE_INSTALL(warp_g400_tgzaf, MGA_WARP_TGZAF);
 104         WARP_UCODE_INSTALL(warp_g400_tgzs, MGA_WARP_TGZS);
 105         WARP_UCODE_INSTALL(warp_g400_tgzsf, MGA_WARP_TGZSF);
 106         WARP_UCODE_INSTALL(warp_g400_tgzsa, MGA_WARP_TGZSA);
 107         WARP_UCODE_INSTALL(warp_g400_tgzsaf, MGA_WARP_TGZSAF);
 108
 109         WARP_UCODE_INSTALL(warp_g400_t2gz, MGA_WARP_T2GZ);
 110         WARP_UCODE_INSTALL(warp_g400_t2gzf, MGA_WARP_T2GZF);
 111         WARP_UCODE_INSTALL(warp_g400_t2gza, MGA_WARP_T2GZA);
 112         WARP_UCODE_INSTALL(warp_g400_t2gzaf, MGA_WARP_T2GZAF);
 113         WARP_UCODE_INSTALL(warp_g400_t2gzs, MGA_WARP_T2GZS);
 114         WARP_UCODE_INSTALL(warp_g400_t2gzsf, MGA_WARP_T2GZSF);
 115         WARP_UCODE_INSTALL(warp_g400_t2gzsa, MGA_WARP_T2GZSA);
 116         WARP_UCODE_INSTALL(warp_g400_t2gzsaf, MGA_WARP_T2GZSAF);
 117
 118         return 0;
 119 }
 120
 121 static int mga_warp_install_g200_microcode(drm_mga_private_t * dev_priv)
 122 {
 123         unsigned char *vcbase = dev_priv->warp->handle;
 124         unsigned long pcbase = dev_priv->warp->offset;
 125
 126         memset(dev_priv->warp_pipe_phys, 0, sizeof(dev_priv->warp_pipe_phys));
 127
 128         WARP_UCODE_INSTALL(warp_g200_tgz, MGA_WARP_TGZ);
 129         WARP_UCODE_INSTALL(warp_g200_tgzf, MGA_WARP_TGZF);
 130         WARP_UCODE_INSTALL(warp_g200_tgza, MGA_WARP_TGZA);
 131         WARP_UCODE_INSTALL(warp_g200_tgzaf, MGA_WARP_TGZAF);
 132         WARP_UCODE_INSTALL(warp_g200_tgzs, MGA_WARP_TGZS);
 133         WARP_UCODE_INSTALL(warp_g200_tgzsf, MGA_WARP_TGZSF);
 134         WARP_UCODE_INSTALL(warp_g200_tgzsa, MGA_WARP_TGZSA);
 135         WARP_UCODE_INSTALL(warp_g200_tgzsaf, MGA_WARP_TGZSAF);
 136
 137         return 0;
 138 }
 139
 140 int mga_warp_install_microcode(drm_mga_private_t * dev_priv)
 141 {
 142         const unsigned int size = mga_warp_microcode_size(dev_priv);
 143
 144         DRM_DEBUG("MGA ucode size = %d bytes\n", size);
 145         if (size > dev_priv->warp->size) {
 146                 DRM_ERROR("microcode too large! (%u > %lu)\n",
 147                           size, dev_priv->warp->size);
 148                 return DRM_ERR(ENOMEM);
 149         }
 150
 151         switch (dev_priv->chipset) {
 152         case MGA_CARD_TYPE_G400:
 153         case MGA_CARD_TYPE_G550:
 154                 return mga_warp_install_g400_microcode(dev_priv);
 155         case MGA_CARD_TYPE_G200:
 156                 return mga_warp_install_g200_microcode(dev_priv);
 157         default:
 158                 return DRM_ERR(EINVAL);
 159         }
 160 }
 161
 162 #define WMISC_EXPECTED          (MGA_WUCODECACHE_ENABLE | MGA_WMASTER_ENABLE)
 163
 164 int mga_warp_init(drm_mga_private_t * dev_priv)
 165 {
 166         u32 wmisc;
 167
 168         /* FIXME: Get rid of these damned magic numbers...
 169          */
 170         switch (dev_priv->chipset) {
 171         case MGA_CARD_TYPE_G400:
 172         case MGA_CARD_TYPE_G550:
 173                 MGA_WRITE(MGA_WIADDR2, MGA_WMODE_SUSPEND);
 174                 MGA_WRITE(MGA_WGETMSB, 0x00000E00);
 175                 MGA_WRITE(MGA_WVRTXSZ, 0x00001807);
 176                 MGA_WRITE(MGA_WACCEPTSEQ, 0x18000000);
 177                 break;
 178         case MGA_CARD_TYPE_G200:
 179                 MGA_WRITE(MGA_WIADDR, MGA_WMODE_SUSPEND);
 180                 MGA_WRITE(MGA_WGETMSB, 0x1606);
 181                 MGA_WRITE(MGA_WVRTXSZ, 7);
 182                 break;
 183         default:
 184                 return DRM_ERR(EINVAL);
 185         }
 186
 187         MGA_WRITE(MGA_WMISC, (MGA_WUCODECACHE_ENABLE |
 188                               MGA_WMASTER_ENABLE | MGA_WCACHEFLUSH_ENABLE));
 189         wmisc = MGA_READ(MGA_WMISC);
 190         if (wmisc != WMISC_EXPECTED) {
 191                 DRM_ERROR("WARP engine config failed! 0x%x != 0x%x\n",
 192                           wmisc, WMISC_EXPECTED);
 193                 return DRM_ERR(EINVAL);
 194         }
 195
 196         return 0;
 197 }