shared-core/i915_init.c

   1 /*
   2  * Copyright (c) 2007 Intel Corporation
   3  *   Jesse Barnes <jesse.barnes@intel.com>
   4  *
   5  * Copyright © 2002, 2003 David Dawes <dawes@xfree86.org>
   6  *                   2004 Sylvain Meyer
   7  *
   8  * GPL/BSD dual license
   9  */
  10 #include "drmP.h"
  11 #include "drm.h"
  12 #include "drm_sarea.h"
  13 #include "i915_drm.h"
  14 #include "i915_drv.h"
  15 #include "intel_bios.h"
  16 #include "intel_drv.h"
  17
  18 /**
  19  * i915_probe_agp - get AGP bootup configuration
  20  * @pdev: PCI device
  21  * @aperture_size: returns AGP aperture configured size
  22  * @preallocated_size: returns size of BIOS preallocated AGP space
  23  *
  24  * Since Intel integrated graphics are UMA, the BIOS has to set aside
  25  * some RAM for the framebuffer at early boot.  This code figures out
  26  * how much was set aside so we can use it for our own purposes.
  27  */
  28 int i915_probe_agp(struct pci_dev *pdev, unsigned long *aperture_size,
  29                    unsigned long *preallocated_size)
  30 {
  31         struct pci_dev *bridge_dev;
  32         u16 tmp = 0;
  33         unsigned long overhead;
  34
  35         bridge_dev = pci_get_bus_and_slot(0, PCI_DEVFN(0,0));
  36         if (!bridge_dev) {
  37                 DRM_ERROR("bridge device not found\n");
  38                 return -1;
  39         }
  40
  41         /* Get the fb aperture size and "stolen" memory amount. */
  42         pci_read_config_word(bridge_dev, INTEL_GMCH_CTRL, &tmp);
  43         pci_dev_put(bridge_dev);
  44
  45         *aperture_size = 1024 * 1024;
  46         *preallocated_size = 1024 * 1024;
  47
  48         switch (pdev->device) {
  49         case PCI_DEVICE_ID_INTEL_82830_CGC:
  50         case PCI_DEVICE_ID_INTEL_82845G_IG:
  51         case PCI_DEVICE_ID_INTEL_82855GM_IG:
  52         case PCI_DEVICE_ID_INTEL_82865_IG:
  53                 if ((tmp & INTEL_GMCH_MEM_MASK) == INTEL_GMCH_MEM_64M)
  54                         *aperture_size *= 64;
  55                 else
  56                         *aperture_size *= 128;
  57                 break;
  58         default:
  59                 /* 9xx supports large sizes, just look at the length */
  60                 *aperture_size = pci_resource_len(pdev, 2);
  61                 break;
  62         }
  63
  64         /*
  65          * Some of the preallocated space is taken by the GTT
  66          * and popup.  GTT is 1K per MB of aperture size, and popup is 4K.
  67          */
  68         overhead = (*aperture_size / 1024) + 4096;
  69         switch (tmp & INTEL_855_GMCH_GMS_MASK) {
  70         case INTEL_855_GMCH_GMS_STOLEN_1M:
  71                 break; /* 1M already */
  72         case INTEL_855_GMCH_GMS_STOLEN_4M:
  73                 *preallocated_size *= 4;
  74                 break;
  75         case INTEL_855_GMCH_GMS_STOLEN_8M:
  76                 *preallocated_size *= 8;
  77                 break;
  78         case INTEL_855_GMCH_GMS_STOLEN_16M:
  79                 *preallocated_size *= 16;
  80                 break;
  81         case INTEL_855_GMCH_GMS_STOLEN_32M:
  82                 *preallocated_size *= 32;
  83                 break;
  84         case INTEL_915G_GMCH_GMS_STOLEN_48M:
  85                 *preallocated_size *= 48;
  86                 break;
  87         case INTEL_915G_GMCH_GMS_STOLEN_64M:
  88                 *preallocated_size *= 64;
  89                 break;
  90         case INTEL_855_GMCH_GMS_DISABLED:
  91                 DRM_ERROR("video memory is disabled\n");
  92                 return -1;
  93         default:
  94                 DRM_ERROR("unexpected GMCH_GMS value: 0x%02x\n",
  95                         tmp & INTEL_855_GMCH_GMS_MASK);
  96                 return -1;
  97         }
  98         *preallocated_size -= overhead;
  99
 100         return 0;
 101 }
 102
 103 static int i915_init_hwstatus(struct drm_device *dev)
 104 {
 105         struct drm_i915_private *dev_priv = dev->dev_private;
 106         struct drm_memrange_node *free_space;
 107         int ret = 0;
 108
 109         /* Program Hardware Status Page */
 110         if (!IS_G33(dev)) {
 111                 dev_priv->status_page_dmah =
 112                         drm_pci_alloc(dev, PAGE_SIZE, PAGE_SIZE, 0xffffffff);
 113
 114                 if (!dev_priv->status_page_dmah) {
 115                         DRM_ERROR("Can not allocate hardware status page\n");
 116                         ret = -ENOMEM;
 117                         goto out;
 118                 }
 119                 dev_priv->hws_vaddr = dev_priv->status_page_dmah->vaddr;
 120                 dev_priv->dma_status_page = dev_priv->status_page_dmah->busaddr;
 121
 122                 I915_WRITE(HWS_PGA, dev_priv->dma_status_page);
 123         } else {
 124                 free_space = drm_memrange_search_free(&dev_priv->vram,
 125                                                       PAGE_SIZE,
 126                                                       PAGE_SIZE, 0);
 127                 if (!free_space) {
 128                         DRM_ERROR("No free vram available, aborting\n");
 129                         ret = -ENOMEM;
 130                         goto out;
 131                 }
 132
 133                 dev_priv->hws = drm_memrange_get_block(free_space, PAGE_SIZE,
 134                                                        PAGE_SIZE);
 135                 if (!dev_priv->hws) {
 136                         DRM_ERROR("Unable to allocate or pin hw status page\n");
 137                         ret = -EINVAL;
 138                         goto out;
 139                 }
 140
 141                 dev_priv->hws_agpoffset = dev_priv->hws->start;
 142                 dev_priv->hws_map.offset = dev->agp->base +
 143                         dev_priv->hws->start;
 144                 dev_priv->hws_map.size = PAGE_SIZE;
 145                 dev_priv->hws_map.type= 0;
 146                 dev_priv->hws_map.flags= 0;
 147                 dev_priv->hws_map.mtrr = 0;
 148
 149                 drm_core_ioremap(&dev_priv->hws_map, dev);
 150                 if (dev_priv->hws_map.handle == NULL) {
 151                         dev_priv->hws_agpoffset = 0;
 152                         DRM_ERROR("can not ioremap virtual addr for"
 153                                         "G33 hw status page\n");
 154                         ret = -ENOMEM;
 155                         goto out_free;
 156                 }
 157                 dev_priv->hws_vaddr = dev_priv->hws_map.handle;
 158                 I915_WRITE(HWS_PGA, dev_priv->hws_agpoffset);
 159         }
 160
 161         memset(dev_priv->hws_vaddr, 0, PAGE_SIZE);
 162
 163         DRM_DEBUG("Enabled hardware status page\n");
 164
 165         return 0;
 166
 167 out_free:
 168         /* free hws */
 169 out:
 170         return ret;
 171 }
 172
 173 static void i915_cleanup_hwstatus(struct drm_device *dev)
 174 {
 175         struct drm_i915_private *dev_priv = dev->dev_private;
 176
 177         if (!IS_G33(dev)) {
 178                 if (dev_priv->status_page_dmah)
 179                         drm_pci_free(dev, dev_priv->status_page_dmah);
 180         } else {
 181                 if (dev_priv->hws_map.handle)
 182                         drm_core_ioremapfree(&dev_priv->hws_map, dev);
 183                 if (dev_priv->hws)
 184                         drm_memrange_put_block(dev_priv->hws);
 185         }
 186         I915_WRITE(HWS_PGA, 0x1ffff000);
 187 }
 188
 189 static int i915_load_modeset_init(struct drm_device *dev)
 190 {
 191         struct drm_i915_private *dev_priv = dev->dev_private;
 192         unsigned long agp_size, prealloc_size;
 193         int ret = 0;
 194
 195         i915_probe_agp(dev->pdev, &agp_size, &prealloc_size);
 196
 197         /* Basic memrange allocator for stolen space (aka vram) */
 198         drm_memrange_init(&dev_priv->vram, 0, prealloc_size);
 199         /* Let GEM Manage from end of prealloc space to end of aperture */
 200         i915_gem_do_init(dev, prealloc_size, agp_size);
 201
 202         ret = i915_gem_init_ringbuffer(dev);
 203         if (ret)
 204                 goto out;
 205
 206         ret = i915_init_hwstatus(dev);
 207         if (ret)
 208                 goto destroy_ringbuffer;
 209
 210         /* Allow hardware batchbuffers unless told otherwise.
 211          */
 212         dev_priv->allow_batchbuffer = 1;
 213         dev_priv->max_validate_buffers = I915_MAX_VALIDATE_BUFFERS;
 214         mutex_init(&dev_priv->cmdbuf_mutex);
 215
 216         dev_priv->wq = create_singlethread_workqueue("i915");
 217         if (dev_priv->wq == 0) {
 218                 DRM_DEBUG("Error\n");
 219                 ret = -EINVAL;
 220                 goto destroy_hws;
 221         }
 222
 223         ret = intel_init_bios(dev);
 224         if (ret) {
 225                 DRM_ERROR("failed to find VBIOS tables\n");
 226                 ret = -ENODEV;
 227                 goto destroy_wq;
 228         }
 229
 230         intel_modeset_init(dev);
 231         drm_helper_initial_config(dev, false);
 232
 233         dev->devname = kstrdup(DRIVER_NAME, GFP_KERNEL);
 234         if (!dev->devname) {
 235                 ret = -ENOMEM;
 236                 goto modeset_cleanup;
 237         }
 238
 239         ret = drm_irq_install(dev);
 240         if (ret) {
 241                 kfree(dev->devname);
 242                 goto modeset_cleanup;
 243         }
 244         return 0;
 245
 246 modeset_cleanup:
 247         intel_modeset_cleanup(dev);
 248 destroy_wq:
 249         destroy_workqueue(dev_priv->wq);
 250 destroy_hws:
 251         i915_cleanup_hwstatus(dev);
 252 destroy_ringbuffer:
 253         i915_gem_cleanup_ringbuffer(dev);
 254 out:
 255         return ret;
 256 }
 257
 258 /**
 259  * i915_driver_load - setup chip and create an initial config
 260  * @dev: DRM device
 261  * @flags: startup flags
 262  *
 263  * The driver load routine has to do several things:
 264  *   - drive output discovery via intel_modeset_init()
 265  *   - initialize the memory manager
 266  *   - allocate initial config memory
 267  *   - setup the DRM framebuffer with the allocated memory
 268  */
 269 int i915_driver_load(struct drm_device *dev, unsigned long flags)
 270 {
 271         struct drm_i915_private *dev_priv;
 272         int ret = 0, num_pipes = 2;
 273         u32 tmp;
 274
 275         dev_priv = drm_alloc(sizeof(struct drm_i915_private), DRM_MEM_DRIVER);
 276         if (dev_priv == NULL)
 277                 return -ENOMEM;
 278
 279         memset(dev_priv, 0, sizeof(struct drm_i915_private));
 280         dev->dev_private = (void *)dev_priv;
 281         dev_priv->dev = dev;
 282
 283         /* i915 has 4 more counters */
 284         dev->counters += 4;
 285         dev->types[6] = _DRM_STAT_IRQ;
 286         dev->types[7] = _DRM_STAT_PRIMARY;
 287         dev->types[8] = _DRM_STAT_SECONDARY;
 288         dev->types[9] = _DRM_STAT_DMA;
 289
 290         if (IS_MOBILE(dev) || IS_I9XX(dev))
 291                 dev_priv->cursor_needs_physical = true;
 292         else
 293                 dev_priv->cursor_needs_physical = false;
 294
 295         if (IS_I965G(dev) || IS_G33(dev))
 296                 dev_priv->cursor_needs_physical = false;
 297
 298         if (IS_I9XX(dev))
 299                 pci_read_config_dword(dev->pdev, 0x5C, &dev_priv->stolen_base);
 300
 301         if (IS_I9XX(dev)) {
 302                 dev_priv->mmiobase = drm_get_resource_start(dev, 0);
 303                 dev_priv->mmiolen = drm_get_resource_len(dev, 0);
 304                 dev->mode_config.fb_base =
 305                         drm_get_resource_start(dev, 2) & 0xff000000;
 306         } else if (drm_get_resource_start(dev, 1)) {
 307                 dev_priv->mmiobase = drm_get_resource_start(dev, 1);
 308                 dev_priv->mmiolen = drm_get_resource_len(dev, 1);
 309                 dev->mode_config.fb_base =
 310                         drm_get_resource_start(dev, 0) & 0xff000000;
 311         } else {
 312                 DRM_ERROR("Unable to find MMIO registers\n");
 313                 ret = -ENODEV;
 314                 goto free_priv;
 315         }
 316
 317         DRM_DEBUG("fb_base: 0x%08lx\n", dev->mode_config.fb_base);
 318
 319         ret = drm_addmap(dev, dev_priv->mmiobase, dev_priv->mmiolen,
 320                          _DRM_REGISTERS, _DRM_KERNEL|_DRM_READ_ONLY|_DRM_DRIVER,
 321                          &dev_priv->mmio_map);
 322         if (ret != 0) {
 323                 DRM_ERROR("Cannot add mapping for MMIO registers\n");
 324                 goto free_priv;
 325         }
 326
 327         INIT_LIST_HEAD(&dev_priv->mm.active_list);
 328         INIT_LIST_HEAD(&dev_priv->mm.flushing_list);
 329         INIT_LIST_HEAD(&dev_priv->mm.inactive_list);
 330         INIT_LIST_HEAD(&dev_priv->mm.request_list);
 331         INIT_DELAYED_WORK(&dev_priv->mm.retire_work,
 332                           i915_gem_retire_work_handler);
 333         dev_priv->mm.next_gem_seqno = 1;
 334
 335 #ifdef __linux__
 336 #if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,25)
 337         intel_init_chipset_flush_compat(dev);
 338 #endif
 339 #if LINUX_VERSION_CODE > KERNEL_VERSION(2,6,25)
 340         intel_opregion_init(dev);
 341 #endif
 342 #endif
 343
 344         tmp = I915_READ(PIPEASTAT);
 345         I915_WRITE(PIPEASTAT, tmp);
 346         tmp = I915_READ(PIPEBSTAT);
 347         I915_WRITE(PIPEBSTAT, tmp);
 348
 349         atomic_set(&dev_priv->irq_received, 0);
 350         I915_WRITE(HWSTAM, 0xeffe);
 351         I915_WRITE(IMR, 0x0);
 352         I915_WRITE(IER, 0x0);
 353
 354         DRM_SPININIT(&dev_priv->swaps_lock, "swap");
 355         INIT_LIST_HEAD(&dev_priv->vbl_swaps.head);
 356         dev_priv->swaps_pending = 0;
 357
 358         DRM_SPININIT(&dev_priv->user_irq_lock, "userirq");
 359         dev_priv->user_irq_refcount = 0;
 360         dev_priv->irq_mask_reg = ~0;
 361
 362         ret = drm_vblank_init(dev, num_pipes);
 363         if (ret)
 364                 goto out_rmmap;
 365
 366         ret = drm_hotplug_init(dev);
 367         if (ret)
 368                 goto out_rmmap;
 369
 370         dev_priv->vblank_pipe = DRM_I915_VBLANK_PIPE_A | DRM_I915_VBLANK_PIPE_B;
 371         dev->max_vblank_count = 0xffffff; /* only 24 bits of frame count */
 372
 373         i915_enable_interrupt(dev);
 374         DRM_INIT_WAITQUEUE(&dev_priv->irq_queue);
 375
 376         /*
 377          * Initialize the hardware status page IRQ location.
 378          */
 379
 380         I915_WRITE(INSTPM, (1 << 5) | (1 << 21));
 381
 382         if (drm_core_check_feature(dev, DRIVER_MODESET)) {
 383                 ret = i915_load_modeset_init(dev);
 384                 if (ret < 0) {
 385                         DRM_ERROR("failed to init modeset\n");
 386                         goto out_rmmap;
 387                 }
 388         }
 389
 390         return 0;
 391
 392 out_rmmap:
 393         drm_rmmap(dev, dev_priv->mmio_map);
 394 free_priv:
 395         drm_free(dev_priv, sizeof(struct drm_i915_private), DRM_MEM_DRIVER);
 396         return ret;
 397 }
 398
 399 int i915_driver_unload(struct drm_device *dev)
 400 {
 401         struct drm_i915_private *dev_priv = dev->dev_private;
 402
 403         u32 temp;
 404
 405         dev_priv->vblank_pipe = 0;
 406
 407         dev_priv->irq_enabled = 0;
 408
 409         I915_WRITE(HWSTAM, 0xffffffff);
 410         I915_WRITE(IMR, 0xffffffff);
 411         I915_WRITE(IER, 0x0);
 412
 413         temp = I915_READ(PIPEASTAT);
 414         I915_WRITE(PIPEASTAT, temp);
 415         temp = I915_READ(PIPEBSTAT);
 416         I915_WRITE(PIPEBSTAT, temp);
 417         temp = I915_READ(IIR);
 418         I915_WRITE(IIR, temp);
 419
 420         I915_WRITE(PRB0_CTL, 0);
 421
 422         if (drm_core_check_feature(dev, DRIVER_MODESET)) {
 423                 drm_irq_uninstall(dev);
 424                 intel_modeset_cleanup(dev);
 425                 destroy_workqueue(dev_priv->wq);
 426         }
 427
 428 #if 0
 429         if (dev_priv->ring.virtual_start) {
 430                 drm_core_ioremapfree(&dev_priv->ring.map, dev);
 431         }
 432 #endif
 433
 434 #ifdef DRI2
 435         if (dev_priv->sarea_kmap.virtual) {
 436                 drm_bo_kunmap(&dev_priv->sarea_kmap);
 437                 dev_priv->sarea_kmap.virtual = NULL;
 438                 dev->sigdata.lock = NULL;
 439         }
 440
 441         if (dev_priv->sarea_bo) {
 442                 mutex_lock(&dev->struct_mutex);
 443                 drm_bo_usage_deref_locked(&dev_priv->sarea_bo);
 444                 mutex_unlock(&dev->struct_mutex);
 445                 dev_priv->sarea_bo = NULL;
 446         }
 447 #endif
 448         i915_cleanup_hwstatus(dev);
 449
 450         if (drm_core_check_feature(dev, DRIVER_MODESET)) {
 451                 mutex_lock(&dev->struct_mutex);
 452                 i915_gem_cleanup_ringbuffer(dev);
 453                 mutex_unlock(&dev->struct_mutex);
 454                 drm_memrange_takedown(&dev_priv->vram);
 455                 i915_gem_lastclose(dev);
 456         }
 457
 458         drm_rmmap(dev, dev_priv->mmio_map);
 459
 460 #ifdef __linux__
 461 #if LINUX_VERSION_CODE > KERNEL_VERSION(2,6,25)
 462         intel_opregion_free(dev);
 463 #endif
 464 #if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,25)
 465         intel_fini_chipset_flush_compat(dev);
 466 #endif
 467 #endif
 468
 469         drm_free(dev_priv, sizeof(*dev_priv), DRM_MEM_DRIVER);
 470
 471         dev->dev_private = NULL;
 472         return 0;
 473 }
 474
 475 int i915_master_create(struct drm_device *dev, struct drm_master *master)
 476 {
 477         struct drm_i915_master_private *master_priv;
 478         unsigned long sareapage;
 479         int ret;
 480
 481         master_priv = drm_calloc(1, sizeof(*master_priv), DRM_MEM_DRIVER);
 482         if (!master_priv)
 483                 return -ENOMEM;
 484
 485         /* prebuild the SAREA */
 486         sareapage = max(SAREA_MAX, PAGE_SIZE);
 487         ret = drm_addmap(dev, 0, sareapage, _DRM_SHM, _DRM_CONTAINS_LOCK|_DRM_DRIVER,
 488                          &master_priv->sarea);
 489         if (ret) {
 490                 DRM_ERROR("SAREA setup failed\n");
 491                 return ret;
 492         }
 493         master_priv->sarea_priv = master_priv->sarea->handle + sizeof(struct drm_sarea);
 494         master_priv->sarea_priv->pf_current_page = 0;
 495
 496         master->driver_priv = master_priv;
 497         return 0;
 498 }
 499
 500 void i915_master_destroy(struct drm_device *dev, struct drm_master *master)
 501 {
 502         struct drm_i915_master_private *master_priv = master->driver_priv;
 503
 504         if (!master_priv)
 505                 return;
 506
 507         if (master_priv->sarea)
 508                 drm_rmmap(dev, master_priv->sarea);
 509
 510         drm_free(master_priv, sizeof(*master_priv), DRM_MEM_DRIVER);
 511
 512         master->driver_priv = NULL;
 513 }
 514
 515 int i915_driver_open(struct drm_device *dev, struct drm_file *file_priv)
 516 {
 517         struct drm_i915_file_private *i915_file_priv;
 518
 519         DRM_DEBUG("\n");
 520         i915_file_priv = (struct drm_i915_file_private *)
 521             drm_alloc(sizeof(*i915_file_priv), DRM_MEM_FILES);
 522
 523         if (!i915_file_priv)
 524                 return -ENOMEM;
 525
 526         file_priv->driver_priv = i915_file_priv;
 527
 528         i915_file_priv->mm.last_gem_seqno = 0;
 529         i915_file_priv->mm.last_gem_throttle_seqno = 0;
 530
 531         return 0;
 532 }
 533
 534 void i915_driver_postclose(struct drm_device *dev, struct drm_file *file_priv)
 535 {
 536         struct drm_i915_file_private *i915_file_priv = file_priv->driver_priv;
 537
 538         drm_free(i915_file_priv, sizeof(*i915_file_priv), DRM_MEM_FILES);
 539 }
 540
 541 void i915_driver_preclose(struct drm_device * dev, struct drm_file *file_priv)
 542 {
 543         struct drm_i915_private *dev_priv = dev->dev_private;
 544         if (!drm_core_check_feature(dev, DRIVER_MODESET))
 545                 i915_mem_release(dev, file_priv, dev_priv->agp_heap);
 546 }
 547
 548 void i915_driver_lastclose(struct drm_device * dev)
 549 {
 550         struct drm_i915_private *dev_priv = dev->dev_private;
 551
 552         if (drm_core_check_feature(dev, DRIVER_MODESET))
 553                 return;
 554
 555 #ifdef I915_HAVE_BUFFER
 556         if (dev_priv->val_bufs) {
 557                 vfree(dev_priv->val_bufs);
 558                 dev_priv->val_bufs = NULL;
 559         }
 560 #endif
 561
 562         i915_gem_lastclose(dev);
 563
 564         if (dev_priv->agp_heap)
 565                 i915_mem_takedown(&(dev_priv->agp_heap));
 566
 567 #if defined(DRI2)
 568         if (dev_priv->sarea_kmap.virtual) {
 569                 drm_bo_kunmap(&dev_priv->sarea_kmap);
 570                 dev_priv->sarea_kmap.virtual = NULL;
 571                 dev->control->master->lock.hw_lock = NULL;
 572                 dev->sigdata.lock = NULL;
 573         }
 574
 575         if (dev_priv->sarea_bo) {
 576                 mutex_lock(&dev->struct_mutex);
 577                 drm_bo_usage_deref_locked(&dev_priv->sarea_bo);
 578                 mutex_unlock(&dev->struct_mutex);
 579                 dev_priv->sarea_bo = NULL;
 580         }
 581 #endif
 582
 583         i915_dma_cleanup(dev);
 584 }
 585
 586 int i915_driver_firstopen(struct drm_device *dev)
 587 {
 588         if (drm_core_check_feature(dev, DRIVER_MODESET))
 589                 return 0;
 590 #if defined(I915_HAVE_BUFFER) && defined(I915_TTM)
 591         drm_bo_driver_init(dev);
 592 #endif
 593         return 0;
 594 }