shared-core/i915_dma.c

   1 /* i915_dma.c -- DMA support for the I915 -*- linux-c -*-
   2  */
   3 /*
   4  * Copyright 2003 Tungsten Graphics, Inc., Cedar Park, Texas.
   5  * All Rights Reserved.
   6  *
   7  * Permission is hereby granted, free of charge, to any person obtaining a
   8  * copy of this software and associated documentation files (the
   9  * "Software"), to deal in the Software without restriction, including
  10  * without limitation the rights to use, copy, modify, merge, publish,
  11  * distribute, sub license, and/or sell copies of the Software, and to
  12  * permit persons to whom the Software is furnished to do so, subject to
  13  * the following conditions:
  14  *
  15  * The above copyright notice and this permission notice (including the
  16  * next paragraph) shall be included in all copies or substantial portions
  17  * of the Software.
  18  *
  19  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
  20  * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
  21  * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT.
  22  * IN NO EVENT SHALL TUNGSTEN GRAPHICS AND/OR ITS SUPPLIERS BE LIABLE FOR
  23  * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
  24  * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
  25  * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  26  *
  27  */
  28
  29 #include "drmP.h"
  30 #include "drm.h"
  31 #include "i915_drm.h"
  32 #include "i915_drv.h"
  33
  34 /* Really want an OS-independent resettable timer.  Would like to have
  35  * this loop run for (eg) 3 sec, but have the timer reset every time
  36  * the head pointer changes, so that EBUSY only happens if the ring
  37  * actually stalls for (eg) 3 seconds.
  38  */
  39 int i915_wait_ring(struct drm_device * dev, int n, const char *caller)
  40 {
  41         drm_i915_private_t *dev_priv = dev->dev_private;
  42         drm_i915_ring_buffer_t *ring = &(dev_priv->ring);
  43         u32 last_head = I915_READ(LP_RING + RING_HEAD) & HEAD_ADDR;
  44         int i;
  45
  46         for (i = 0; i < 10000; i++) {
  47                 ring->head = I915_READ(LP_RING + RING_HEAD) & HEAD_ADDR;
  48                 ring->space = ring->head - (ring->tail + 8);
  49                 if (ring->space < 0)
  50                         ring->space += ring->Size;
  51                 if (ring->space >= n)
  52                         return 0;
  53
  54                 dev_priv->sarea_priv->perf_boxes |= I915_BOX_WAIT;
  55
  56                 if (ring->head != last_head)
  57                         i = 0;
  58
  59                 last_head = ring->head;
  60                 DRM_UDELAY(1);
  61         }
  62
  63         return -EBUSY;
  64 }
  65
  66 void i915_kernel_lost_context(struct drm_device * dev)
  67 {
  68         drm_i915_private_t *dev_priv = dev->dev_private;
  69         drm_i915_ring_buffer_t *ring = &(dev_priv->ring);
  70
  71         ring->head = I915_READ(LP_RING + RING_HEAD) & HEAD_ADDR;
  72         ring->tail = I915_READ(LP_RING + RING_TAIL) & TAIL_ADDR;
  73         ring->space = ring->head - (ring->tail + 8);
  74         if (ring->space < 0)
  75                 ring->space += ring->Size;
  76
  77         if (ring->head == ring->tail)
  78                 dev_priv->sarea_priv->perf_boxes |= I915_BOX_RING_EMPTY;
  79 }
  80
  81 static int i915_dma_cleanup(struct drm_device * dev)
  82 {
  83         drm_i915_private_t *dev_priv = dev->dev_private;
  84         /* Make sure interrupts are disabled here because the uninstall ioctl
  85          * may not have been called from userspace and after dev_private
  86          * is freed, it's too late.
  87          */
  88         if (dev->irq)
  89                 drm_irq_uninstall(dev);
  90
  91         if (dev_priv->ring.virtual_start) {
  92                 drm_core_ioremapfree(&dev_priv->ring.map, dev);
  93                 dev_priv->ring.virtual_start = 0;
  94                 dev_priv->ring.map.handle = 0;
  95                 dev_priv->ring.map.size = 0;
  96         }
  97
  98         if (dev_priv->status_page_dmah) {
  99                 drm_pci_free(dev, dev_priv->status_page_dmah);
 100                 dev_priv->status_page_dmah = NULL;
 101                 /* Need to rewrite hardware status page */
 102                 I915_WRITE(0x02080, 0x1ffff000);
 103         }
 104
 105         if (dev_priv->status_gfx_addr) {
 106                 dev_priv->status_gfx_addr = 0;
 107                 drm_core_ioremapfree(&dev_priv->hws_map, dev);
 108                 I915_WRITE(0x02080, 0x1ffff000);
 109         }
 110
 111         return 0;
 112 }
 113
 114 static int i915_initialize(struct drm_device * dev, drm_i915_init_t * init)
 115 {
 116         drm_i915_private_t *dev_priv = dev->dev_private;
 117
 118         dev_priv->sarea = drm_getsarea(dev);
 119         if (!dev_priv->sarea) {
 120                 DRM_ERROR("can not find sarea!\n");
 121                 i915_dma_cleanup(dev);
 122                 return -EINVAL;
 123         }
 124
 125         dev_priv->mmio_map = drm_core_findmap(dev, init->mmio_offset);
 126         if (!dev_priv->mmio_map) {
 127                 i915_dma_cleanup(dev);
 128                 DRM_ERROR("can not find mmio map!\n");
 129                 return -EINVAL;
 130         }
 131
 132 #ifdef I915_HAVE_BUFFER
 133         dev_priv->max_validate_buffers = I915_MAX_VALIDATE_BUFFERS;
 134 #endif
 135
 136         dev_priv->sarea_priv = (drm_i915_sarea_t *)
 137             ((u8 *) dev_priv->sarea->handle + init->sarea_priv_offset);
 138
 139         dev_priv->ring.Start = init->ring_start;
 140         dev_priv->ring.End = init->ring_end;
 141         dev_priv->ring.Size = init->ring_size;
 142         dev_priv->ring.tail_mask = dev_priv->ring.Size - 1;
 143
 144         dev_priv->ring.map.offset = init->ring_start;
 145         dev_priv->ring.map.size = init->ring_size;
 146         dev_priv->ring.map.type = 0;
 147         dev_priv->ring.map.flags = 0;
 148         dev_priv->ring.map.mtrr = 0;
 149
 150         drm_core_ioremap(&dev_priv->ring.map, dev);
 151
 152         if (dev_priv->ring.map.handle == NULL) {
 153                 i915_dma_cleanup(dev);
 154                 DRM_ERROR("can not ioremap virtual address for"
 155                           " ring buffer\n");
 156                 return -ENOMEM;
 157         }
 158
 159         dev_priv->ring.virtual_start = dev_priv->ring.map.handle;
 160
 161         dev_priv->cpp = init->cpp;
 162         dev_priv->sarea_priv->pf_current_page = 0;
 163
 164         /* We are using separate values as placeholders for mechanisms for
 165          * private backbuffer/depthbuffer usage.
 166          */
 167         dev_priv->use_mi_batchbuffer_start = 0;
 168
 169         /* Allow hardware batchbuffers unless told otherwise.
 170          */
 171         dev_priv->allow_batchbuffer = 1;
 172
 173         /* Enable vblank on pipe A for older X servers
 174          */
 175         dev_priv->vblank_pipe = DRM_I915_VBLANK_PIPE_A;
 176
 177         /* Program Hardware Status Page */
 178         if (!IS_G33(dev)) {
 179                 dev_priv->status_page_dmah =
 180                         drm_pci_alloc(dev, PAGE_SIZE, PAGE_SIZE, 0xffffffff);
 181
 182                 if (!dev_priv->status_page_dmah) {
 183                         i915_dma_cleanup(dev);
 184                         DRM_ERROR("Can not allocate hardware status page\n");
 185                         return -ENOMEM;
 186                 }
 187                 dev_priv->hw_status_page = dev_priv->status_page_dmah->vaddr;
 188                 dev_priv->dma_status_page = dev_priv->status_page_dmah->busaddr;
 189
 190                 memset(dev_priv->hw_status_page, 0, PAGE_SIZE);
 191
 192                 I915_WRITE(0x02080, dev_priv->dma_status_page);
 193         }
 194         DRM_DEBUG("Enabled hardware status page\n");
 195 #ifdef I915_HAVE_BUFFER
 196         mutex_init(&dev_priv->cmdbuf_mutex);
 197 #endif
 198         return 0;
 199 }
 200
 201 static int i915_dma_resume(struct drm_device * dev)
 202 {
 203         drm_i915_private_t *dev_priv = (drm_i915_private_t *) dev->dev_private;
 204
 205         DRM_DEBUG("%s\n", __FUNCTION__);
 206
 207         if (!dev_priv->sarea) {
 208                 DRM_ERROR("can not find sarea!\n");
 209                 return -EINVAL;
 210         }
 211
 212         if (!dev_priv->mmio_map) {
 213                 DRM_ERROR("can not find mmio map!\n");
 214                 return -EINVAL;
 215         }
 216
 217         if (dev_priv->ring.map.handle == NULL) {
 218                 DRM_ERROR("can not ioremap virtual address for"
 219                           " ring buffer\n");
 220                 return -ENOMEM;
 221         }
 222
 223         /* Program Hardware Status Page */
 224         if (!dev_priv->hw_status_page) {
 225                 DRM_ERROR("Can not find hardware status page\n");
 226                 return -EINVAL;
 227         }
 228         DRM_DEBUG("hw status page @ %p\n", dev_priv->hw_status_page);
 229
 230         if (dev_priv->status_gfx_addr != 0)
 231                 I915_WRITE(0x02080, dev_priv->status_gfx_addr);
 232         else
 233                 I915_WRITE(0x02080, dev_priv->dma_status_page);
 234         DRM_DEBUG("Enabled hardware status page\n");
 235
 236         return 0;
 237 }
 238
 239 static int i915_dma_init(struct drm_device *dev, void *data,
 240                          struct drm_file *file_priv)
 241 {
 242         drm_i915_init_t *init = data;
 243         int retcode = 0;
 244
 245         switch (init->func) {
 246         case I915_INIT_DMA:
 247                 retcode = i915_initialize(dev, init);
 248                 break;
 249         case I915_CLEANUP_DMA:
 250                 retcode = i915_dma_cleanup(dev);
 251                 break;
 252         case I915_RESUME_DMA:
 253                 retcode = i915_dma_resume(dev);
 254                 break;
 255         default:
 256                 retcode = -EINVAL;
 257                 break;
 258         }
 259
 260         return retcode;
 261 }
 262
 263 /* Implement basically the same security restrictions as hardware does
 264  * for MI_BATCH_NON_SECURE.  These can be made stricter at any time.
 265  *
 266  * Most of the calculations below involve calculating the size of a
 267  * particular instruction.  It's important to get the size right as
 268  * that tells us where the next instruction to check is.  Any illegal
 269  * instruction detected will be given a size of zero, which is a
 270  * signal to abort the rest of the buffer.
 271  */
 272 static int do_validate_cmd(int cmd)
 273 {
 274         switch (((cmd >> 29) & 0x7)) {
 275         case 0x0:
 276                 switch ((cmd >> 23) & 0x3f) {
 277                 case 0x0:
 278                         return 1;       /* MI_NOOP */
 279                 case 0x4:
 280                         return 1;       /* MI_FLUSH */
 281                 default:
 282                         return 0;       /* disallow everything else */
 283                 }
 284                 break;
 285         case 0x1:
 286                 return 0;       /* reserved */
 287         case 0x2:
 288                 return (cmd & 0xff) + 2;        /* 2d commands */
 289         case 0x3:
 290                 if (((cmd >> 24) & 0x1f) <= 0x18)
 291                         return 1;
 292
 293                 switch ((cmd >> 24) & 0x1f) {
 294                 case 0x1c:
 295                         return 1;
 296                 case 0x1d:
 297                         switch ((cmd >> 16) & 0xff) {
 298                         case 0x3:
 299                                 return (cmd & 0x1f) + 2;
 300                         case 0x4:
 301                                 return (cmd & 0xf) + 2;
 302                         default:
 303                                 return (cmd & 0xffff) + 2;
 304                         }
 305                 case 0x1e:
 306                         if (cmd & (1 << 23))
 307                                 return (cmd & 0xffff) + 1;
 308                         else
 309                                 return 1;
 310                 case 0x1f:
 311                         if ((cmd & (1 << 23)) == 0)     /* inline vertices */
 312                                 return (cmd & 0x1ffff) + 2;
 313                         else if (cmd & (1 << 17))       /* indirect random */
 314                                 if ((cmd & 0xffff) == 0)
 315                                         return 0;       /* unknown length, too hard */
 316                                 else
 317                                         return (((cmd & 0xffff) + 1) / 2) + 1;
 318                         else
 319                                 return 2;       /* indirect sequential */
 320                 default:
 321                         return 0;
 322                 }
 323         default:
 324                 return 0;
 325         }
 326
 327         return 0;
 328 }
 329
 330 static int validate_cmd(int cmd)
 331 {
 332         int ret = do_validate_cmd(cmd);
 333
 334 /*      printk("validate_cmd( %x ): %d\n", cmd, ret); */
 335
 336         return ret;
 337 }
 338
 339 static int i915_emit_cmds(struct drm_device * dev, int __user * buffer,
 340                           int dwords)
 341 {
 342         drm_i915_private_t *dev_priv = dev->dev_private;
 343         int i;
 344         RING_LOCALS;
 345
 346         if ((dwords+1) * sizeof(int) >= dev_priv->ring.Size - 8)
 347                 return -EINVAL;
 348
 349         BEGIN_LP_RING((dwords+1)&~1);
 350
 351         for (i = 0; i < dwords;) {
 352                 int cmd, sz;
 353
 354                 if (DRM_COPY_FROM_USER_UNCHECKED(&cmd, &buffer[i], sizeof(cmd)))
 355                         return -EINVAL;
 356
 357                 if ((sz = validate_cmd(cmd)) == 0 || i + sz > dwords)
 358                         return -EINVAL;
 359
 360                 OUT_RING(cmd);
 361
 362                 while (++i, --sz) {
 363                         if (DRM_COPY_FROM_USER_UNCHECKED(&cmd, &buffer[i],
 364                                                          sizeof(cmd))) {
 365                                 return -EINVAL;
 366                         }
 367                         OUT_RING(cmd);
 368                 }
 369         }
 370
 371         if (dwords & 1)
 372                 OUT_RING(0);
 373
 374         ADVANCE_LP_RING();
 375
 376         return 0;
 377 }
 378
 379 static int i915_emit_box(struct drm_device * dev,
 380                          struct drm_clip_rect __user * boxes,
 381                          int i, int DR1, int DR4)
 382 {
 383         drm_i915_private_t *dev_priv = dev->dev_private;
 384         struct drm_clip_rect box;
 385         RING_LOCALS;
 386
 387         if (DRM_COPY_FROM_USER_UNCHECKED(&box, &boxes[i], sizeof(box))) {
 388                 return -EFAULT;
 389         }
 390
 391         if (box.y2 <= box.y1 || box.x2 <= box.x1 || box.y2 <= 0 || box.x2 <= 0) {
 392                 DRM_ERROR("Bad box %d,%d..%d,%d\n",
 393                           box.x1, box.y1, box.x2, box.y2);
 394                 return -EINVAL;
 395         }
 396
 397         if (IS_I965G(dev)) {
 398                 BEGIN_LP_RING(4);
 399                 OUT_RING(GFX_OP_DRAWRECT_INFO_I965);
 400                 OUT_RING((box.x1 & 0xffff) | (box.y1 << 16));
 401                 OUT_RING(((box.x2 - 1) & 0xffff) | ((box.y2 - 1) << 16));
 402                 OUT_RING(DR4);
 403                 ADVANCE_LP_RING();
 404         } else {
 405                 BEGIN_LP_RING(6);
 406                 OUT_RING(GFX_OP_DRAWRECT_INFO);
 407                 OUT_RING(DR1);
 408                 OUT_RING((box.x1 & 0xffff) | (box.y1 << 16));
 409                 OUT_RING(((box.x2 - 1) & 0xffff) | ((box.y2 - 1) << 16));
 410                 OUT_RING(DR4);
 411                 OUT_RING(0);
 412                 ADVANCE_LP_RING();
 413         }
 414
 415         return 0;
 416 }
 417
 418 /* XXX: Emitting the counter should really be moved to part of the IRQ
 419  * emit.  For now, do it in both places:
 420  */
 421
 422 void i915_emit_breadcrumb(struct drm_device *dev)
 423 {
 424         drm_i915_private_t *dev_priv = dev->dev_private;
 425         RING_LOCALS;
 426
 427         if (++dev_priv->counter > BREADCRUMB_MASK) {
 428                  dev_priv->counter = 1;
 429                  DRM_DEBUG("Breadcrumb counter wrapped around\n");
 430         }
 431
 432         dev_priv->sarea_priv->last_enqueue = dev_priv->counter;
 433
 434         BEGIN_LP_RING(4);
 435         OUT_RING(CMD_STORE_DWORD_IDX);
 436         OUT_RING(20);
 437         OUT_RING(dev_priv->counter);
 438         OUT_RING(0);
 439         ADVANCE_LP_RING();
 440 }
 441
 442
 443 int i915_emit_mi_flush(struct drm_device *dev, uint32_t flush)
 444 {
 445         drm_i915_private_t *dev_priv = dev->dev_private;
 446         uint32_t flush_cmd = CMD_MI_FLUSH;
 447         RING_LOCALS;
 448
 449         flush_cmd |= flush;
 450
 451         i915_kernel_lost_context(dev);
 452
 453         BEGIN_LP_RING(4);
 454         OUT_RING(flush_cmd);
 455         OUT_RING(0);
 456         OUT_RING(0);
 457         OUT_RING(0);
 458         ADVANCE_LP_RING();
 459
 460         return 0;
 461 }
 462
 463
 464 static int i915_dispatch_cmdbuffer(struct drm_device * dev,
 465                                    drm_i915_cmdbuffer_t * cmd)
 466 {
 467 #ifdef I915_HAVE_FENCE
 468         drm_i915_private_t *dev_priv = dev->dev_private;
 469 #endif
 470         int nbox = cmd->num_cliprects;
 471         int i = 0, count, ret;
 472
 473         if (cmd->sz & 0x3) {
 474                 DRM_ERROR("alignment\n");
 475                 return -EINVAL;
 476         }
 477
 478         i915_kernel_lost_context(dev);
 479
 480         count = nbox ? nbox : 1;
 481
 482         for (i = 0; i < count; i++) {
 483                 if (i < nbox) {
 484                         ret = i915_emit_box(dev, cmd->cliprects, i,
 485                                             cmd->DR1, cmd->DR4);
 486                         if (ret)
 487                                 return ret;
 488                 }
 489
 490                 ret = i915_emit_cmds(dev, (int __user *)cmd->buf, cmd->sz / 4);
 491                 if (ret)
 492                         return ret;
 493         }
 494
 495         i915_emit_breadcrumb( dev );
 496 #ifdef I915_HAVE_FENCE
 497         drm_fence_flush_old(dev, 0, dev_priv->counter);
 498 #endif
 499         return 0;
 500 }
 501
 502 static int i915_dispatch_batchbuffer(struct drm_device * dev,
 503                                      drm_i915_batchbuffer_t * batch)
 504 {
 505         drm_i915_private_t *dev_priv = dev->dev_private;
 506         struct drm_clip_rect __user *boxes = batch->cliprects;
 507         int nbox = batch->num_cliprects;
 508         int i = 0, count;
 509         RING_LOCALS;
 510
 511         if ((batch->start | batch->used) & 0x7) {
 512                 DRM_ERROR("alignment\n");
 513                 return -EINVAL;
 514         }
 515
 516         i915_kernel_lost_context(dev);
 517
 518         count = nbox ? nbox : 1;
 519
 520         for (i = 0; i < count; i++) {
 521                 if (i < nbox) {
 522                         int ret = i915_emit_box(dev, boxes, i,
 523                                                 batch->DR1, batch->DR4);
 524                         if (ret)
 525                                 return ret;
 526                 }
 527
 528                 if (dev_priv->use_mi_batchbuffer_start) {
 529                         BEGIN_LP_RING(2);
 530                         if (IS_I965G(dev)) {
 531                                 OUT_RING(MI_BATCH_BUFFER_START | (2 << 6) | MI_BATCH_NON_SECURE_I965);
 532                                 OUT_RING(batch->start);
 533                         } else {
 534                                 OUT_RING(MI_BATCH_BUFFER_START | (2 << 6));
 535                                 OUT_RING(batch->start | MI_BATCH_NON_SECURE);
 536                         }
 537                         ADVANCE_LP_RING();
 538
 539                 } else {
 540                         BEGIN_LP_RING(4);
 541                         OUT_RING(MI_BATCH_BUFFER);
 542                         OUT_RING(batch->start | MI_BATCH_NON_SECURE);
 543                         OUT_RING(batch->start + batch->used - 4);
 544                         OUT_RING(0);
 545                         ADVANCE_LP_RING();
 546                 }
 547         }
 548
 549         i915_emit_breadcrumb( dev );
 550 #ifdef I915_HAVE_FENCE
 551         drm_fence_flush_old(dev, 0, dev_priv->counter);
 552 #endif
 553         return 0;
 554 }
 555
 556 static void i915_do_dispatch_flip(struct drm_device * dev, int plane, int sync)
 557 {
 558         drm_i915_private_t *dev_priv = dev->dev_private;
 559         u32 num_pages, current_page, next_page, dspbase;
 560         int shift = 2 * plane, x, y;
 561         RING_LOCALS;
 562
 563         /* Calculate display base offset */
 564         num_pages = dev_priv->sarea_priv->third_handle ? 3 : 2;
 565         current_page = (dev_priv->sarea_priv->pf_current_page >> shift) & 0x3;
 566         next_page = (current_page + 1) % num_pages;
 567
 568         switch (next_page) {
 569         default:
 570         case 0:
 571                 dspbase = dev_priv->sarea_priv->front_offset;
 572                 break;
 573         case 1:
 574                 dspbase = dev_priv->sarea_priv->back_offset;
 575                 break;
 576         case 2:
 577                 dspbase = dev_priv->sarea_priv->third_offset;
 578                 break;
 579         }
 580
 581         if (plane == 0) {
 582                 x = dev_priv->sarea_priv->planeA_x;
 583                 y = dev_priv->sarea_priv->planeA_y;
 584         } else {
 585                 x = dev_priv->sarea_priv->planeB_x;
 586                 y = dev_priv->sarea_priv->planeB_y;
 587         }
 588
 589         dspbase += (y * dev_priv->sarea_priv->pitch + x) * dev_priv->cpp;
 590
 591         DRM_DEBUG("plane=%d current_page=%d dspbase=0x%x\n", plane, current_page,
 592                   dspbase);
 593
 594         BEGIN_LP_RING(4);
 595         OUT_RING(sync ? 0 :
 596                  (MI_WAIT_FOR_EVENT | (plane ? MI_WAIT_FOR_PLANE_B_FLIP :
 597                                        MI_WAIT_FOR_PLANE_A_FLIP)));
 598         OUT_RING(CMD_OP_DISPLAYBUFFER_INFO | (sync ? 0 : ASYNC_FLIP) |
 599                  (plane ? DISPLAY_PLANE_B : DISPLAY_PLANE_A));
 600         OUT_RING(dev_priv->sarea_priv->pitch * dev_priv->cpp);
 601         OUT_RING(dspbase);
 602         ADVANCE_LP_RING();
 603
 604         dev_priv->sarea_priv->pf_current_page &= ~(0x3 << shift);
 605         dev_priv->sarea_priv->pf_current_page |= next_page << shift;
 606 }
 607
 608 void i915_dispatch_flip(struct drm_device * dev, int planes, int sync)
 609 {
 610         drm_i915_private_t *dev_priv = dev->dev_private;
 611         int i;
 612
 613         DRM_DEBUG("%s: planes=0x%x pfCurrentPage=%d\n",
 614                   __FUNCTION__,
 615                   planes, dev_priv->sarea_priv->pf_current_page);
 616
 617         i915_emit_mi_flush(dev, MI_READ_FLUSH | MI_EXE_FLUSH);
 618
 619         for (i = 0; i < 2; i++)
 620                 if (planes & (1 << i))
 621                         i915_do_dispatch_flip(dev, i, sync);
 622
 623         i915_emit_breadcrumb(dev);
 624 #ifdef I915_HAVE_FENCE
 625         if (!sync)
 626                 drm_fence_flush_old(dev, 0, dev_priv->counter);
 627 #endif
 628 }
 629
 630 static int i915_quiescent(struct drm_device * dev)
 631 {
 632         drm_i915_private_t *dev_priv = dev->dev_private;
 633
 634         i915_kernel_lost_context(dev);
 635         return i915_wait_ring(dev, dev_priv->ring.Size - 8, __FUNCTION__);
 636 }
 637
 638 static int i915_flush_ioctl(struct drm_device *dev, void *data,
 639                             struct drm_file *file_priv)
 640 {
 641
 642         LOCK_TEST_WITH_RETURN(dev, file_priv);
 643
 644         return i915_quiescent(dev);
 645 }
 646
 647 static int i915_batchbuffer(struct drm_device *dev, void *data,
 648                             struct drm_file *file_priv)
 649 {
 650         drm_i915_private_t *dev_priv = (drm_i915_private_t *) dev->dev_private;
 651         drm_i915_sarea_t *sarea_priv = (drm_i915_sarea_t *)
 652             dev_priv->sarea_priv;
 653         drm_i915_batchbuffer_t *batch = data;
 654         int ret;
 655
 656         if (!dev_priv->allow_batchbuffer) {
 657                 DRM_ERROR("Batchbuffer ioctl disabled\n");
 658                 return -EINVAL;
 659         }
 660
 661         DRM_DEBUG("i915 batchbuffer, start %x used %d cliprects %d\n",
 662                   batch->start, batch->used, batch->num_cliprects);
 663
 664         LOCK_TEST_WITH_RETURN(dev, file_priv);
 665
 666         if (batch->num_cliprects && DRM_VERIFYAREA_READ(batch->cliprects,
 667                                                         batch->num_cliprects *
 668                                                         sizeof(struct drm_clip_rect)))
 669                 return -EFAULT;
 670
 671         ret = i915_dispatch_batchbuffer(dev, batch);
 672
 673         sarea_priv->last_dispatch = READ_BREADCRUMB(dev_priv);
 674         return ret;
 675 }
 676
 677 static int i915_cmdbuffer(struct drm_device *dev, void *data,
 678                           struct drm_file *file_priv)
 679 {
 680         drm_i915_private_t *dev_priv = (drm_i915_private_t *) dev->dev_private;
 681         drm_i915_sarea_t *sarea_priv = (drm_i915_sarea_t *)
 682             dev_priv->sarea_priv;
 683         drm_i915_cmdbuffer_t *cmdbuf = data;
 684         int ret;
 685
 686         DRM_DEBUG("i915 cmdbuffer, buf %p sz %d cliprects %d\n",
 687                   cmdbuf->buf, cmdbuf->sz, cmdbuf->num_cliprects);
 688
 689         LOCK_TEST_WITH_RETURN(dev, file_priv);
 690
 691         if (cmdbuf->num_cliprects &&
 692             DRM_VERIFYAREA_READ(cmdbuf->cliprects,
 693                                 cmdbuf->num_cliprects *
 694                                 sizeof(struct drm_clip_rect))) {
 695                 DRM_ERROR("Fault accessing cliprects\n");
 696                 return -EFAULT;
 697         }
 698
 699         ret = i915_dispatch_cmdbuffer(dev, cmdbuf);
 700         if (ret) {
 701                 DRM_ERROR("i915_dispatch_cmdbuffer failed\n");
 702                 return ret;
 703         }
 704
 705         sarea_priv->last_dispatch = READ_BREADCRUMB(dev_priv);
 706         return 0;
 707 }
 708
 709 #ifdef I915_HAVE_BUFFER
 710 struct i915_relocatee_info {
 711         struct drm_buffer_object *buf;
 712         unsigned long offset;
 713         u32 *data_page;
 714         unsigned page_offset;
 715         struct drm_bo_kmap_obj kmap;
 716         int is_iomem;
 717 };
 718
 719 static void i915_dereference_buffers_locked(struct drm_buffer_object **buffers,
 720                                             unsigned num_buffers)
 721 {
 722         while (num_buffers--)
 723                 drm_bo_usage_deref_locked(&buffers[num_buffers]);
 724 }
 725
 726 int i915_apply_reloc(struct drm_file *file_priv, int num_buffers,
 727                      struct drm_buffer_object **buffers,
 728                      struct i915_relocatee_info *relocatee,
 729                      uint32_t *reloc)
 730 {
 731         unsigned index;
 732         unsigned long new_cmd_offset;
 733         u32 val;
 734         int ret;
 735
 736         if (reloc[2] >= num_buffers) {
 737                 DRM_ERROR("Illegal relocation buffer %08X\n", reloc[2]);
 738                 return -EINVAL;
 739         }
 740
 741         new_cmd_offset = reloc[0];
 742         if (!relocatee->data_page ||
 743             !drm_bo_same_page(relocatee->offset, new_cmd_offset)) {
 744                 drm_bo_kunmap(&relocatee->kmap);
 745                 relocatee->offset = new_cmd_offset;
 746                 ret = drm_bo_kmap(relocatee->buf, new_cmd_offset >> PAGE_SHIFT,
 747                                   1, &relocatee->kmap);
 748                 if (ret) {
 749                         DRM_ERROR("Could not map command buffer to apply relocs\n %08lx", new_cmd_offset);
 750                         return ret;
 751                 }
 752
 753                 relocatee->data_page = drm_bmo_virtual(&relocatee->kmap,
 754                                                        &relocatee->is_iomem);
 755                 relocatee->page_offset = (relocatee->offset & PAGE_MASK);
 756         }
 757
 758         val = buffers[reloc[2]]->offset;
 759         index = (reloc[0] - relocatee->page_offset) >> 2;
 760
 761         /* add in validate */
 762         val = val + reloc[1];
 763
 764         relocatee->data_page[index] = val;
 765         return 0;
 766 }
 767
 768 int i915_process_relocs(struct drm_file *file_priv,
 769                         uint32_t buf_handle,
 770                         uint32_t *reloc_buf_handle,
 771                         struct i915_relocatee_info *relocatee,
 772                         struct drm_buffer_object **buffers,
 773                         uint32_t num_buffers)
 774 {
 775         struct drm_device *dev = file_priv->head->dev;
 776         struct drm_buffer_object *reloc_list_object;
 777         uint32_t cur_handle = *reloc_buf_handle;
 778         uint32_t *reloc_page;
 779         int ret, reloc_is_iomem, reloc_stride;
 780         uint32_t num_relocs, reloc_offset, reloc_end, reloc_page_offset, next_offset, cur_offset;
 781         struct drm_bo_kmap_obj reloc_kmap;
 782
 783         memset(&reloc_kmap, 0, sizeof(reloc_kmap));
 784
 785         mutex_lock(&dev->struct_mutex);
 786         reloc_list_object = drm_lookup_buffer_object(file_priv, cur_handle, 1);
 787         mutex_unlock(&dev->struct_mutex);
 788         if (!reloc_list_object)
 789                 return -EINVAL;
 790
 791         ret = drm_bo_kmap(reloc_list_object, 0, 1, &reloc_kmap);
 792         if (ret) {
 793                 DRM_ERROR("Could not map relocation buffer.\n");
 794                 goto out;
 795         }
 796
 797         reloc_page = drm_bmo_virtual(&reloc_kmap, &reloc_is_iomem);
 798         num_relocs = reloc_page[0] & 0xffff;
 799
 800         if ((reloc_page[0] >> 16) & 0xffff) {
 801                 DRM_ERROR("Unsupported relocation type requested\n");
 802                 goto out;
 803         }
 804
 805         /* get next relocate buffer handle */
 806         *reloc_buf_handle = reloc_page[1];
 807         reloc_stride = I915_RELOC0_STRIDE * sizeof(uint32_t); /* may be different for other types of relocs */
 808
 809         DRM_DEBUG("num relocs is %d, next is %08X\n", num_relocs, reloc_page[1]);
 810
 811         reloc_page_offset = 0;
 812         reloc_offset = I915_RELOC_HEADER * sizeof(uint32_t);
 813         reloc_end = reloc_offset + (num_relocs * reloc_stride);
 814
 815         do {
 816                 next_offset = drm_bo_offset_end(reloc_offset, reloc_end);
 817
 818                 do {
 819                         cur_offset = ((reloc_offset + reloc_page_offset) & ~PAGE_MASK) / sizeof(uint32_t);
 820                         ret = i915_apply_reloc(file_priv, num_buffers,
 821                                          buffers, relocatee, &reloc_page[cur_offset]);
 822                         if (ret)
 823                                 goto out;
 824
 825                         reloc_offset += reloc_stride;
 826                 } while (reloc_offset < next_offset);
 827
 828                 drm_bo_kunmap(&reloc_kmap);
 829
 830                 reloc_offset = next_offset;
 831                 if (reloc_offset != reloc_end) {
 832                         ret = drm_bo_kmap(reloc_list_object, reloc_offset >> PAGE_SHIFT, 1, &reloc_kmap);
 833                         if (ret) {
 834                                 DRM_ERROR("Could not map relocation buffer.\n");
 835                                 goto out;
 836                         }
 837
 838                         reloc_page = drm_bmo_virtual(&reloc_kmap, &reloc_is_iomem);
 839                         reloc_page_offset = reloc_offset & ~PAGE_MASK;
 840                 }
 841
 842         } while (reloc_offset != reloc_end);
 843 out:
 844         drm_bo_kunmap(&relocatee->kmap);
 845         relocatee->data_page = NULL;
 846
 847         drm_bo_kunmap(&reloc_kmap);
 848
 849         mutex_lock(&dev->struct_mutex);
 850         drm_bo_usage_deref_locked(&reloc_list_object);
 851         mutex_unlock(&dev->struct_mutex);
 852
 853         return ret;
 854 }
 855
 856 static int i915_exec_reloc(struct drm_file *file_priv, drm_handle_t buf_handle,
 857                            drm_handle_t buf_reloc_handle,
 858                            struct drm_buffer_object **buffers,
 859                            uint32_t buf_count)
 860 {
 861         struct drm_device *dev = file_priv->head->dev;
 862         struct i915_relocatee_info relocatee;
 863         int ret = 0;
 864
 865         memset(&relocatee, 0, sizeof(relocatee));
 866
 867         mutex_lock(&dev->struct_mutex);
 868         relocatee.buf = drm_lookup_buffer_object(file_priv, buf_handle, 1);
 869         mutex_unlock(&dev->struct_mutex);
 870         if (!relocatee.buf) {
 871                 DRM_DEBUG("relocatee buffer invalid %08x\n", buf_handle);
 872                 ret = -EINVAL;
 873                 goto out_err;
 874         }
 875
 876         while (buf_reloc_handle) {
 877                 ret = i915_process_relocs(file_priv, buf_handle, &buf_reloc_handle, &relocatee, buffers, buf_count);
 878                 if (ret) {
 879                         DRM_ERROR("process relocs failed\n");
 880                         break;
 881                 }
 882         }
 883
 884         mutex_lock(&dev->struct_mutex);
 885         drm_bo_usage_deref_locked(&relocatee.buf);
 886         mutex_unlock(&dev->struct_mutex);
 887
 888 out_err:
 889         return ret;
 890 }
 891
 892 /*
 893  * Validate, add fence and relocate a block of bos from a userspace list
 894  */
 895 int i915_validate_buffer_list(struct drm_file *file_priv,
 896                               unsigned int fence_class, uint64_t data,
 897                               struct drm_buffer_object **buffers,
 898                               uint32_t *num_buffers)
 899 {
 900         struct drm_i915_op_arg arg;
 901         struct drm_bo_op_req *req = &arg.d.req;
 902         struct drm_bo_arg_rep rep;
 903         unsigned long next = 0;
 904         int ret = 0;
 905         unsigned buf_count = 0;
 906         struct drm_device *dev = file_priv->head->dev;
 907         uint32_t buf_reloc_handle, buf_handle;
 908
 909
 910         do {
 911                 if (buf_count >= *num_buffers) {
 912                         DRM_ERROR("Buffer count exceeded %d\n.", *num_buffers);
 913                         ret = -EINVAL;
 914                         goto out_err;
 915                 }
 916
 917                 buffers[buf_count] = NULL;
 918
 919                 if (copy_from_user(&arg, (void __user *)(unsigned)data, sizeof(arg))) {
 920                         ret = -EFAULT;
 921                         goto out_err;
 922                 }
 923
 924                 if (arg.handled) {
 925                         data = arg.next;
 926                         mutex_lock(&dev->struct_mutex);
 927                         buffers[buf_count] = drm_lookup_buffer_object(file_priv, req->arg_handle, 1);
 928                         mutex_unlock(&dev->struct_mutex);
 929                         buf_count++;
 930                         continue;
 931                 }
 932
 933                 rep.ret = 0;
 934                 if (req->op != drm_bo_validate) {
 935                         DRM_ERROR
 936                             ("Buffer object operation wasn't \"validate\".\n");
 937                         rep.ret = -EINVAL;
 938                         goto out_err;
 939                 }
 940
 941                 buf_handle = req->bo_req.handle;
 942                 buf_reloc_handle = arg.reloc_handle;
 943
 944                 if (buf_reloc_handle) {
 945                         ret = i915_exec_reloc(file_priv, buf_handle, buf_reloc_handle, buffers, buf_count);
 946                         if (ret)
 947                                 goto out_err;
 948                         DRM_MEMORYBARRIER();
 949                 }
 950
 951                 rep.ret = drm_bo_handle_validate(file_priv, req->bo_req.handle,
 952                                                  req->bo_req.fence_class,
 953                                                  req->bo_req.flags,
 954                                                  req->bo_req.mask,
 955                                                  req->bo_req.hint,
 956                                                  0,
 957                                                  &rep.bo_info,
 958                                                  &buffers[buf_count]);
 959
 960                 if (rep.ret) {
 961                         DRM_ERROR("error on handle validate %d\n", rep.ret);
 962                         goto out_err;
 963                 }
 964
 965
 966                 next = arg.next;
 967                 arg.handled = 1;
 968                 arg.d.rep = rep;
 969
 970                 if (copy_to_user((void __user *)(unsigned)data, &arg, sizeof(arg)))
 971                         return -EFAULT;
 972
 973                 data = next;
 974                 buf_count++;
 975
 976         } while (next != 0);
 977         *num_buffers = buf_count;
 978         return 0;
 979 out_err:
 980         mutex_lock(&dev->struct_mutex);
 981         i915_dereference_buffers_locked(buffers, buf_count);
 982         mutex_unlock(&dev->struct_mutex);
 983         *num_buffers = 0;
 984         return (ret) ? ret : rep.ret;
 985 }
 986
 987 static int i915_execbuffer(struct drm_device *dev, void *data,
 988                            struct drm_file *file_priv)
 989 {
 990         drm_i915_private_t *dev_priv = (drm_i915_private_t *) dev->dev_private;
 991         drm_i915_sarea_t *sarea_priv = (drm_i915_sarea_t *)
 992                 dev_priv->sarea_priv;
 993         struct drm_i915_execbuffer *exec_buf = data;
 994         struct _drm_i915_batchbuffer *batch = &exec_buf->batch;
 995         struct drm_fence_arg *fence_arg = &exec_buf->fence_arg;
 996         int num_buffers;
 997         int ret;
 998         struct drm_buffer_object **buffers;
 999         struct drm_fence_object *fence;
1000
1001         if (!dev_priv->allow_batchbuffer) {
1002                 DRM_ERROR("Batchbuffer ioctl disabled\n");
1003                 return -EINVAL;
1004         }
1005
1006
1007         if (batch->num_cliprects && DRM_VERIFYAREA_READ(batch->cliprects,
1008                                                         batch->num_cliprects *
1009                                                         sizeof(struct drm_clip_rect)))
1010                 return -EFAULT;
1011
1012         if (exec_buf->num_buffers > dev_priv->max_validate_buffers)
1013                 return -EINVAL;
1014
1015
1016         ret = drm_bo_read_lock(&dev->bm.bm_lock);
1017         if (ret)
1018                 return ret;
1019
1020         /*
1021          * The cmdbuf_mutex makes sure the validate-submit-fence
1022          * operation is atomic.
1023          */
1024
1025         ret = mutex_lock_interruptible(&dev_priv->cmdbuf_mutex);
1026         if (ret) {
1027                 drm_bo_read_unlock(&dev->bm.bm_lock);
1028                 return -EAGAIN;
1029         }
1030
1031         num_buffers = exec_buf->num_buffers;
1032
1033         buffers = drm_calloc(num_buffers, sizeof(struct drm_buffer_object *), DRM_MEM_DRIVER);
1034         if (!buffers) {
1035                 drm_bo_read_unlock(&dev->bm.bm_lock);
1036                 mutex_unlock(&dev_priv->cmdbuf_mutex);
1037                 return -ENOMEM;
1038         }
1039
1040         /* validate buffer list + fixup relocations */
1041         ret = i915_validate_buffer_list(file_priv, 0, exec_buf->ops_list,
1042                                         buffers, &num_buffers);
1043         if (ret)
1044                 goto out_free;
1045
1046         /* make sure all previous memory operations have passed */
1047         DRM_MEMORYBARRIER();
1048         drm_agp_chipset_flush(dev);
1049
1050         /* submit buffer */
1051         batch->start = buffers[num_buffers-1]->offset;
1052
1053         DRM_DEBUG("i915 exec batchbuffer, start %x used %d cliprects %d\n",
1054                   batch->start, batch->used, batch->num_cliprects);
1055
1056         ret = i915_dispatch_batchbuffer(dev, batch);
1057         if (ret)
1058                 goto out_err0;
1059
1060         sarea_priv->last_dispatch = READ_BREADCRUMB(dev_priv);
1061
1062         /* fence */
1063         ret = drm_fence_buffer_objects(dev, NULL, 0, NULL, &fence);
1064         if (ret)
1065                 goto out_err0;
1066
1067         if (!(fence_arg->flags & DRM_FENCE_FLAG_NO_USER)) {
1068                 ret = drm_fence_add_user_object(file_priv, fence, fence_arg->flags & DRM_FENCE_FLAG_SHAREABLE);
1069                 if (!ret) {
1070                         fence_arg->handle = fence->base.hash.key;
1071                         fence_arg->fence_class = fence->fence_class;
1072                         fence_arg->type = fence->type;
1073                         fence_arg->signaled = fence->signaled;
1074                 }
1075         }
1076         drm_fence_usage_deref_unlocked(&fence);
1077 out_err0:
1078
1079         /* handle errors */
1080         mutex_lock(&dev->struct_mutex);
1081         i915_dereference_buffers_locked(buffers, num_buffers);
1082         mutex_unlock(&dev->struct_mutex);
1083
1084 out_free:
1085         drm_free(buffers, (exec_buf->num_buffers * sizeof(struct drm_buffer_object *)), DRM_MEM_DRIVER);
1086
1087         mutex_unlock(&dev_priv->cmdbuf_mutex);
1088         drm_bo_read_unlock(&dev->bm.bm_lock);
1089         return ret;
1090 }
1091 #endif
1092
1093 static int i915_do_cleanup_pageflip(struct drm_device * dev)
1094 {
1095         drm_i915_private_t *dev_priv = dev->dev_private;
1096         int i, planes, num_pages = dev_priv->sarea_priv->third_handle ? 3 : 2;
1097
1098         DRM_DEBUG("%s\n", __FUNCTION__);
1099
1100         for (i = 0, planes = 0; i < 2; i++)
1101                 if (dev_priv->sarea_priv->pf_current_page & (0x3 << (2 * i))) {
1102                         dev_priv->sarea_priv->pf_current_page =
1103                                 (dev_priv->sarea_priv->pf_current_page &
1104                                  ~(0x3 << (2 * i))) | (num_pages - 1) << (2 * i);
1105
1106                         planes |= 1 << i;
1107                 }
1108
1109         if (planes)
1110                 i915_dispatch_flip(dev, planes, 0);
1111
1112         return 0;
1113 }
1114
1115 static int i915_flip_bufs(struct drm_device *dev, void *data, struct drm_file *file_priv)
1116 {
1117         drm_i915_flip_t *param = data;
1118
1119         DRM_DEBUG("%s\n", __FUNCTION__);
1120
1121         LOCK_TEST_WITH_RETURN(dev, file_priv);
1122
1123         /* This is really planes */
1124         if (param->pipes & ~0x3) {
1125                 DRM_ERROR("Invalid planes 0x%x, only <= 0x3 is valid\n",
1126                           param->pipes);
1127                 return -EINVAL;
1128         }
1129
1130         i915_dispatch_flip(dev, param->pipes, 0);
1131
1132         return 0;
1133 }
1134
1135
1136 static int i915_getparam(struct drm_device *dev, void *data,
1137                          struct drm_file *file_priv)
1138 {
1139         drm_i915_private_t *dev_priv = dev->dev_private;
1140         drm_i915_getparam_t *param = data;
1141         int value;
1142
1143         if (!dev_priv) {
1144                 DRM_ERROR("%s called with no initialization\n", __FUNCTION__);
1145                 return -EINVAL;
1146         }
1147
1148         switch (param->param) {
1149         case I915_PARAM_IRQ_ACTIVE:
1150                 value = dev->irq ? 1 : 0;
1151                 break;
1152         case I915_PARAM_ALLOW_BATCHBUFFER:
1153                 value = dev_priv->allow_batchbuffer ? 1 : 0;
1154                 break;
1155         case I915_PARAM_LAST_DISPATCH:
1156                 value = READ_BREADCRUMB(dev_priv);
1157                 break;
1158         default:
1159                 DRM_ERROR("Unknown parameter %d\n", param->param);
1160                 return -EINVAL;
1161         }
1162
1163         if (DRM_COPY_TO_USER(param->value, &value, sizeof(int))) {
1164                 DRM_ERROR("DRM_COPY_TO_USER failed\n");
1165                 return -EFAULT;
1166         }
1167
1168         return 0;
1169 }
1170
1171 static int i915_setparam(struct drm_device *dev, void *data,
1172                          struct drm_file *file_priv)
1173 {
1174         drm_i915_private_t *dev_priv = dev->dev_private;
1175         drm_i915_setparam_t *param = data;
1176
1177         if (!dev_priv) {
1178                 DRM_ERROR("%s called with no initialization\n", __FUNCTION__);
1179                 return -EINVAL;
1180         }
1181
1182         switch (param->param) {
1183         case I915_SETPARAM_USE_MI_BATCHBUFFER_START:
1184                 dev_priv->use_mi_batchbuffer_start = param->value;
1185                 break;
1186         case I915_SETPARAM_TEX_LRU_LOG_GRANULARITY:
1187                 dev_priv->tex_lru_log_granularity = param->value;
1188                 break;
1189         case I915_SETPARAM_ALLOW_BATCHBUFFER:
1190                 dev_priv->allow_batchbuffer = param->value;
1191                 break;
1192         default:
1193                 DRM_ERROR("unknown parameter %d\n", param->param);
1194                 return -EINVAL;
1195         }
1196
1197         return 0;
1198 }
1199
1200 drm_i915_mmio_entry_t mmio_table[] = {
1201         [MMIO_REGS_PS_DEPTH_COUNT] = {
1202                 I915_MMIO_MAY_READ|I915_MMIO_MAY_WRITE,
1203                 0x2350,
1204                 8
1205         }
1206 };
1207
1208 static int mmio_table_size = sizeof(mmio_table)/sizeof(drm_i915_mmio_entry_t);
1209
1210 static int i915_mmio(struct drm_device *dev, void *data,
1211                      struct drm_file *file_priv)
1212 {
1213         uint32_t buf[8];
1214         drm_i915_private_t *dev_priv = dev->dev_private;
1215         drm_i915_mmio_entry_t *e;
1216         drm_i915_mmio_t *mmio = data;
1217         void __iomem *base;
1218         int i;
1219
1220         if (!dev_priv) {
1221                 DRM_ERROR("%s called with no initialization\n", __FUNCTION__);
1222                 return -EINVAL;
1223         }
1224
1225         if (mmio->reg >= mmio_table_size)
1226                 return -EINVAL;
1227
1228         e = &mmio_table[mmio->reg];
1229         base = (u8 *) dev_priv->mmio_map->handle + e->offset;
1230
1231         switch (mmio->read_write) {
1232                 case I915_MMIO_READ:
1233                         if (!(e->flag & I915_MMIO_MAY_READ))
1234                                 return -EINVAL;
1235                         for (i = 0; i < e->size / 4; i++)
1236                                 buf[i] = I915_READ(e->offset + i * 4);
1237                         if (DRM_COPY_TO_USER(mmio->data, buf, e->size)) {
1238                                 DRM_ERROR("DRM_COPY_TO_USER failed\n");
1239                                 return -EFAULT;
1240                         }
1241                         break;
1242
1243                 case I915_MMIO_WRITE:
1244                         if (!(e->flag & I915_MMIO_MAY_WRITE))
1245                                 return -EINVAL;
1246                         if(DRM_COPY_FROM_USER(buf, mmio->data, e->size)) {
1247                                 DRM_ERROR("DRM_COPY_TO_USER failed\n");
1248                                 return -EFAULT;
1249                         }
1250                         for (i = 0; i < e->size / 4; i++)
1251                                 I915_WRITE(e->offset + i * 4, buf[i]);
1252                         break;
1253         }
1254         return 0;
1255 }
1256
1257 static int i915_set_status_page(struct drm_device *dev, void *data,
1258                                 struct drm_file *file_priv)
1259 {
1260         drm_i915_private_t *dev_priv = dev->dev_private;
1261         drm_i915_hws_addr_t *hws = data;
1262
1263         if (!dev_priv) {
1264                 DRM_ERROR("%s called with no initialization\n", __FUNCTION__);
1265                 return -EINVAL;
1266         }
1267         DRM_DEBUG("set status page addr 0x%08x\n", (u32)hws->addr);
1268
1269         dev_priv->status_gfx_addr = hws->addr & (0x1ffff<<12);
1270
1271         dev_priv->hws_map.offset = dev->agp->base + hws->addr;
1272         dev_priv->hws_map.size = 4*1024;
1273         dev_priv->hws_map.type = 0;
1274         dev_priv->hws_map.flags = 0;
1275         dev_priv->hws_map.mtrr = 0;
1276
1277         drm_core_ioremap(&dev_priv->hws_map, dev);
1278         if (dev_priv->hws_map.handle == NULL) {
1279                 i915_dma_cleanup(dev);
1280                 dev_priv->status_gfx_addr = 0;
1281                 DRM_ERROR("can not ioremap virtual address for"
1282                                 " G33 hw status page\n");
1283                 return -ENOMEM;
1284         }
1285         dev_priv->hw_status_page = dev_priv->hws_map.handle;
1286
1287         memset(dev_priv->hw_status_page, 0, PAGE_SIZE);
1288         I915_WRITE(0x02080, dev_priv->status_gfx_addr);
1289         DRM_DEBUG("load hws 0x2080 with gfx mem 0x%x\n",
1290                         dev_priv->status_gfx_addr);
1291         DRM_DEBUG("load hws at %p\n", dev_priv->hw_status_page);
1292         return 0;
1293 }
1294
1295 int i915_driver_load(struct drm_device *dev, unsigned long flags)
1296 {
1297         struct drm_i915_private *dev_priv = dev->dev_private;
1298         unsigned long base, size;
1299         int ret = 0, mmio_bar = IS_I9XX(dev) ? 0 : 1;
1300
1301         /* i915 has 4 more counters */
1302         dev->counters += 4;
1303         dev->types[6] = _DRM_STAT_IRQ;
1304         dev->types[7] = _DRM_STAT_PRIMARY;
1305         dev->types[8] = _DRM_STAT_SECONDARY;
1306         dev->types[9] = _DRM_STAT_DMA;
1307
1308         dev_priv = drm_alloc(sizeof(drm_i915_private_t), DRM_MEM_DRIVER);
1309         if (dev_priv == NULL)
1310                 return -ENOMEM;
1311
1312         memset(dev_priv, 0, sizeof(drm_i915_private_t));
1313
1314         dev->dev_private = (void *)dev_priv;
1315
1316         /* Add register map (needed for suspend/resume) */
1317         base = drm_get_resource_start(dev, mmio_bar);
1318         size = drm_get_resource_len(dev, mmio_bar);
1319
1320         ret = drm_addmap(dev, base, size, _DRM_REGISTERS, _DRM_KERNEL,
1321                          &dev_priv->mmio_map);
1322
1323 #ifdef __LINUX__
1324 #if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,25)
1325         intel_init_chipset_flush_compat(dev);
1326 #endif
1327 #endif
1328         return ret;
1329 }
1330
1331 int i915_driver_unload(struct drm_device *dev)
1332 {
1333         struct drm_i915_private *dev_priv = dev->dev_private;
1334
1335         if (dev_priv->mmio_map)
1336                 drm_rmmap(dev, dev_priv->mmio_map);
1337
1338         drm_free(dev->dev_private, sizeof(drm_i915_private_t),
1339                  DRM_MEM_DRIVER);
1340 #ifdef __LINUX__
1341 #if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,25)
1342         intel_fini_chipset_flush_compat(dev);
1343 #endif
1344 #endif
1345         return 0;
1346 }
1347
1348 void i915_driver_lastclose(struct drm_device * dev)
1349 {
1350         drm_i915_private_t *dev_priv = dev->dev_private;
1351
1352         if (drm_getsarea(dev) && dev_priv->sarea_priv)
1353                 i915_do_cleanup_pageflip(dev);
1354         if (dev_priv->agp_heap)
1355                 i915_mem_takedown(&(dev_priv->agp_heap));
1356
1357         i915_dma_cleanup(dev);
1358 }
1359
1360 void i915_driver_preclose(struct drm_device * dev, struct drm_file *file_priv)
1361 {
1362         drm_i915_private_t *dev_priv = dev->dev_private;
1363         i915_mem_release(dev, file_priv, dev_priv->agp_heap);
1364 }
1365
1366 struct drm_ioctl_desc i915_ioctls[] = {
1367         DRM_IOCTL_DEF(DRM_I915_INIT, i915_dma_init, DRM_AUTH|DRM_MASTER|DRM_ROOT_ONLY),
1368         DRM_IOCTL_DEF(DRM_I915_FLUSH, i915_flush_ioctl, DRM_AUTH),
1369         DRM_IOCTL_DEF(DRM_I915_FLIP, i915_flip_bufs, DRM_AUTH),
1370         DRM_IOCTL_DEF(DRM_I915_BATCHBUFFER, i915_batchbuffer, DRM_AUTH),
1371         DRM_IOCTL_DEF(DRM_I915_IRQ_EMIT, i915_irq_emit, DRM_AUTH),
1372         DRM_IOCTL_DEF(DRM_I915_IRQ_WAIT, i915_irq_wait, DRM_AUTH),
1373         DRM_IOCTL_DEF(DRM_I915_GETPARAM, i915_getparam, DRM_AUTH),
1374         DRM_IOCTL_DEF(DRM_I915_SETPARAM, i915_setparam, DRM_AUTH|DRM_MASTER|DRM_ROOT_ONLY),
1375         DRM_IOCTL_DEF(DRM_I915_ALLOC, i915_mem_alloc, DRM_AUTH),
1376         DRM_IOCTL_DEF(DRM_I915_FREE, i915_mem_free, DRM_AUTH),
1377         DRM_IOCTL_DEF(DRM_I915_INIT_HEAP, i915_mem_init_heap, DRM_AUTH|DRM_MASTER|DRM_ROOT_ONLY),
1378         DRM_IOCTL_DEF(DRM_I915_CMDBUFFER, i915_cmdbuffer, DRM_AUTH),
1379         DRM_IOCTL_DEF(DRM_I915_DESTROY_HEAP,  i915_mem_destroy_heap, DRM_AUTH|DRM_MASTER|DRM_ROOT_ONLY ),
1380         DRM_IOCTL_DEF(DRM_I915_SET_VBLANK_PIPE,  i915_vblank_pipe_set, DRM_AUTH|DRM_MASTER|DRM_ROOT_ONLY ),
1381         DRM_IOCTL_DEF(DRM_I915_GET_VBLANK_PIPE,  i915_vblank_pipe_get, DRM_AUTH ),
1382         DRM_IOCTL_DEF(DRM_I915_VBLANK_SWAP, i915_vblank_swap, DRM_AUTH),
1383         DRM_IOCTL_DEF(DRM_I915_MMIO, i915_mmio, DRM_AUTH),
1384         DRM_IOCTL_DEF(DRM_I915_HWS_ADDR, i915_set_status_page, DRM_AUTH),
1385 #ifdef I915_HAVE_BUFFER
1386         DRM_IOCTL_DEF(DRM_I915_EXECBUFFER, i915_execbuffer, DRM_AUTH),
1387 #endif
1388 };
1389
1390 int i915_max_ioctl = DRM_ARRAY_SIZE(i915_ioctls);
1391
1392 /**
1393  * Determine if the device really is AGP or not.
1394  *
1395  * All Intel graphics chipsets are treated as AGP, even if they are really
1396  * PCI-e.
1397  *
1398  * \param dev   The device to be tested.
1399  *
1400  * \returns
1401  * A value of 1 is always retured to indictate every i9x5 is AGP.
1402  */
1403 int i915_driver_device_is_agp(struct drm_device * dev)
1404 {
1405         return 1;
1406 }
1407
1408 int i915_driver_firstopen(struct drm_device *dev)
1409 {
1410 #ifdef I915_HAVE_BUFFER
1411         drm_bo_driver_init(dev);
1412 #endif
1413         return 0;
1414 }