shared-core/i915_dma.c

   1 /* i915_dma.c -- DMA support for the I915 -*- linux-c -*-
   2  */
   3 /*
   4  * Copyright 2003 Tungsten Graphics, Inc., Cedar Park, Texas.
   5  * All Rights Reserved.
   6  *
   7  * Permission is hereby granted, free of charge, to any person obtaining a
   8  * copy of this software and associated documentation files (the
   9  * "Software"), to deal in the Software without restriction, including
  10  * without limitation the rights to use, copy, modify, merge, publish,
  11  * distribute, sub license, and/or sell copies of the Software, and to
  12  * permit persons to whom the Software is furnished to do so, subject to
  13  * the following conditions:
  14  *
  15  * The above copyright notice and this permission notice (including the
  16  * next paragraph) shall be included in all copies or substantial portions
  17  * of the Software.
  18  *
  19  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
  20  * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
  21  * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT.
  22  * IN NO EVENT SHALL TUNGSTEN GRAPHICS AND/OR ITS SUPPLIERS BE LIABLE FOR
  23  * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
  24  * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
  25  * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  26  *
  27  */
  28
  29 #include "drmP.h"
  30 #include "drm.h"
  31 #include "i915_drm.h"
  32 #include "i915_drv.h"
  33
  34 /* Really want an OS-independent resettable timer.  Would like to have
  35  * this loop run for (eg) 3 sec, but have the timer reset every time
  36  * the head pointer changes, so that EBUSY only happens if the ring
  37  * actually stalls for (eg) 3 seconds.
  38  */
  39 int i915_wait_ring(struct drm_device * dev, int n, const char *caller)
  40 {
  41         drm_i915_private_t *dev_priv = dev->dev_private;
  42         drm_i915_ring_buffer_t *ring = &(dev_priv->ring);
  43         u32 last_head = I915_READ(LP_RING + RING_HEAD) & HEAD_ADDR;
  44         int i;
  45
  46         for (i = 0; i < 10000; i++) {
  47                 ring->head = I915_READ(LP_RING + RING_HEAD) & HEAD_ADDR;
  48                 ring->space = ring->head - (ring->tail + 8);
  49                 if (ring->space < 0)
  50                         ring->space += ring->Size;
  51                 if (ring->space >= n)
  52                         return 0;
  53
  54                 dev_priv->sarea_priv->perf_boxes |= I915_BOX_WAIT;
  55
  56                 if (ring->head != last_head)
  57                         i = 0;
  58
  59                 last_head = ring->head;
  60                 DRM_UDELAY(1);
  61         }
  62
  63         return -EBUSY;
  64 }
  65
  66 void i915_kernel_lost_context(struct drm_device * dev)
  67 {
  68         drm_i915_private_t *dev_priv = dev->dev_private;
  69         drm_i915_ring_buffer_t *ring = &(dev_priv->ring);
  70
  71         ring->head = I915_READ(LP_RING + RING_HEAD) & HEAD_ADDR;
  72         ring->tail = I915_READ(LP_RING + RING_TAIL) & TAIL_ADDR;
  73         ring->space = ring->head - (ring->tail + 8);
  74         if (ring->space < 0)
  75                 ring->space += ring->Size;
  76
  77         if (ring->head == ring->tail)
  78                 dev_priv->sarea_priv->perf_boxes |= I915_BOX_RING_EMPTY;
  79 }
  80
  81 static int i915_dma_cleanup(struct drm_device * dev)
  82 {
  83         drm_i915_private_t *dev_priv = dev->dev_private;
  84         /* Make sure interrupts are disabled here because the uninstall ioctl
  85          * may not have been called from userspace and after dev_private
  86          * is freed, it's too late.
  87          */
  88         if (dev->irq)
  89                 drm_irq_uninstall(dev);
  90
  91         if (dev_priv->ring.virtual_start) {
  92                 drm_core_ioremapfree(&dev_priv->ring.map, dev);
  93                 dev_priv->ring.virtual_start = 0;
  94                 dev_priv->ring.map.handle = 0;
  95                 dev_priv->ring.map.size = 0;
  96         }
  97
  98         if (dev_priv->status_page_dmah) {
  99                 drm_pci_free(dev, dev_priv->status_page_dmah);
 100                 dev_priv->status_page_dmah = NULL;
 101                 /* Need to rewrite hardware status page */
 102                 I915_WRITE(0x02080, 0x1ffff000);
 103         }
 104
 105         if (dev_priv->status_gfx_addr) {
 106                 dev_priv->status_gfx_addr = 0;
 107                 drm_core_ioremapfree(&dev_priv->hws_map, dev);
 108                 I915_WRITE(0x02080, 0x1ffff000);
 109         }
 110
 111         return 0;
 112 }
 113
 114 static int i915_initialize(struct drm_device * dev, drm_i915_init_t * init)
 115 {
 116         drm_i915_private_t *dev_priv = dev->dev_private;
 117
 118         dev_priv->sarea = drm_getsarea(dev);
 119         if (!dev_priv->sarea) {
 120                 DRM_ERROR("can not find sarea!\n");
 121                 i915_dma_cleanup(dev);
 122                 return -EINVAL;
 123         }
 124
 125         dev_priv->mmio_map = drm_core_findmap(dev, init->mmio_offset);
 126         if (!dev_priv->mmio_map) {
 127                 i915_dma_cleanup(dev);
 128                 DRM_ERROR("can not find mmio map!\n");
 129                 return -EINVAL;
 130         }
 131
 132 #ifdef I915_HAVE_BUFFER
 133         dev_priv->max_validate_buffers = I915_MAX_VALIDATE_BUFFERS;
 134 #endif
 135
 136         dev_priv->sarea_priv = (drm_i915_sarea_t *)
 137             ((u8 *) dev_priv->sarea->handle + init->sarea_priv_offset);
 138
 139         dev_priv->ring.Start = init->ring_start;
 140         dev_priv->ring.End = init->ring_end;
 141         dev_priv->ring.Size = init->ring_size;
 142         dev_priv->ring.tail_mask = dev_priv->ring.Size - 1;
 143
 144         dev_priv->ring.map.offset = init->ring_start;
 145         dev_priv->ring.map.size = init->ring_size;
 146         dev_priv->ring.map.type = 0;
 147         dev_priv->ring.map.flags = 0;
 148         dev_priv->ring.map.mtrr = 0;
 149
 150         drm_core_ioremap(&dev_priv->ring.map, dev);
 151
 152         if (dev_priv->ring.map.handle == NULL) {
 153                 i915_dma_cleanup(dev);
 154                 DRM_ERROR("can not ioremap virtual address for"
 155                           " ring buffer\n");
 156                 return -ENOMEM;
 157         }
 158
 159         dev_priv->ring.virtual_start = dev_priv->ring.map.handle;
 160
 161         dev_priv->cpp = init->cpp;
 162         dev_priv->sarea_priv->pf_current_page = 0;
 163
 164         /* We are using separate values as placeholders for mechanisms for
 165          * private backbuffer/depthbuffer usage.
 166          */
 167         dev_priv->use_mi_batchbuffer_start = 0;
 168
 169         /* Allow hardware batchbuffers unless told otherwise.
 170          */
 171         dev_priv->allow_batchbuffer = 1;
 172
 173         /* Enable vblank on pipe A for older X servers
 174          */
 175         dev_priv->vblank_pipe = DRM_I915_VBLANK_PIPE_A;
 176
 177         /* Program Hardware Status Page */
 178         if (!IS_G33(dev)) {
 179                 dev_priv->status_page_dmah =
 180                         drm_pci_alloc(dev, PAGE_SIZE, PAGE_SIZE, 0xffffffff);
 181
 182                 if (!dev_priv->status_page_dmah) {
 183                         i915_dma_cleanup(dev);
 184                         DRM_ERROR("Can not allocate hardware status page\n");
 185                         return -ENOMEM;
 186                 }
 187                 dev_priv->hw_status_page = dev_priv->status_page_dmah->vaddr;
 188                 dev_priv->dma_status_page = dev_priv->status_page_dmah->busaddr;
 189
 190                 memset(dev_priv->hw_status_page, 0, PAGE_SIZE);
 191
 192                 I915_WRITE(0x02080, dev_priv->dma_status_page);
 193         }
 194         DRM_DEBUG("Enabled hardware status page\n");
 195         mutex_init(&dev_priv->cmdbuf_mutex);
 196         return 0;
 197 }
 198
 199 static int i915_dma_resume(struct drm_device * dev)
 200 {
 201         drm_i915_private_t *dev_priv = (drm_i915_private_t *) dev->dev_private;
 202
 203         DRM_DEBUG("%s\n", __FUNCTION__);
 204
 205         if (!dev_priv->sarea) {
 206                 DRM_ERROR("can not find sarea!\n");
 207                 return -EINVAL;
 208         }
 209
 210         if (!dev_priv->mmio_map) {
 211                 DRM_ERROR("can not find mmio map!\n");
 212                 return -EINVAL;
 213         }
 214
 215         if (dev_priv->ring.map.handle == NULL) {
 216                 DRM_ERROR("can not ioremap virtual address for"
 217                           " ring buffer\n");
 218                 return -ENOMEM;
 219         }
 220
 221         /* Program Hardware Status Page */
 222         if (!dev_priv->hw_status_page) {
 223                 DRM_ERROR("Can not find hardware status page\n");
 224                 return -EINVAL;
 225         }
 226         DRM_DEBUG("hw status page @ %p\n", dev_priv->hw_status_page);
 227
 228         if (dev_priv->status_gfx_addr != 0)
 229                 I915_WRITE(0x02080, dev_priv->status_gfx_addr);
 230         else
 231                 I915_WRITE(0x02080, dev_priv->dma_status_page);
 232         DRM_DEBUG("Enabled hardware status page\n");
 233
 234         return 0;
 235 }
 236
 237 static int i915_dma_init(struct drm_device *dev, void *data,
 238                          struct drm_file *file_priv)
 239 {
 240         drm_i915_init_t *init = data;
 241         int retcode = 0;
 242
 243         switch (init->func) {
 244         case I915_INIT_DMA:
 245                 retcode = i915_initialize(dev, init);
 246                 break;
 247         case I915_CLEANUP_DMA:
 248                 retcode = i915_dma_cleanup(dev);
 249                 break;
 250         case I915_RESUME_DMA:
 251                 retcode = i915_dma_resume(dev);
 252                 break;
 253         default:
 254                 retcode = -EINVAL;
 255                 break;
 256         }
 257
 258         return retcode;
 259 }
 260
 261 /* Implement basically the same security restrictions as hardware does
 262  * for MI_BATCH_NON_SECURE.  These can be made stricter at any time.
 263  *
 264  * Most of the calculations below involve calculating the size of a
 265  * particular instruction.  It's important to get the size right as
 266  * that tells us where the next instruction to check is.  Any illegal
 267  * instruction detected will be given a size of zero, which is a
 268  * signal to abort the rest of the buffer.
 269  */
 270 static int do_validate_cmd(int cmd)
 271 {
 272         switch (((cmd >> 29) & 0x7)) {
 273         case 0x0:
 274                 switch ((cmd >> 23) & 0x3f) {
 275                 case 0x0:
 276                         return 1;       /* MI_NOOP */
 277                 case 0x4:
 278                         return 1;       /* MI_FLUSH */
 279                 default:
 280                         return 0;       /* disallow everything else */
 281                 }
 282                 break;
 283         case 0x1:
 284                 return 0;       /* reserved */
 285         case 0x2:
 286                 return (cmd & 0xff) + 2;        /* 2d commands */
 287         case 0x3:
 288                 if (((cmd >> 24) & 0x1f) <= 0x18)
 289                         return 1;
 290
 291                 switch ((cmd >> 24) & 0x1f) {
 292                 case 0x1c:
 293                         return 1;
 294                 case 0x1d:
 295                         switch ((cmd >> 16) & 0xff) {
 296                         case 0x3:
 297                                 return (cmd & 0x1f) + 2;
 298                         case 0x4:
 299                                 return (cmd & 0xf) + 2;
 300                         default:
 301                                 return (cmd & 0xffff) + 2;
 302                         }
 303                 case 0x1e:
 304                         if (cmd & (1 << 23))
 305                                 return (cmd & 0xffff) + 1;
 306                         else
 307                                 return 1;
 308                 case 0x1f:
 309                         if ((cmd & (1 << 23)) == 0)     /* inline vertices */
 310                                 return (cmd & 0x1ffff) + 2;
 311                         else if (cmd & (1 << 17))       /* indirect random */
 312                                 if ((cmd & 0xffff) == 0)
 313                                         return 0;       /* unknown length, too hard */
 314                                 else
 315                                         return (((cmd & 0xffff) + 1) / 2) + 1;
 316                         else
 317                                 return 2;       /* indirect sequential */
 318                 default:
 319                         return 0;
 320                 }
 321         default:
 322                 return 0;
 323         }
 324
 325         return 0;
 326 }
 327
 328 static int validate_cmd(int cmd)
 329 {
 330         int ret = do_validate_cmd(cmd);
 331
 332 /*      printk("validate_cmd( %x ): %d\n", cmd, ret); */
 333
 334         return ret;
 335 }
 336
 337 static int i915_emit_cmds(struct drm_device * dev, int __user * buffer,
 338                           int dwords)
 339 {
 340         drm_i915_private_t *dev_priv = dev->dev_private;
 341         int i;
 342         RING_LOCALS;
 343
 344         if ((dwords+1) * sizeof(int) >= dev_priv->ring.Size - 8)
 345                 return -EINVAL;
 346
 347         BEGIN_LP_RING((dwords+1)&~1);
 348
 349         for (i = 0; i < dwords;) {
 350                 int cmd, sz;
 351
 352                 if (DRM_COPY_FROM_USER_UNCHECKED(&cmd, &buffer[i], sizeof(cmd)))
 353                         return -EINVAL;
 354
 355                 if ((sz = validate_cmd(cmd)) == 0 || i + sz > dwords)
 356                         return -EINVAL;
 357
 358                 OUT_RING(cmd);
 359
 360                 while (++i, --sz) {
 361                         if (DRM_COPY_FROM_USER_UNCHECKED(&cmd, &buffer[i],
 362                                                          sizeof(cmd))) {
 363                                 return -EINVAL;
 364                         }
 365                         OUT_RING(cmd);
 366                 }
 367         }
 368
 369         if (dwords & 1)
 370                 OUT_RING(0);
 371
 372         ADVANCE_LP_RING();
 373
 374         return 0;
 375 }
 376
 377 static int i915_emit_box(struct drm_device * dev,
 378                          struct drm_clip_rect __user * boxes,
 379                          int i, int DR1, int DR4)
 380 {
 381         drm_i915_private_t *dev_priv = dev->dev_private;
 382         struct drm_clip_rect box;
 383         RING_LOCALS;
 384
 385         if (DRM_COPY_FROM_USER_UNCHECKED(&box, &boxes[i], sizeof(box))) {
 386                 return -EFAULT;
 387         }
 388
 389         if (box.y2 <= box.y1 || box.x2 <= box.x1 || box.y2 <= 0 || box.x2 <= 0) {
 390                 DRM_ERROR("Bad box %d,%d..%d,%d\n",
 391                           box.x1, box.y1, box.x2, box.y2);
 392                 return -EINVAL;
 393         }
 394
 395         if (IS_I965G(dev)) {
 396                 BEGIN_LP_RING(4);
 397                 OUT_RING(GFX_OP_DRAWRECT_INFO_I965);
 398                 OUT_RING((box.x1 & 0xffff) | (box.y1 << 16));
 399                 OUT_RING(((box.x2 - 1) & 0xffff) | ((box.y2 - 1) << 16));
 400                 OUT_RING(DR4);
 401                 ADVANCE_LP_RING();
 402         } else {
 403                 BEGIN_LP_RING(6);
 404                 OUT_RING(GFX_OP_DRAWRECT_INFO);
 405                 OUT_RING(DR1);
 406                 OUT_RING((box.x1 & 0xffff) | (box.y1 << 16));
 407                 OUT_RING(((box.x2 - 1) & 0xffff) | ((box.y2 - 1) << 16));
 408                 OUT_RING(DR4);
 409                 OUT_RING(0);
 410                 ADVANCE_LP_RING();
 411         }
 412
 413         return 0;
 414 }
 415
 416 /* XXX: Emitting the counter should really be moved to part of the IRQ
 417  * emit.  For now, do it in both places:
 418  */
 419
 420 void i915_emit_breadcrumb(struct drm_device *dev)
 421 {
 422         drm_i915_private_t *dev_priv = dev->dev_private;
 423         RING_LOCALS;
 424
 425         if (++dev_priv->counter > BREADCRUMB_MASK) {
 426                  dev_priv->counter = 1;
 427                  DRM_DEBUG("Breadcrumb counter wrapped around\n");
 428         }
 429
 430         dev_priv->sarea_priv->last_enqueue = dev_priv->counter;
 431
 432         BEGIN_LP_RING(4);
 433         OUT_RING(CMD_STORE_DWORD_IDX);
 434         OUT_RING(20);
 435         OUT_RING(dev_priv->counter);
 436         OUT_RING(0);
 437         ADVANCE_LP_RING();
 438 }
 439
 440
 441 int i915_emit_mi_flush(struct drm_device *dev, uint32_t flush)
 442 {
 443         drm_i915_private_t *dev_priv = dev->dev_private;
 444         uint32_t flush_cmd = CMD_MI_FLUSH;
 445         RING_LOCALS;
 446
 447         flush_cmd |= flush;
 448
 449         i915_kernel_lost_context(dev);
 450
 451         BEGIN_LP_RING(4);
 452         OUT_RING(flush_cmd);
 453         OUT_RING(0);
 454         OUT_RING(0);
 455         OUT_RING(0);
 456         ADVANCE_LP_RING();
 457
 458         return 0;
 459 }
 460
 461
 462 static int i915_dispatch_cmdbuffer(struct drm_device * dev,
 463                                    drm_i915_cmdbuffer_t * cmd)
 464 {
 465 #ifdef I915_HAVE_FENCE
 466         drm_i915_private_t *dev_priv = dev->dev_private;
 467 #endif
 468         int nbox = cmd->num_cliprects;
 469         int i = 0, count, ret;
 470
 471         if (cmd->sz & 0x3) {
 472                 DRM_ERROR("alignment\n");
 473                 return -EINVAL;
 474         }
 475
 476         i915_kernel_lost_context(dev);
 477
 478         count = nbox ? nbox : 1;
 479
 480         for (i = 0; i < count; i++) {
 481                 if (i < nbox) {
 482                         ret = i915_emit_box(dev, cmd->cliprects, i,
 483                                             cmd->DR1, cmd->DR4);
 484                         if (ret)
 485                                 return ret;
 486                 }
 487
 488                 ret = i915_emit_cmds(dev, (int __user *)cmd->buf, cmd->sz / 4);
 489                 if (ret)
 490                         return ret;
 491         }
 492
 493         i915_emit_breadcrumb( dev );
 494 #ifdef I915_HAVE_FENCE
 495         drm_fence_flush_old(dev, 0, dev_priv->counter);
 496 #endif
 497         return 0;
 498 }
 499
 500 static int i915_dispatch_batchbuffer(struct drm_device * dev,
 501                                      drm_i915_batchbuffer_t * batch)
 502 {
 503         drm_i915_private_t *dev_priv = dev->dev_private;
 504         struct drm_clip_rect __user *boxes = batch->cliprects;
 505         int nbox = batch->num_cliprects;
 506         int i = 0, count;
 507         RING_LOCALS;
 508
 509         if ((batch->start | batch->used) & 0x7) {
 510                 DRM_ERROR("alignment\n");
 511                 return -EINVAL;
 512         }
 513
 514         i915_kernel_lost_context(dev);
 515
 516         count = nbox ? nbox : 1;
 517
 518         for (i = 0; i < count; i++) {
 519                 if (i < nbox) {
 520                         int ret = i915_emit_box(dev, boxes, i,
 521                                                 batch->DR1, batch->DR4);
 522                         if (ret)
 523                                 return ret;
 524                 }
 525
 526                 if (dev_priv->use_mi_batchbuffer_start) {
 527                         BEGIN_LP_RING(2);
 528                         if (IS_I965G(dev)) {
 529                                 OUT_RING(MI_BATCH_BUFFER_START | (2 << 6) | MI_BATCH_NON_SECURE_I965);
 530                                 OUT_RING(batch->start);
 531                         } else {
 532                                 OUT_RING(MI_BATCH_BUFFER_START | (2 << 6));
 533                                 OUT_RING(batch->start | MI_BATCH_NON_SECURE);
 534                         }
 535                         ADVANCE_LP_RING();
 536
 537                 } else {
 538                         BEGIN_LP_RING(4);
 539                         OUT_RING(MI_BATCH_BUFFER);
 540                         OUT_RING(batch->start | MI_BATCH_NON_SECURE);
 541                         OUT_RING(batch->start + batch->used - 4);
 542                         OUT_RING(0);
 543                         ADVANCE_LP_RING();
 544                 }
 545         }
 546
 547         i915_emit_breadcrumb( dev );
 548 #ifdef I915_HAVE_FENCE
 549         drm_fence_flush_old(dev, 0, dev_priv->counter);
 550 #endif
 551         return 0;
 552 }
 553
 554 static void i915_do_dispatch_flip(struct drm_device * dev, int plane, int sync)
 555 {
 556         drm_i915_private_t *dev_priv = dev->dev_private;
 557         u32 num_pages, current_page, next_page, dspbase;
 558         int shift = 2 * plane, x, y;
 559         RING_LOCALS;
 560
 561         /* Calculate display base offset */
 562         num_pages = dev_priv->sarea_priv->third_handle ? 3 : 2;
 563         current_page = (dev_priv->sarea_priv->pf_current_page >> shift) & 0x3;
 564         next_page = (current_page + 1) % num_pages;
 565
 566         switch (next_page) {
 567         default:
 568         case 0:
 569                 dspbase = dev_priv->sarea_priv->front_offset;
 570                 break;
 571         case 1:
 572                 dspbase = dev_priv->sarea_priv->back_offset;
 573                 break;
 574         case 2:
 575                 dspbase = dev_priv->sarea_priv->third_offset;
 576                 break;
 577         }
 578
 579         if (plane == 0) {
 580                 x = dev_priv->sarea_priv->planeA_x;
 581                 y = dev_priv->sarea_priv->planeA_y;
 582         } else {
 583                 x = dev_priv->sarea_priv->planeB_x;
 584                 y = dev_priv->sarea_priv->planeB_y;
 585         }
 586
 587         dspbase += (y * dev_priv->sarea_priv->pitch + x) * dev_priv->cpp;
 588
 589         DRM_DEBUG("plane=%d current_page=%d dspbase=0x%x\n", plane, current_page,
 590                   dspbase);
 591
 592         BEGIN_LP_RING(4);
 593         OUT_RING(sync ? 0 :
 594                  (MI_WAIT_FOR_EVENT | (plane ? MI_WAIT_FOR_PLANE_B_FLIP :
 595                                        MI_WAIT_FOR_PLANE_A_FLIP)));
 596         OUT_RING(CMD_OP_DISPLAYBUFFER_INFO | (sync ? 0 : ASYNC_FLIP) |
 597                  (plane ? DISPLAY_PLANE_B : DISPLAY_PLANE_A));
 598         OUT_RING(dev_priv->sarea_priv->pitch * dev_priv->cpp);
 599         OUT_RING(dspbase);
 600         ADVANCE_LP_RING();
 601
 602         dev_priv->sarea_priv->pf_current_page &= ~(0x3 << shift);
 603         dev_priv->sarea_priv->pf_current_page |= next_page << shift;
 604 }
 605
 606 void i915_dispatch_flip(struct drm_device * dev, int planes, int sync)
 607 {
 608         drm_i915_private_t *dev_priv = dev->dev_private;
 609         int i;
 610
 611         DRM_DEBUG("%s: planes=0x%x pfCurrentPage=%d\n",
 612                   __FUNCTION__,
 613                   planes, dev_priv->sarea_priv->pf_current_page);
 614
 615         i915_emit_mi_flush(dev, MI_READ_FLUSH | MI_EXE_FLUSH);
 616
 617         for (i = 0; i < 2; i++)
 618                 if (planes & (1 << i))
 619                         i915_do_dispatch_flip(dev, i, sync);
 620
 621         i915_emit_breadcrumb(dev);
 622 #ifdef I915_HAVE_FENCE
 623         if (!sync)
 624                 drm_fence_flush_old(dev, 0, dev_priv->counter);
 625 #endif
 626 }
 627
 628 static int i915_quiescent(struct drm_device * dev)
 629 {
 630         drm_i915_private_t *dev_priv = dev->dev_private;
 631
 632         i915_kernel_lost_context(dev);
 633         return i915_wait_ring(dev, dev_priv->ring.Size - 8, __FUNCTION__);
 634 }
 635
 636 static int i915_flush_ioctl(struct drm_device *dev, void *data,
 637                             struct drm_file *file_priv)
 638 {
 639
 640         LOCK_TEST_WITH_RETURN(dev, file_priv);
 641
 642         return i915_quiescent(dev);
 643 }
 644
 645 static int i915_batchbuffer(struct drm_device *dev, void *data,
 646                             struct drm_file *file_priv)
 647 {
 648         drm_i915_private_t *dev_priv = (drm_i915_private_t *) dev->dev_private;
 649         drm_i915_sarea_t *sarea_priv = (drm_i915_sarea_t *)
 650             dev_priv->sarea_priv;
 651         drm_i915_batchbuffer_t *batch = data;
 652         int ret;
 653
 654         if (!dev_priv->allow_batchbuffer) {
 655                 DRM_ERROR("Batchbuffer ioctl disabled\n");
 656                 return -EINVAL;
 657         }
 658
 659         DRM_DEBUG("i915 batchbuffer, start %x used %d cliprects %d\n",
 660                   batch->start, batch->used, batch->num_cliprects);
 661
 662         LOCK_TEST_WITH_RETURN(dev, file_priv);
 663
 664         if (batch->num_cliprects && DRM_VERIFYAREA_READ(batch->cliprects,
 665                                                         batch->num_cliprects *
 666                                                         sizeof(struct drm_clip_rect)))
 667                 return -EFAULT;
 668
 669         ret = i915_dispatch_batchbuffer(dev, batch);
 670
 671         sarea_priv->last_dispatch = READ_BREADCRUMB(dev_priv);
 672         return ret;
 673 }
 674
 675 static int i915_cmdbuffer(struct drm_device *dev, void *data,
 676                           struct drm_file *file_priv)
 677 {
 678         drm_i915_private_t *dev_priv = (drm_i915_private_t *) dev->dev_private;
 679         drm_i915_sarea_t *sarea_priv = (drm_i915_sarea_t *)
 680             dev_priv->sarea_priv;
 681         drm_i915_cmdbuffer_t *cmdbuf = data;
 682         int ret;
 683
 684         DRM_DEBUG("i915 cmdbuffer, buf %p sz %d cliprects %d\n",
 685                   cmdbuf->buf, cmdbuf->sz, cmdbuf->num_cliprects);
 686
 687         LOCK_TEST_WITH_RETURN(dev, file_priv);
 688
 689         if (cmdbuf->num_cliprects &&
 690             DRM_VERIFYAREA_READ(cmdbuf->cliprects,
 691                                 cmdbuf->num_cliprects *
 692                                 sizeof(struct drm_clip_rect))) {
 693                 DRM_ERROR("Fault accessing cliprects\n");
 694                 return -EFAULT;
 695         }
 696
 697         ret = i915_dispatch_cmdbuffer(dev, cmdbuf);
 698         if (ret) {
 699                 DRM_ERROR("i915_dispatch_cmdbuffer failed\n");
 700                 return ret;
 701         }
 702
 703         sarea_priv->last_dispatch = READ_BREADCRUMB(dev_priv);
 704         return 0;
 705 }
 706
 707 #ifdef I915_HAVE_BUFFER
 708 struct i915_relocatee_info {
 709         struct drm_buffer_object *buf;
 710         unsigned long offset;
 711         u32 *data_page;
 712         unsigned page_offset;
 713         struct drm_bo_kmap_obj kmap;
 714         int is_iomem;
 715 };
 716
 717 static void i915_dereference_buffers_locked(struct drm_buffer_object **buffers,
 718                                             unsigned num_buffers)
 719 {
 720         while (num_buffers--)
 721                 drm_bo_usage_deref_locked(&buffers[num_buffers]);
 722 }
 723
 724 int i915_apply_reloc(struct drm_file *file_priv, int num_buffers,
 725                      struct drm_buffer_object **buffers,
 726                      struct i915_relocatee_info *relocatee,
 727                      uint32_t *reloc)
 728 {
 729         unsigned index;
 730         unsigned long new_cmd_offset;
 731         u32 val;
 732         int ret;
 733
 734         if (reloc[2] >= num_buffers) {
 735                 DRM_ERROR("Illegal relocation buffer %08X\n", reloc[2]);
 736                 return -EINVAL;
 737         }
 738
 739         new_cmd_offset = reloc[0];
 740         if (!relocatee->data_page ||
 741             !drm_bo_same_page(relocatee->offset, new_cmd_offset)) {
 742                 drm_bo_kunmap(&relocatee->kmap);
 743                 relocatee->offset = new_cmd_offset;
 744                 ret = drm_bo_kmap(relocatee->buf, new_cmd_offset >> PAGE_SHIFT,
 745                                   1, &relocatee->kmap);
 746                 if (ret) {
 747                         DRM_ERROR("Could not map command buffer to apply relocs\n %08lx", new_cmd_offset);
 748                         return ret;
 749                 }
 750
 751                 relocatee->data_page = drm_bmo_virtual(&relocatee->kmap,
 752                                                        &relocatee->is_iomem);
 753                 relocatee->page_offset = (relocatee->offset & PAGE_MASK);
 754         }
 755
 756         val = buffers[reloc[2]]->offset;
 757         index = (reloc[0] - relocatee->page_offset) >> 2;
 758
 759         /* add in validate */
 760         val = val + reloc[1];
 761
 762         relocatee->data_page[index] = val;
 763         return 0;
 764 }
 765
 766 int i915_process_relocs(struct drm_file *file_priv,
 767                         uint32_t buf_handle,
 768                         uint32_t *reloc_buf_handle,
 769                         struct i915_relocatee_info *relocatee,
 770                         struct drm_buffer_object **buffers,
 771                         uint32_t num_buffers)
 772 {
 773         struct drm_device *dev = file_priv->head->dev;
 774         struct drm_buffer_object *reloc_list_object;
 775         uint32_t cur_handle = *reloc_buf_handle;
 776         uint32_t *reloc_page;
 777         int ret, reloc_is_iomem, reloc_stride;
 778         uint32_t num_relocs, reloc_offset, reloc_end, reloc_page_offset, next_offset, cur_offset;
 779         struct drm_bo_kmap_obj reloc_kmap;
 780
 781         memset(&reloc_kmap, 0, sizeof(reloc_kmap));
 782
 783         mutex_lock(&dev->struct_mutex);
 784         reloc_list_object = drm_lookup_buffer_object(file_priv, cur_handle, 1);
 785         mutex_unlock(&dev->struct_mutex);
 786         if (!reloc_list_object)
 787                 return -EINVAL;
 788
 789         ret = drm_bo_kmap(reloc_list_object, 0, 1, &reloc_kmap);
 790         if (ret) {
 791                 DRM_ERROR("Could not map relocation buffer.\n");
 792                 goto out;
 793         }
 794
 795         reloc_page = drm_bmo_virtual(&reloc_kmap, &reloc_is_iomem);
 796         num_relocs = reloc_page[0] & 0xffff;
 797
 798         if ((reloc_page[0] >> 16) & 0xffff) {
 799                 DRM_ERROR("Unsupported relocation type requested\n");
 800                 goto out;
 801         }
 802
 803         /* get next relocate buffer handle */
 804         *reloc_buf_handle = reloc_page[1];
 805         reloc_stride = I915_RELOC0_STRIDE * sizeof(uint32_t); /* may be different for other types of relocs */
 806
 807         DRM_DEBUG("num relocs is %d, next is %08X\n", num_relocs, reloc_page[1]);
 808
 809         reloc_page_offset = 0;
 810         reloc_offset = I915_RELOC_HEADER * sizeof(uint32_t);
 811         reloc_end = reloc_offset + (num_relocs * reloc_stride);
 812
 813         do {
 814                 next_offset = drm_bo_offset_end(reloc_offset, reloc_end);
 815
 816                 do {
 817                         cur_offset = ((reloc_offset + reloc_page_offset) & ~PAGE_MASK) / sizeof(uint32_t);
 818                         ret = i915_apply_reloc(file_priv, num_buffers,
 819                                          buffers, relocatee, &reloc_page[cur_offset]);
 820                         if (ret)
 821                                 goto out;
 822
 823                         reloc_offset += reloc_stride;
 824                 } while (reloc_offset < next_offset);
 825
 826                 drm_bo_kunmap(&reloc_kmap);
 827
 828                 reloc_offset = next_offset;
 829                 if (reloc_offset != reloc_end) {
 830                         ret = drm_bo_kmap(reloc_list_object, reloc_offset >> PAGE_SHIFT, 1, &reloc_kmap);
 831                         if (ret) {
 832                                 DRM_ERROR("Could not map relocation buffer.\n");
 833                                 goto out;
 834                         }
 835
 836                         reloc_page = drm_bmo_virtual(&reloc_kmap, &reloc_is_iomem);
 837                         reloc_page_offset = reloc_offset & ~PAGE_MASK;
 838                 }
 839
 840         } while (reloc_offset != reloc_end);
 841 out:
 842         drm_bo_kunmap(&relocatee->kmap);
 843         relocatee->data_page = NULL;
 844
 845         drm_bo_kunmap(&reloc_kmap);
 846
 847         mutex_lock(&dev->struct_mutex);
 848         drm_bo_usage_deref_locked(&reloc_list_object);
 849         mutex_unlock(&dev->struct_mutex);
 850
 851         return ret;
 852 }
 853
 854 static int i915_exec_reloc(struct drm_file *file_priv, drm_handle_t buf_handle,
 855                            drm_handle_t buf_reloc_handle,
 856                            struct drm_buffer_object **buffers,
 857                            uint32_t buf_count)
 858 {
 859         struct drm_device *dev = file_priv->head->dev;
 860         struct i915_relocatee_info relocatee;
 861         int ret = 0;
 862
 863         memset(&relocatee, 0, sizeof(relocatee));
 864
 865         mutex_lock(&dev->struct_mutex);
 866         relocatee.buf = drm_lookup_buffer_object(file_priv, buf_handle, 1);
 867         mutex_unlock(&dev->struct_mutex);
 868         if (!relocatee.buf) {
 869                 DRM_DEBUG("relocatee buffer invalid %08x\n", buf_handle);
 870                 ret = -EINVAL;
 871                 goto out_err;
 872         }
 873
 874         while (buf_reloc_handle) {
 875                 ret = i915_process_relocs(file_priv, buf_handle, &buf_reloc_handle, &relocatee, buffers, buf_count);
 876                 if (ret) {
 877                         DRM_ERROR("process relocs failed\n");
 878                         break;
 879                 }
 880         }
 881
 882         mutex_lock(&dev->struct_mutex);
 883         drm_bo_usage_deref_locked(&relocatee.buf);
 884         mutex_unlock(&dev->struct_mutex);
 885
 886 out_err:
 887         return ret;
 888 }
 889
 890 /*
 891  * Validate, add fence and relocate a block of bos from a userspace list
 892  */
 893 int i915_validate_buffer_list(struct drm_file *file_priv,
 894                               unsigned int fence_class, uint64_t data,
 895                               struct drm_buffer_object **buffers,
 896                               uint32_t *num_buffers)
 897 {
 898         struct drm_i915_op_arg arg;
 899         struct drm_bo_op_req *req = &arg.d.req;
 900         struct drm_bo_arg_rep rep;
 901         unsigned long next = 0;
 902         int ret = 0;
 903         unsigned buf_count = 0;
 904         struct drm_device *dev = file_priv->head->dev;
 905         uint32_t buf_reloc_handle, buf_handle;
 906
 907
 908         do {
 909                 if (buf_count >= *num_buffers) {
 910                         DRM_ERROR("Buffer count exceeded %d\n.", *num_buffers);
 911                         ret = -EINVAL;
 912                         goto out_err;
 913                 }
 914
 915                 buffers[buf_count] = NULL;
 916
 917                 if (copy_from_user(&arg, (void __user *)(unsigned)data, sizeof(arg))) {
 918                         ret = -EFAULT;
 919                         goto out_err;
 920                 }
 921
 922                 if (arg.handled) {
 923                         data = arg.next;
 924                         mutex_lock(&dev->struct_mutex);
 925                         buffers[buf_count] = drm_lookup_buffer_object(file_priv, req->arg_handle, 1);
 926                         mutex_unlock(&dev->struct_mutex);
 927                         buf_count++;
 928                         continue;
 929                 }
 930
 931                 rep.ret = 0;
 932                 if (req->op != drm_bo_validate) {
 933                         DRM_ERROR
 934                             ("Buffer object operation wasn't \"validate\".\n");
 935                         rep.ret = -EINVAL;
 936                         goto out_err;
 937                 }
 938
 939                 buf_handle = req->bo_req.handle;
 940                 buf_reloc_handle = arg.reloc_handle;
 941
 942                 if (buf_reloc_handle) {
 943                         ret = i915_exec_reloc(file_priv, buf_handle, buf_reloc_handle, buffers, buf_count);
 944                         if (ret)
 945                                 goto out_err;
 946                         DRM_MEMORYBARRIER();
 947                 }
 948
 949                 rep.ret = drm_bo_handle_validate(file_priv, req->bo_req.handle,
 950                                                  req->bo_req.fence_class,
 951                                                  req->bo_req.flags,
 952                                                  req->bo_req.mask,
 953                                                  req->bo_req.hint,
 954                                                  0,
 955                                                  &rep.bo_info,
 956                                                  &buffers[buf_count]);
 957
 958                 if (rep.ret) {
 959                         DRM_ERROR("error on handle validate %d\n", rep.ret);
 960                         goto out_err;
 961                 }
 962
 963
 964                 next = arg.next;
 965                 arg.handled = 1;
 966                 arg.d.rep = rep;
 967
 968                 if (copy_to_user((void __user *)(unsigned)data, &arg, sizeof(arg)))
 969                         return -EFAULT;
 970
 971                 data = next;
 972                 buf_count++;
 973
 974         } while (next != 0);
 975         *num_buffers = buf_count;
 976         return 0;
 977 out_err:
 978         mutex_lock(&dev->struct_mutex);
 979         i915_dereference_buffers_locked(buffers, buf_count);
 980         mutex_unlock(&dev->struct_mutex);
 981         *num_buffers = 0;
 982         return (ret) ? ret : rep.ret;
 983 }
 984
 985 static int i915_execbuffer(struct drm_device *dev, void *data,
 986                            struct drm_file *file_priv)
 987 {
 988         drm_i915_private_t *dev_priv = (drm_i915_private_t *) dev->dev_private;
 989         drm_i915_sarea_t *sarea_priv = (drm_i915_sarea_t *)
 990                 dev_priv->sarea_priv;
 991         struct drm_i915_execbuffer *exec_buf = data;
 992         struct _drm_i915_batchbuffer *batch = &exec_buf->batch;
 993         struct drm_fence_arg *fence_arg = &exec_buf->fence_arg;
 994         int num_buffers;
 995         int ret;
 996         struct drm_buffer_object **buffers;
 997         struct drm_fence_object *fence;
 998
 999         if (!dev_priv->allow_batchbuffer) {
1000                 DRM_ERROR("Batchbuffer ioctl disabled\n");
1001                 return -EINVAL;
1002         }
1003
1004
1005         if (batch->num_cliprects && DRM_VERIFYAREA_READ(batch->cliprects,
1006                                                         batch->num_cliprects *
1007                                                         sizeof(struct drm_clip_rect)))
1008                 return -EFAULT;
1009
1010         if (exec_buf->num_buffers > dev_priv->max_validate_buffers)
1011                 return -EINVAL;
1012
1013
1014         ret = drm_bo_read_lock(&dev->bm.bm_lock);
1015         if (ret)
1016                 return ret;
1017
1018         /*
1019          * The cmdbuf_mutex makes sure the validate-submit-fence
1020          * operation is atomic.
1021          */
1022
1023         ret = mutex_lock_interruptible(&dev_priv->cmdbuf_mutex);
1024         if (ret) {
1025                 drm_bo_read_unlock(&dev->bm.bm_lock);
1026                 return -EAGAIN;
1027         }
1028
1029         num_buffers = exec_buf->num_buffers;
1030
1031         buffers = drm_calloc(num_buffers, sizeof(struct drm_buffer_object *), DRM_MEM_DRIVER);
1032         if (!buffers) {
1033                 drm_bo_read_unlock(&dev->bm.bm_lock);
1034                 mutex_unlock(&dev_priv->cmdbuf_mutex);
1035                 return -ENOMEM;
1036         }
1037
1038         /* validate buffer list + fixup relocations */
1039         ret = i915_validate_buffer_list(file_priv, 0, exec_buf->ops_list,
1040                                         buffers, &num_buffers);
1041         if (ret)
1042                 goto out_free;
1043
1044         /* make sure all previous memory operations have passed */
1045         DRM_MEMORYBARRIER();
1046         drm_agp_chipset_flush(dev);
1047
1048         /* submit buffer */
1049         batch->start = buffers[num_buffers-1]->offset;
1050
1051         DRM_DEBUG("i915 exec batchbuffer, start %x used %d cliprects %d\n",
1052                   batch->start, batch->used, batch->num_cliprects);
1053
1054         ret = i915_dispatch_batchbuffer(dev, batch);
1055         if (ret)
1056                 goto out_err0;
1057
1058         sarea_priv->last_dispatch = READ_BREADCRUMB(dev_priv);
1059
1060         /* fence */
1061         ret = drm_fence_buffer_objects(dev, NULL, 0, NULL, &fence);
1062         if (ret)
1063                 goto out_err0;
1064
1065         if (!(fence_arg->flags & DRM_FENCE_FLAG_NO_USER)) {
1066                 ret = drm_fence_add_user_object(file_priv, fence, fence_arg->flags & DRM_FENCE_FLAG_SHAREABLE);
1067                 if (!ret) {
1068                         fence_arg->handle = fence->base.hash.key;
1069                         fence_arg->fence_class = fence->fence_class;
1070                         fence_arg->type = fence->type;
1071                         fence_arg->signaled = fence->signaled;
1072                 }
1073         }
1074         drm_fence_usage_deref_unlocked(&fence);
1075 out_err0:
1076
1077         /* handle errors */
1078         mutex_lock(&dev->struct_mutex);
1079         i915_dereference_buffers_locked(buffers, num_buffers);
1080         mutex_unlock(&dev->struct_mutex);
1081
1082 out_free:
1083         drm_free(buffers, (exec_buf->num_buffers * sizeof(struct drm_buffer_object *)), DRM_MEM_DRIVER);
1084
1085         mutex_unlock(&dev_priv->cmdbuf_mutex);
1086         drm_bo_read_unlock(&dev->bm.bm_lock);
1087         return ret;
1088 }
1089 #endif
1090
1091 static int i915_do_cleanup_pageflip(struct drm_device * dev)
1092 {
1093         drm_i915_private_t *dev_priv = dev->dev_private;
1094         int i, planes, num_pages = dev_priv->sarea_priv->third_handle ? 3 : 2;
1095
1096         DRM_DEBUG("%s\n", __FUNCTION__);
1097
1098         for (i = 0, planes = 0; i < 2; i++)
1099                 if (dev_priv->sarea_priv->pf_current_page & (0x3 << (2 * i))) {
1100                         dev_priv->sarea_priv->pf_current_page =
1101                                 (dev_priv->sarea_priv->pf_current_page &
1102                                  ~(0x3 << (2 * i))) | (num_pages - 1) << (2 * i);
1103
1104                         planes |= 1 << i;
1105                 }
1106
1107         if (planes)
1108                 i915_dispatch_flip(dev, planes, 0);
1109
1110         return 0;
1111 }
1112
1113 static int i915_flip_bufs(struct drm_device *dev, void *data, struct drm_file *file_priv)
1114 {
1115         drm_i915_flip_t *param = data;
1116
1117         DRM_DEBUG("%s\n", __FUNCTION__);
1118
1119         LOCK_TEST_WITH_RETURN(dev, file_priv);
1120
1121         /* This is really planes */
1122         if (param->pipes & ~0x3) {
1123                 DRM_ERROR("Invalid planes 0x%x, only <= 0x3 is valid\n",
1124                           param->pipes);
1125                 return -EINVAL;
1126         }
1127
1128         i915_dispatch_flip(dev, param->pipes, 0);
1129
1130         return 0;
1131 }
1132
1133
1134 static int i915_getparam(struct drm_device *dev, void *data,
1135                          struct drm_file *file_priv)
1136 {
1137         drm_i915_private_t *dev_priv = dev->dev_private;
1138         drm_i915_getparam_t *param = data;
1139         int value;
1140
1141         if (!dev_priv) {
1142                 DRM_ERROR("%s called with no initialization\n", __FUNCTION__);
1143                 return -EINVAL;
1144         }
1145
1146         switch (param->param) {
1147         case I915_PARAM_IRQ_ACTIVE:
1148                 value = dev->irq ? 1 : 0;
1149                 break;
1150         case I915_PARAM_ALLOW_BATCHBUFFER:
1151                 value = dev_priv->allow_batchbuffer ? 1 : 0;
1152                 break;
1153         case I915_PARAM_LAST_DISPATCH:
1154                 value = READ_BREADCRUMB(dev_priv);
1155                 break;
1156         default:
1157                 DRM_ERROR("Unknown parameter %d\n", param->param);
1158                 return -EINVAL;
1159         }
1160
1161         if (DRM_COPY_TO_USER(param->value, &value, sizeof(int))) {
1162                 DRM_ERROR("DRM_COPY_TO_USER failed\n");
1163                 return -EFAULT;
1164         }
1165
1166         return 0;
1167 }
1168
1169 static int i915_setparam(struct drm_device *dev, void *data,
1170                          struct drm_file *file_priv)
1171 {
1172         drm_i915_private_t *dev_priv = dev->dev_private;
1173         drm_i915_setparam_t *param = data;
1174
1175         if (!dev_priv) {
1176                 DRM_ERROR("%s called with no initialization\n", __FUNCTION__);
1177                 return -EINVAL;
1178         }
1179
1180         switch (param->param) {
1181         case I915_SETPARAM_USE_MI_BATCHBUFFER_START:
1182                 dev_priv->use_mi_batchbuffer_start = param->value;
1183                 break;
1184         case I915_SETPARAM_TEX_LRU_LOG_GRANULARITY:
1185                 dev_priv->tex_lru_log_granularity = param->value;
1186                 break;
1187         case I915_SETPARAM_ALLOW_BATCHBUFFER:
1188                 dev_priv->allow_batchbuffer = param->value;
1189                 break;
1190         default:
1191                 DRM_ERROR("unknown parameter %d\n", param->param);
1192                 return -EINVAL;
1193         }
1194
1195         return 0;
1196 }
1197
1198 drm_i915_mmio_entry_t mmio_table[] = {
1199         [MMIO_REGS_PS_DEPTH_COUNT] = {
1200                 I915_MMIO_MAY_READ|I915_MMIO_MAY_WRITE,
1201                 0x2350,
1202                 8
1203         }
1204 };
1205
1206 static int mmio_table_size = sizeof(mmio_table)/sizeof(drm_i915_mmio_entry_t);
1207
1208 static int i915_mmio(struct drm_device *dev, void *data,
1209                      struct drm_file *file_priv)
1210 {
1211         uint32_t buf[8];
1212         drm_i915_private_t *dev_priv = dev->dev_private;
1213         drm_i915_mmio_entry_t *e;
1214         drm_i915_mmio_t *mmio = data;
1215         void __iomem *base;
1216         int i;
1217
1218         if (!dev_priv) {
1219                 DRM_ERROR("%s called with no initialization\n", __FUNCTION__);
1220                 return -EINVAL;
1221         }
1222
1223         if (mmio->reg >= mmio_table_size)
1224                 return -EINVAL;
1225
1226         e = &mmio_table[mmio->reg];
1227         base = (u8 *) dev_priv->mmio_map->handle + e->offset;
1228
1229         switch (mmio->read_write) {
1230                 case I915_MMIO_READ:
1231                         if (!(e->flag & I915_MMIO_MAY_READ))
1232                                 return -EINVAL;
1233                         for (i = 0; i < e->size / 4; i++)
1234                                 buf[i] = I915_READ(e->offset + i * 4);
1235                         if (DRM_COPY_TO_USER(mmio->data, buf, e->size)) {
1236                                 DRM_ERROR("DRM_COPY_TO_USER failed\n");
1237                                 return -EFAULT;
1238                         }
1239                         break;
1240
1241                 case I915_MMIO_WRITE:
1242                         if (!(e->flag & I915_MMIO_MAY_WRITE))
1243                                 return -EINVAL;
1244                         if(DRM_COPY_FROM_USER(buf, mmio->data, e->size)) {
1245                                 DRM_ERROR("DRM_COPY_TO_USER failed\n");
1246                                 return -EFAULT;
1247                         }
1248                         for (i = 0; i < e->size / 4; i++)
1249                                 I915_WRITE(e->offset + i * 4, buf[i]);
1250                         break;
1251         }
1252         return 0;
1253 }
1254
1255 static int i915_set_status_page(struct drm_device *dev, void *data,
1256                                 struct drm_file *file_priv)
1257 {
1258         drm_i915_private_t *dev_priv = dev->dev_private;
1259         drm_i915_hws_addr_t *hws = data;
1260
1261         if (!dev_priv) {
1262                 DRM_ERROR("%s called with no initialization\n", __FUNCTION__);
1263                 return -EINVAL;
1264         }
1265         DRM_DEBUG("set status page addr 0x%08x\n", (u32)hws->addr);
1266
1267         dev_priv->status_gfx_addr = hws->addr & (0x1ffff<<12);
1268
1269         dev_priv->hws_map.offset = dev->agp->base + hws->addr;
1270         dev_priv->hws_map.size = 4*1024;
1271         dev_priv->hws_map.type = 0;
1272         dev_priv->hws_map.flags = 0;
1273         dev_priv->hws_map.mtrr = 0;
1274
1275         drm_core_ioremap(&dev_priv->hws_map, dev);
1276         if (dev_priv->hws_map.handle == NULL) {
1277                 i915_dma_cleanup(dev);
1278                 dev_priv->status_gfx_addr = 0;
1279                 DRM_ERROR("can not ioremap virtual address for"
1280                                 " G33 hw status page\n");
1281                 return -ENOMEM;
1282         }
1283         dev_priv->hw_status_page = dev_priv->hws_map.handle;
1284
1285         memset(dev_priv->hw_status_page, 0, PAGE_SIZE);
1286         I915_WRITE(0x02080, dev_priv->status_gfx_addr);
1287         DRM_DEBUG("load hws 0x2080 with gfx mem 0x%x\n",
1288                         dev_priv->status_gfx_addr);
1289         DRM_DEBUG("load hws at %p\n", dev_priv->hw_status_page);
1290         return 0;
1291 }
1292
1293 int i915_driver_load(struct drm_device *dev, unsigned long flags)
1294 {
1295         struct drm_i915_private *dev_priv = dev->dev_private;
1296         unsigned long base, size;
1297         int ret = 0, mmio_bar = IS_I9XX(dev) ? 0 : 1;
1298
1299         /* i915 has 4 more counters */
1300         dev->counters += 4;
1301         dev->types[6] = _DRM_STAT_IRQ;
1302         dev->types[7] = _DRM_STAT_PRIMARY;
1303         dev->types[8] = _DRM_STAT_SECONDARY;
1304         dev->types[9] = _DRM_STAT_DMA;
1305
1306         dev_priv = drm_alloc(sizeof(drm_i915_private_t), DRM_MEM_DRIVER);
1307         if (dev_priv == NULL)
1308                 return -ENOMEM;
1309
1310         memset(dev_priv, 0, sizeof(drm_i915_private_t));
1311
1312         dev->dev_private = (void *)dev_priv;
1313
1314         /* Add register map (needed for suspend/resume) */
1315         base = drm_get_resource_start(dev, mmio_bar);
1316         size = drm_get_resource_len(dev, mmio_bar);
1317
1318         ret = drm_addmap(dev, base, size, _DRM_REGISTERS, _DRM_KERNEL,
1319                          &dev_priv->mmio_map);
1320
1321 #if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,25)
1322         intel_init_chipset_flush_compat(dev);
1323 #endif
1324         return ret;
1325 }
1326
1327 int i915_driver_unload(struct drm_device *dev)
1328 {
1329         struct drm_i915_private *dev_priv = dev->dev_private;
1330
1331         if (dev_priv->mmio_map)
1332                 drm_rmmap(dev, dev_priv->mmio_map);
1333
1334         drm_free(dev->dev_private, sizeof(drm_i915_private_t),
1335                  DRM_MEM_DRIVER);
1336 #if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,25)
1337         intel_fini_chipset_flush_compat(dev);
1338 #endif
1339         return 0;
1340 }
1341
1342 void i915_driver_lastclose(struct drm_device * dev)
1343 {
1344         drm_i915_private_t *dev_priv = dev->dev_private;
1345
1346         if (drm_getsarea(dev) && dev_priv->sarea_priv)
1347                 i915_do_cleanup_pageflip(dev);
1348         if (dev_priv->agp_heap)
1349                 i915_mem_takedown(&(dev_priv->agp_heap));
1350
1351         i915_dma_cleanup(dev);
1352 }
1353
1354 void i915_driver_preclose(struct drm_device * dev, struct drm_file *file_priv)
1355 {
1356         drm_i915_private_t *dev_priv = dev->dev_private;
1357         i915_mem_release(dev, file_priv, dev_priv->agp_heap);
1358 }
1359
1360 struct drm_ioctl_desc i915_ioctls[] = {
1361         DRM_IOCTL_DEF(DRM_I915_INIT, i915_dma_init, DRM_AUTH|DRM_MASTER|DRM_ROOT_ONLY),
1362         DRM_IOCTL_DEF(DRM_I915_FLUSH, i915_flush_ioctl, DRM_AUTH),
1363         DRM_IOCTL_DEF(DRM_I915_FLIP, i915_flip_bufs, DRM_AUTH),
1364         DRM_IOCTL_DEF(DRM_I915_BATCHBUFFER, i915_batchbuffer, DRM_AUTH),
1365         DRM_IOCTL_DEF(DRM_I915_IRQ_EMIT, i915_irq_emit, DRM_AUTH),
1366         DRM_IOCTL_DEF(DRM_I915_IRQ_WAIT, i915_irq_wait, DRM_AUTH),
1367         DRM_IOCTL_DEF(DRM_I915_GETPARAM, i915_getparam, DRM_AUTH),
1368         DRM_IOCTL_DEF(DRM_I915_SETPARAM, i915_setparam, DRM_AUTH|DRM_MASTER|DRM_ROOT_ONLY),
1369         DRM_IOCTL_DEF(DRM_I915_ALLOC, i915_mem_alloc, DRM_AUTH),
1370         DRM_IOCTL_DEF(DRM_I915_FREE, i915_mem_free, DRM_AUTH),
1371         DRM_IOCTL_DEF(DRM_I915_INIT_HEAP, i915_mem_init_heap, DRM_AUTH|DRM_MASTER|DRM_ROOT_ONLY),
1372         DRM_IOCTL_DEF(DRM_I915_CMDBUFFER, i915_cmdbuffer, DRM_AUTH),
1373         DRM_IOCTL_DEF(DRM_I915_DESTROY_HEAP,  i915_mem_destroy_heap, DRM_AUTH|DRM_MASTER|DRM_ROOT_ONLY ),
1374         DRM_IOCTL_DEF(DRM_I915_SET_VBLANK_PIPE,  i915_vblank_pipe_set, DRM_AUTH|DRM_MASTER|DRM_ROOT_ONLY ),
1375         DRM_IOCTL_DEF(DRM_I915_GET_VBLANK_PIPE,  i915_vblank_pipe_get, DRM_AUTH ),
1376         DRM_IOCTL_DEF(DRM_I915_VBLANK_SWAP, i915_vblank_swap, DRM_AUTH),
1377         DRM_IOCTL_DEF(DRM_I915_MMIO, i915_mmio, DRM_AUTH),
1378         DRM_IOCTL_DEF(DRM_I915_HWS_ADDR, i915_set_status_page, DRM_AUTH),
1379 #ifdef I915_HAVE_BUFFER
1380         DRM_IOCTL_DEF(DRM_I915_EXECBUFFER, i915_execbuffer, DRM_AUTH),
1381 #endif
1382 };
1383
1384 int i915_max_ioctl = DRM_ARRAY_SIZE(i915_ioctls);
1385
1386 /**
1387  * Determine if the device really is AGP or not.
1388  *
1389  * All Intel graphics chipsets are treated as AGP, even if they are really
1390  * PCI-e.
1391  *
1392  * \param dev   The device to be tested.
1393  *
1394  * \returns
1395  * A value of 1 is always retured to indictate every i9x5 is AGP.
1396  */
1397 int i915_driver_device_is_agp(struct drm_device * dev)
1398 {
1399         return 1;
1400 }
1401
1402 int i915_driver_firstopen(struct drm_device *dev)
1403 {
1404 #ifdef I915_HAVE_BUFFER
1405         if (!IS_I9XX(dev))
1406                 drm_bo_driver_init(dev);
1407 #endif
1408         return 0;
1409 }