shared-core/i915_dma.c

   1 /* i915_dma.c -- DMA support for the I915 -*- linux-c -*-
   2  */
   3 /*
   4  * Copyright 2003 Tungsten Graphics, Inc., Cedar Park, Texas.
   5  * All Rights Reserved.
   6  *
   7  * Permission is hereby granted, free of charge, to any person obtaining a
   8  * copy of this software and associated documentation files (the
   9  * "Software"), to deal in the Software without restriction, including
  10  * without limitation the rights to use, copy, modify, merge, publish,
  11  * distribute, sub license, and/or sell copies of the Software, and to
  12  * permit persons to whom the Software is furnished to do so, subject to
  13  * the following conditions:
  14  *
  15  * The above copyright notice and this permission notice (including the
  16  * next paragraph) shall be included in all copies or substantial portions
  17  * of the Software.
  18  *
  19  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
  20  * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
  21  * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT.
  22  * IN NO EVENT SHALL TUNGSTEN GRAPHICS AND/OR ITS SUPPLIERS BE LIABLE FOR
  23  * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
  24  * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
  25  * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  26  *
  27  */
  28
  29 #include "drmP.h"
  30 #include "drm.h"
  31 #include "i915_drm.h"
  32 #include "i915_drv.h"
  33
  34 #define IS_I965G(dev)  (dev->pci_device == 0x2972 || \
  35                         dev->pci_device == 0x2982 || \
  36                         dev->pci_device == 0x2992 || \
  37                         dev->pci_device == 0x29A2 || \
  38                         dev->pci_device == 0x2A02 || \
  39                         dev->pci_device == 0x2A12)
  40
  41 #define IS_G33(dev)    (dev->pci_device == 0x29C2 || \
  42                         dev->pci_device == 0x29B2 || \
  43                         dev->pci_device == 0x29D2)
  44
  45 /* Really want an OS-independent resettable timer.  Would like to have
  46  * this loop run for (eg) 3 sec, but have the timer reset every time
  47  * the head pointer changes, so that EBUSY only happens if the ring
  48  * actually stalls for (eg) 3 seconds.
  49  */
  50 int i915_wait_ring(struct drm_device * dev, int n, const char *caller)
  51 {
  52         drm_i915_private_t *dev_priv = dev->dev_private;
  53         drm_i915_ring_buffer_t *ring = &(dev_priv->ring);
  54         u32 last_head = I915_READ(LP_RING + RING_HEAD) & HEAD_ADDR;
  55         int i;
  56
  57         for (i = 0; i < 10000; i++) {
  58                 ring->head = I915_READ(LP_RING + RING_HEAD) & HEAD_ADDR;
  59                 ring->space = ring->head - (ring->tail + 8);
  60                 if (ring->space < 0)
  61                         ring->space += ring->Size;
  62                 if (ring->space >= n)
  63                         return 0;
  64
  65                 dev_priv->sarea_priv->perf_boxes |= I915_BOX_WAIT;
  66
  67                 if (ring->head != last_head)
  68                         i = 0;
  69
  70                 last_head = ring->head;
  71                 DRM_UDELAY(1);
  72         }
  73
  74         return -EBUSY;
  75 }
  76
  77 void i915_kernel_lost_context(struct drm_device * dev)
  78 {
  79         drm_i915_private_t *dev_priv = dev->dev_private;
  80         drm_i915_ring_buffer_t *ring = &(dev_priv->ring);
  81
  82         ring->head = I915_READ(LP_RING + RING_HEAD) & HEAD_ADDR;
  83         ring->tail = I915_READ(LP_RING + RING_TAIL) & TAIL_ADDR;
  84         ring->space = ring->head - (ring->tail + 8);
  85         if (ring->space < 0)
  86                 ring->space += ring->Size;
  87
  88         if (ring->head == ring->tail)
  89                 dev_priv->sarea_priv->perf_boxes |= I915_BOX_RING_EMPTY;
  90 }
  91
  92 static int i915_dma_cleanup(struct drm_device * dev)
  93 {
  94         /* Make sure interrupts are disabled here because the uninstall ioctl
  95          * may not have been called from userspace and after dev_private
  96          * is freed, it's too late.
  97          */
  98         if (dev->irq)
  99                 drm_irq_uninstall(dev);
 100
 101         if (dev->dev_private) {
 102                 drm_i915_private_t *dev_priv =
 103                     (drm_i915_private_t *) dev->dev_private;
 104
 105                 if (dev_priv->ring.virtual_start) {
 106                         drm_core_ioremapfree(&dev_priv->ring.map, dev);
 107                 }
 108
 109                 if (dev_priv->status_page_dmah) {
 110                         drm_pci_free(dev, dev_priv->status_page_dmah);
 111                         /* Need to rewrite hardware status page */
 112                         I915_WRITE(0x02080, 0x1ffff000);
 113                 }
 114                 if (dev_priv->status_gfx_addr) {
 115                         dev_priv->status_gfx_addr = 0;
 116                         drm_core_ioremapfree(&dev_priv->hws_map, dev);
 117                         I915_WRITE(0x02080, 0x1ffff000);
 118                 }
 119                 drm_free(dev->dev_private, sizeof(drm_i915_private_t),
 120                          DRM_MEM_DRIVER);
 121
 122                 dev->dev_private = NULL;
 123         }
 124
 125         return 0;
 126 }
 127
 128 static int i915_initialize(struct drm_device * dev,
 129                            drm_i915_private_t * dev_priv,
 130                            drm_i915_init_t * init)
 131 {
 132         memset(dev_priv, 0, sizeof(drm_i915_private_t));
 133
 134         dev_priv->sarea = drm_getsarea(dev);
 135         if (!dev_priv->sarea) {
 136                 DRM_ERROR("can not find sarea!\n");
 137                 dev->dev_private = (void *)dev_priv;
 138                 i915_dma_cleanup(dev);
 139                 return -EINVAL;
 140         }
 141
 142         dev_priv->mmio_map = drm_core_findmap(dev, init->mmio_offset);
 143         if (!dev_priv->mmio_map) {
 144                 dev->dev_private = (void *)dev_priv;
 145                 i915_dma_cleanup(dev);
 146                 DRM_ERROR("can not find mmio map!\n");
 147                 return -EINVAL;
 148         }
 149
 150 #ifdef I915_HAVE_BUFFER
 151         dev_priv->max_validate_buffers = I915_MAX_VALIDATE_BUFFERS;
 152 #endif
 153
 154         dev_priv->sarea_priv = (drm_i915_sarea_t *)
 155             ((u8 *) dev_priv->sarea->handle + init->sarea_priv_offset);
 156
 157         dev_priv->ring.Start = init->ring_start;
 158         dev_priv->ring.End = init->ring_end;
 159         dev_priv->ring.Size = init->ring_size;
 160         dev_priv->ring.tail_mask = dev_priv->ring.Size - 1;
 161
 162         dev_priv->ring.map.offset = init->ring_start;
 163         dev_priv->ring.map.size = init->ring_size;
 164         dev_priv->ring.map.type = 0;
 165         dev_priv->ring.map.flags = 0;
 166         dev_priv->ring.map.mtrr = 0;
 167
 168         drm_core_ioremap(&dev_priv->ring.map, dev);
 169
 170         if (dev_priv->ring.map.handle == NULL) {
 171                 dev->dev_private = (void *)dev_priv;
 172                 i915_dma_cleanup(dev);
 173                 DRM_ERROR("can not ioremap virtual address for"
 174                           " ring buffer\n");
 175                 return -ENOMEM;
 176         }
 177
 178         dev_priv->ring.virtual_start = dev_priv->ring.map.handle;
 179
 180         dev_priv->cpp = init->cpp;
 181         dev_priv->sarea_priv->pf_current_page = 0;
 182
 183         /* We are using separate values as placeholders for mechanisms for
 184          * private backbuffer/depthbuffer usage.
 185          */
 186         dev_priv->use_mi_batchbuffer_start = 0;
 187
 188         /* Allow hardware batchbuffers unless told otherwise.
 189          */
 190         dev_priv->allow_batchbuffer = 1;
 191
 192         /* Enable vblank on pipe A for older X servers
 193          */
 194         dev_priv->vblank_pipe = DRM_I915_VBLANK_PIPE_A;
 195
 196         /* Program Hardware Status Page */
 197         if (!IS_G33(dev)) {
 198                 dev_priv->status_page_dmah =
 199                         drm_pci_alloc(dev, PAGE_SIZE, PAGE_SIZE, 0xffffffff);
 200
 201                 if (!dev_priv->status_page_dmah) {
 202                         dev->dev_private = (void *)dev_priv;
 203                         i915_dma_cleanup(dev);
 204                         DRM_ERROR("Can not allocate hardware status page\n");
 205                         return -ENOMEM;
 206                 }
 207                 dev_priv->hw_status_page = dev_priv->status_page_dmah->vaddr;
 208                 dev_priv->dma_status_page = dev_priv->status_page_dmah->busaddr;
 209
 210                 memset(dev_priv->hw_status_page, 0, PAGE_SIZE);
 211
 212                 I915_WRITE(0x02080, dev_priv->dma_status_page);
 213         }
 214         DRM_DEBUG("Enabled hardware status page\n");
 215         dev->dev_private = (void *)dev_priv;
 216         mutex_init(&dev_priv->cmdbuf_mutex);
 217         return 0;
 218 }
 219
 220 static int i915_dma_resume(struct drm_device * dev)
 221 {
 222         drm_i915_private_t *dev_priv = (drm_i915_private_t *) dev->dev_private;
 223
 224         DRM_DEBUG("%s\n", __FUNCTION__);
 225
 226         if (!dev_priv->sarea) {
 227                 DRM_ERROR("can not find sarea!\n");
 228                 return -EINVAL;
 229         }
 230
 231         if (!dev_priv->mmio_map) {
 232                 DRM_ERROR("can not find mmio map!\n");
 233                 return -EINVAL;
 234         }
 235
 236         if (dev_priv->ring.map.handle == NULL) {
 237                 DRM_ERROR("can not ioremap virtual address for"
 238                           " ring buffer\n");
 239                 return -ENOMEM;
 240         }
 241
 242         /* Program Hardware Status Page */
 243         if (!dev_priv->hw_status_page) {
 244                 DRM_ERROR("Can not find hardware status page\n");
 245                 return -EINVAL;
 246         }
 247         DRM_DEBUG("hw status page @ %p\n", dev_priv->hw_status_page);
 248
 249         if (dev_priv->status_gfx_addr != 0)
 250                 I915_WRITE(0x02080, dev_priv->status_gfx_addr);
 251         else
 252                 I915_WRITE(0x02080, dev_priv->dma_status_page);
 253         DRM_DEBUG("Enabled hardware status page\n");
 254
 255         return 0;
 256 }
 257
 258 static int i915_dma_init(struct drm_device *dev, void *data,
 259                          struct drm_file *file_priv)
 260 {
 261         drm_i915_private_t *dev_priv;
 262         drm_i915_init_t *init = data;
 263         int retcode = 0;
 264
 265         switch (init->func) {
 266         case I915_INIT_DMA:
 267                 dev_priv = drm_alloc(sizeof(drm_i915_private_t),
 268                                      DRM_MEM_DRIVER);
 269                 if (dev_priv == NULL)
 270                         return -ENOMEM;
 271                 retcode = i915_initialize(dev, dev_priv, init);
 272                 break;
 273         case I915_CLEANUP_DMA:
 274                 retcode = i915_dma_cleanup(dev);
 275                 break;
 276         case I915_RESUME_DMA:
 277                 retcode = i915_dma_resume(dev);
 278                 break;
 279         default:
 280                 retcode = -EINVAL;
 281                 break;
 282         }
 283
 284         return retcode;
 285 }
 286
 287 /* Implement basically the same security restrictions as hardware does
 288  * for MI_BATCH_NON_SECURE.  These can be made stricter at any time.
 289  *
 290  * Most of the calculations below involve calculating the size of a
 291  * particular instruction.  It's important to get the size right as
 292  * that tells us where the next instruction to check is.  Any illegal
 293  * instruction detected will be given a size of zero, which is a
 294  * signal to abort the rest of the buffer.
 295  */
 296 static int do_validate_cmd(int cmd)
 297 {
 298         switch (((cmd >> 29) & 0x7)) {
 299         case 0x0:
 300                 switch ((cmd >> 23) & 0x3f) {
 301                 case 0x0:
 302                         return 1;       /* MI_NOOP */
 303                 case 0x4:
 304                         return 1;       /* MI_FLUSH */
 305                 default:
 306                         return 0;       /* disallow everything else */
 307                 }
 308                 break;
 309         case 0x1:
 310                 return 0;       /* reserved */
 311         case 0x2:
 312                 return (cmd & 0xff) + 2;        /* 2d commands */
 313         case 0x3:
 314                 if (((cmd >> 24) & 0x1f) <= 0x18)
 315                         return 1;
 316
 317                 switch ((cmd >> 24) & 0x1f) {
 318                 case 0x1c:
 319                         return 1;
 320                 case 0x1d:
 321                         switch ((cmd >> 16) & 0xff) {
 322                         case 0x3:
 323                                 return (cmd & 0x1f) + 2;
 324                         case 0x4:
 325                                 return (cmd & 0xf) + 2;
 326                         default:
 327                                 return (cmd & 0xffff) + 2;
 328                         }
 329                 case 0x1e:
 330                         if (cmd & (1 << 23))
 331                                 return (cmd & 0xffff) + 1;
 332                         else
 333                                 return 1;
 334                 case 0x1f:
 335                         if ((cmd & (1 << 23)) == 0)     /* inline vertices */
 336                                 return (cmd & 0x1ffff) + 2;
 337                         else if (cmd & (1 << 17))       /* indirect random */
 338                                 if ((cmd & 0xffff) == 0)
 339                                         return 0;       /* unknown length, too hard */
 340                                 else
 341                                         return (((cmd & 0xffff) + 1) / 2) + 1;
 342                         else
 343                                 return 2;       /* indirect sequential */
 344                 default:
 345                         return 0;
 346                 }
 347         default:
 348                 return 0;
 349         }
 350
 351         return 0;
 352 }
 353
 354 static int validate_cmd(int cmd)
 355 {
 356         int ret = do_validate_cmd(cmd);
 357
 358 /*      printk("validate_cmd( %x ): %d\n", cmd, ret); */
 359
 360         return ret;
 361 }
 362
 363 static int i915_emit_cmds(struct drm_device * dev, int __user * buffer,
 364                           int dwords)
 365 {
 366         drm_i915_private_t *dev_priv = dev->dev_private;
 367         int i;
 368         RING_LOCALS;
 369
 370         if ((dwords+1) * sizeof(int) >= dev_priv->ring.Size - 8)
 371                 return -EINVAL;
 372
 373         BEGIN_LP_RING((dwords+1)&~1);
 374
 375         for (i = 0; i < dwords;) {
 376                 int cmd, sz;
 377
 378                 if (DRM_COPY_FROM_USER_UNCHECKED(&cmd, &buffer[i], sizeof(cmd)))
 379                         return -EINVAL;
 380
 381                 if ((sz = validate_cmd(cmd)) == 0 || i + sz > dwords)
 382                         return -EINVAL;
 383
 384                 OUT_RING(cmd);
 385
 386                 while (++i, --sz) {
 387                         if (DRM_COPY_FROM_USER_UNCHECKED(&cmd, &buffer[i],
 388                                                          sizeof(cmd))) {
 389                                 return -EINVAL;
 390                         }
 391                         OUT_RING(cmd);
 392                 }
 393         }
 394
 395         if (dwords & 1)
 396                 OUT_RING(0);
 397
 398         ADVANCE_LP_RING();
 399
 400         return 0;
 401 }
 402
 403 static int i915_emit_box(struct drm_device * dev,
 404                          struct drm_clip_rect __user * boxes,
 405                          int i, int DR1, int DR4)
 406 {
 407         drm_i915_private_t *dev_priv = dev->dev_private;
 408         struct drm_clip_rect box;
 409         RING_LOCALS;
 410
 411         if (DRM_COPY_FROM_USER_UNCHECKED(&box, &boxes[i], sizeof(box))) {
 412                 return -EFAULT;
 413         }
 414
 415         if (box.y2 <= box.y1 || box.x2 <= box.x1 || box.y2 <= 0 || box.x2 <= 0) {
 416                 DRM_ERROR("Bad box %d,%d..%d,%d\n",
 417                           box.x1, box.y1, box.x2, box.y2);
 418                 return -EINVAL;
 419         }
 420
 421         if (IS_I965G(dev)) {
 422                 BEGIN_LP_RING(4);
 423                 OUT_RING(GFX_OP_DRAWRECT_INFO_I965);
 424                 OUT_RING((box.x1 & 0xffff) | (box.y1 << 16));
 425                 OUT_RING(((box.x2 - 1) & 0xffff) | ((box.y2 - 1) << 16));
 426                 OUT_RING(DR4);
 427                 ADVANCE_LP_RING();
 428         } else {
 429                 BEGIN_LP_RING(6);
 430                 OUT_RING(GFX_OP_DRAWRECT_INFO);
 431                 OUT_RING(DR1);
 432                 OUT_RING((box.x1 & 0xffff) | (box.y1 << 16));
 433                 OUT_RING(((box.x2 - 1) & 0xffff) | ((box.y2 - 1) << 16));
 434                 OUT_RING(DR4);
 435                 OUT_RING(0);
 436                 ADVANCE_LP_RING();
 437         }
 438
 439         return 0;
 440 }
 441
 442 /* XXX: Emitting the counter should really be moved to part of the IRQ
 443  * emit.  For now, do it in both places:
 444  */
 445
 446 void i915_emit_breadcrumb(struct drm_device *dev)
 447 {
 448         drm_i915_private_t *dev_priv = dev->dev_private;
 449         RING_LOCALS;
 450
 451         if (++dev_priv->counter > BREADCRUMB_MASK) {
 452                  dev_priv->counter = 1;
 453                  DRM_DEBUG("Breadcrumb counter wrapped around\n");
 454         }
 455
 456         dev_priv->sarea_priv->last_enqueue = dev_priv->counter;
 457
 458         BEGIN_LP_RING(4);
 459         OUT_RING(CMD_STORE_DWORD_IDX);
 460         OUT_RING(20);
 461         OUT_RING(dev_priv->counter);
 462         OUT_RING(0);
 463         ADVANCE_LP_RING();
 464 }
 465
 466
 467 int i915_emit_mi_flush(struct drm_device *dev, uint32_t flush)
 468 {
 469         drm_i915_private_t *dev_priv = dev->dev_private;
 470         uint32_t flush_cmd = CMD_MI_FLUSH;
 471         RING_LOCALS;
 472
 473         flush_cmd |= flush;
 474
 475         i915_kernel_lost_context(dev);
 476
 477         BEGIN_LP_RING(4);
 478         OUT_RING(flush_cmd);
 479         OUT_RING(0);
 480         OUT_RING(0);
 481         OUT_RING(0);
 482         ADVANCE_LP_RING();
 483
 484         return 0;
 485 }
 486
 487
 488 static int i915_dispatch_cmdbuffer(struct drm_device * dev,
 489                                    drm_i915_cmdbuffer_t * cmd)
 490 {
 491 #ifdef I915_HAVE_FENCE
 492         drm_i915_private_t *dev_priv = dev->dev_private;
 493 #endif
 494         int nbox = cmd->num_cliprects;
 495         int i = 0, count, ret;
 496
 497         if (cmd->sz & 0x3) {
 498                 DRM_ERROR("alignment");
 499                 return -EINVAL;
 500         }
 501
 502         i915_kernel_lost_context(dev);
 503
 504         count = nbox ? nbox : 1;
 505
 506         for (i = 0; i < count; i++) {
 507                 if (i < nbox) {
 508                         ret = i915_emit_box(dev, cmd->cliprects, i,
 509                                             cmd->DR1, cmd->DR4);
 510                         if (ret)
 511                                 return ret;
 512                 }
 513
 514                 ret = i915_emit_cmds(dev, (int __user *)cmd->buf, cmd->sz / 4);
 515                 if (ret)
 516                         return ret;
 517         }
 518
 519         i915_emit_breadcrumb( dev );
 520 #ifdef I915_HAVE_FENCE
 521         drm_fence_flush_old(dev, 0, dev_priv->counter);
 522 #endif
 523         return 0;
 524 }
 525
 526 static int i915_dispatch_batchbuffer(struct drm_device * dev,
 527                                      drm_i915_batchbuffer_t * batch)
 528 {
 529         drm_i915_private_t *dev_priv = dev->dev_private;
 530         struct drm_clip_rect __user *boxes = batch->cliprects;
 531         int nbox = batch->num_cliprects;
 532         int i = 0, count;
 533         RING_LOCALS;
 534
 535         if ((batch->start | batch->used) & 0x7) {
 536                 DRM_ERROR("alignment");
 537                 return -EINVAL;
 538         }
 539
 540         i915_kernel_lost_context(dev);
 541
 542         count = nbox ? nbox : 1;
 543
 544         for (i = 0; i < count; i++) {
 545                 if (i < nbox) {
 546                         int ret = i915_emit_box(dev, boxes, i,
 547                                                 batch->DR1, batch->DR4);
 548                         if (ret)
 549                                 return ret;
 550                 }
 551
 552                 if (dev_priv->use_mi_batchbuffer_start) {
 553                         BEGIN_LP_RING(2);
 554                         if (IS_I965G(dev)) {
 555                                 OUT_RING(MI_BATCH_BUFFER_START | (2 << 6) | MI_BATCH_NON_SECURE_I965);
 556                                 OUT_RING(batch->start);
 557                         } else {
 558                                 OUT_RING(MI_BATCH_BUFFER_START | (2 << 6));
 559                                 OUT_RING(batch->start | MI_BATCH_NON_SECURE);
 560                         }
 561                         ADVANCE_LP_RING();
 562
 563                 } else {
 564                         BEGIN_LP_RING(4);
 565                         OUT_RING(MI_BATCH_BUFFER);
 566                         OUT_RING(batch->start | MI_BATCH_NON_SECURE);
 567                         OUT_RING(batch->start + batch->used - 4);
 568                         OUT_RING(0);
 569                         ADVANCE_LP_RING();
 570                 }
 571         }
 572
 573         i915_emit_breadcrumb( dev );
 574 #ifdef I915_HAVE_FENCE
 575         drm_fence_flush_old(dev, 0, dev_priv->counter);
 576 #endif
 577         return 0;
 578 }
 579
 580 static void i915_do_dispatch_flip(struct drm_device * dev, int plane, int sync)
 581 {
 582         drm_i915_private_t *dev_priv = dev->dev_private;
 583         u32 num_pages, current_page, next_page, dspbase;
 584         int shift = 2 * plane, x, y;
 585         RING_LOCALS;
 586
 587         /* Calculate display base offset */
 588         num_pages = dev_priv->sarea_priv->third_handle ? 3 : 2;
 589         current_page = (dev_priv->sarea_priv->pf_current_page >> shift) & 0x3;
 590         next_page = (current_page + 1) % num_pages;
 591
 592         switch (next_page) {
 593         default:
 594         case 0:
 595                 dspbase = dev_priv->sarea_priv->front_offset;
 596                 break;
 597         case 1:
 598                 dspbase = dev_priv->sarea_priv->back_offset;
 599                 break;
 600         case 2:
 601                 dspbase = dev_priv->sarea_priv->third_offset;
 602                 break;
 603         }
 604
 605         if (plane == 0) {
 606                 x = dev_priv->sarea_priv->planeA_x;
 607                 y = dev_priv->sarea_priv->planeA_y;
 608         } else {
 609                 x = dev_priv->sarea_priv->planeB_x;
 610                 y = dev_priv->sarea_priv->planeB_y;
 611         }
 612
 613         dspbase += (y * dev_priv->sarea_priv->pitch + x) * dev_priv->cpp;
 614
 615         DRM_DEBUG("plane=%d current_page=%d dspbase=0x%x\n", plane, current_page,
 616                   dspbase);
 617
 618         BEGIN_LP_RING(4);
 619         OUT_RING(sync ? 0 :
 620                  (MI_WAIT_FOR_EVENT | (plane ? MI_WAIT_FOR_PLANE_B_FLIP :
 621                                        MI_WAIT_FOR_PLANE_A_FLIP)));
 622         OUT_RING(CMD_OP_DISPLAYBUFFER_INFO | (sync ? 0 : ASYNC_FLIP) |
 623                  (plane ? DISPLAY_PLANE_B : DISPLAY_PLANE_A));
 624         OUT_RING(dev_priv->sarea_priv->pitch * dev_priv->cpp);
 625         OUT_RING(dspbase);
 626         ADVANCE_LP_RING();
 627
 628         dev_priv->sarea_priv->pf_current_page &= ~(0x3 << shift);
 629         dev_priv->sarea_priv->pf_current_page |= next_page << shift;
 630 }
 631
 632 void i915_dispatch_flip(struct drm_device * dev, int planes, int sync)
 633 {
 634         drm_i915_private_t *dev_priv = dev->dev_private;
 635         int i;
 636
 637         DRM_DEBUG("%s: planes=0x%x pfCurrentPage=%d\n",
 638                   __FUNCTION__,
 639                   planes, dev_priv->sarea_priv->pf_current_page);
 640
 641         i915_emit_mi_flush(dev, MI_READ_FLUSH | MI_EXE_FLUSH);
 642
 643         for (i = 0; i < 2; i++)
 644                 if (planes & (1 << i))
 645                         i915_do_dispatch_flip(dev, i, sync);
 646
 647         i915_emit_breadcrumb(dev);
 648 #ifdef I915_HAVE_FENCE
 649         if (!sync)
 650                 drm_fence_flush_old(dev, 0, dev_priv->counter);
 651 #endif
 652 }
 653
 654 static int i915_quiescent(struct drm_device * dev)
 655 {
 656         drm_i915_private_t *dev_priv = dev->dev_private;
 657
 658         i915_kernel_lost_context(dev);
 659         return i915_wait_ring(dev, dev_priv->ring.Size - 8, __FUNCTION__);
 660 }
 661
 662 static int i915_flush_ioctl(struct drm_device *dev, void *data,
 663                             struct drm_file *file_priv)
 664 {
 665
 666         LOCK_TEST_WITH_RETURN(dev, file_priv);
 667
 668         return i915_quiescent(dev);
 669 }
 670
 671 static int i915_batchbuffer(struct drm_device *dev, void *data,
 672                             struct drm_file *file_priv)
 673 {
 674         drm_i915_private_t *dev_priv = (drm_i915_private_t *) dev->dev_private;
 675         drm_i915_sarea_t *sarea_priv = (drm_i915_sarea_t *)
 676             dev_priv->sarea_priv;
 677         drm_i915_batchbuffer_t *batch = data;
 678         int ret;
 679
 680         if (!dev_priv->allow_batchbuffer) {
 681                 DRM_ERROR("Batchbuffer ioctl disabled\n");
 682                 return -EINVAL;
 683         }
 684
 685         DRM_DEBUG("i915 batchbuffer, start %x used %d cliprects %d\n",
 686                   batch->start, batch->used, batch->num_cliprects);
 687
 688         LOCK_TEST_WITH_RETURN(dev, file_priv);
 689
 690         if (batch->num_cliprects && DRM_VERIFYAREA_READ(batch->cliprects,
 691                                                         batch->num_cliprects *
 692                                                         sizeof(struct drm_clip_rect)))
 693                 return -EFAULT;
 694
 695         ret = i915_dispatch_batchbuffer(dev, batch);
 696
 697         sarea_priv->last_dispatch = READ_BREADCRUMB(dev_priv);
 698         return ret;
 699 }
 700
 701 static int i915_cmdbuffer(struct drm_device *dev, void *data,
 702                           struct drm_file *file_priv)
 703 {
 704         drm_i915_private_t *dev_priv = (drm_i915_private_t *) dev->dev_private;
 705         drm_i915_sarea_t *sarea_priv = (drm_i915_sarea_t *)
 706             dev_priv->sarea_priv;
 707         drm_i915_cmdbuffer_t *cmdbuf = data;
 708         int ret;
 709
 710         DRM_DEBUG("i915 cmdbuffer, buf %p sz %d cliprects %d\n",
 711                   cmdbuf->buf, cmdbuf->sz, cmdbuf->num_cliprects);
 712
 713         LOCK_TEST_WITH_RETURN(dev, file_priv);
 714
 715         if (cmdbuf->num_cliprects &&
 716             DRM_VERIFYAREA_READ(cmdbuf->cliprects,
 717                                 cmdbuf->num_cliprects *
 718                                 sizeof(struct drm_clip_rect))) {
 719                 DRM_ERROR("Fault accessing cliprects\n");
 720                 return -EFAULT;
 721         }
 722
 723         ret = i915_dispatch_cmdbuffer(dev, cmdbuf);
 724         if (ret) {
 725                 DRM_ERROR("i915_dispatch_cmdbuffer failed\n");
 726                 return ret;
 727         }
 728
 729         sarea_priv->last_dispatch = READ_BREADCRUMB(dev_priv);
 730         return 0;
 731 }
 732
 733 #ifdef I915_HAVE_BUFFER
 734 struct i915_relocatee_info {
 735         struct drm_buffer_object *buf;
 736         unsigned long offset;
 737         u32 *data_page;
 738         unsigned page_offset;
 739         struct drm_bo_kmap_obj kmap;
 740         int is_iomem;
 741 };
 742
 743 static void i915_dereference_buffers_locked(struct drm_buffer_object **buffers,
 744                                             unsigned num_buffers)
 745 {
 746         while (num_buffers--)
 747                 drm_bo_usage_deref_locked(&buffers[num_buffers]);
 748 }
 749
 750 int i915_apply_reloc(struct drm_file *file_priv, int num_buffers,
 751                      struct drm_buffer_object **buffers,
 752                      struct i915_relocatee_info *relocatee,
 753                      uint32_t *reloc)
 754 {
 755         unsigned index;
 756         unsigned long new_cmd_offset;
 757         u32 val;
 758         int ret;
 759
 760         if (reloc[2] >= num_buffers) {
 761                 DRM_ERROR("Illegal relocation buffer %08X\n", reloc[2]);
 762                 return -EINVAL;
 763         }
 764
 765         new_cmd_offset = reloc[0];
 766         if (!relocatee->data_page ||
 767             !drm_bo_same_page(relocatee->offset, new_cmd_offset)) {
 768                 drm_bo_kunmap(&relocatee->kmap);
 769                 relocatee->offset = new_cmd_offset;
 770                 ret = drm_bo_kmap(relocatee->buf, new_cmd_offset >> PAGE_SHIFT,
 771                                   1, &relocatee->kmap);
 772                 if (ret) {
 773                         DRM_ERROR("Could not map command buffer to apply relocs\n %08lx", new_cmd_offset);
 774                         return ret;
 775                 }
 776
 777                 relocatee->data_page = drm_bmo_virtual(&relocatee->kmap,
 778                                                        &relocatee->is_iomem);
 779                 relocatee->page_offset = (relocatee->offset & PAGE_MASK);
 780         }
 781
 782         val = buffers[reloc[2]]->offset;
 783         index = (reloc[0] - relocatee->page_offset) >> 2;
 784
 785         /* add in validate */
 786         val = val + reloc[1];
 787
 788         relocatee->data_page[index] = val;
 789         return 0;
 790 }
 791
 792 int i915_process_relocs(struct drm_file *file_priv,
 793                         uint32_t buf_handle,
 794                         uint32_t *reloc_buf_handle,
 795                         struct i915_relocatee_info *relocatee,
 796                         struct drm_buffer_object **buffers,
 797                         uint32_t num_buffers)
 798 {
 799         struct drm_device *dev = file_priv->head->dev;
 800         struct drm_buffer_object *reloc_list_object;
 801         uint32_t cur_handle = *reloc_buf_handle;
 802         uint32_t *reloc_page;
 803         int ret, reloc_is_iomem, reloc_stride;
 804         uint32_t num_relocs, reloc_offset, reloc_end, reloc_page_offset, next_offset, cur_offset;
 805         struct drm_bo_kmap_obj reloc_kmap;
 806
 807         memset(&reloc_kmap, 0, sizeof(reloc_kmap));
 808
 809         mutex_lock(&dev->struct_mutex);
 810         reloc_list_object = drm_lookup_buffer_object(file_priv, cur_handle, 1);
 811         mutex_unlock(&dev->struct_mutex);
 812         if (!reloc_list_object)
 813                 return -EINVAL;
 814
 815         ret = drm_bo_kmap(reloc_list_object, 0, 1, &reloc_kmap);
 816         if (ret) {
 817                 DRM_ERROR("Could not map relocation buffer.\n");
 818                 goto out;
 819         }
 820
 821         reloc_page = drm_bmo_virtual(&reloc_kmap, &reloc_is_iomem);
 822         num_relocs = reloc_page[0] & 0xffff;
 823
 824         if ((reloc_page[0] >> 16) & 0xffff) {
 825                 DRM_ERROR("Unsupported relocation type requested\n");
 826                 goto out;
 827         }
 828
 829         /* get next relocate buffer handle */
 830         *reloc_buf_handle = reloc_page[1];
 831         reloc_stride = I915_RELOC0_STRIDE * sizeof(uint32_t); /* may be different for other types of relocs */
 832
 833         DRM_DEBUG("num relocs is %d, next is %08X\n", num_relocs, reloc_page[1]);
 834
 835         reloc_page_offset = 0;
 836         reloc_offset = I915_RELOC_HEADER * sizeof(uint32_t);
 837         reloc_end = reloc_offset + (num_relocs * reloc_stride);
 838
 839         do {
 840                 next_offset = drm_bo_offset_end(reloc_offset, reloc_end);
 841
 842                 do {
 843                         cur_offset = ((reloc_offset + reloc_page_offset) & ~PAGE_MASK) / sizeof(uint32_t);
 844                         ret = i915_apply_reloc(file_priv, num_buffers,
 845                                          buffers, relocatee, &reloc_page[cur_offset]);
 846                         if (ret)
 847                                 goto out;
 848
 849                         reloc_offset += reloc_stride;
 850                 } while (reloc_offset < next_offset);
 851
 852                 drm_bo_kunmap(&reloc_kmap);
 853
 854                 reloc_offset = next_offset;
 855                 if (reloc_offset != reloc_end) {
 856                         ret = drm_bo_kmap(reloc_list_object, reloc_offset >> PAGE_SHIFT, 1, &reloc_kmap);
 857                         if (ret) {
 858                                 DRM_ERROR("Could not map relocation buffer.\n");
 859                                 goto out;
 860                         }
 861
 862                         reloc_page = drm_bmo_virtual(&reloc_kmap, &reloc_is_iomem);
 863                         reloc_page_offset = reloc_offset & ~PAGE_MASK;
 864                 }
 865
 866         } while (reloc_offset != reloc_end);
 867 out:
 868         drm_bo_kunmap(&reloc_kmap);
 869
 870         mutex_lock(&dev->struct_mutex);
 871         drm_bo_usage_deref_locked(&reloc_list_object);
 872         mutex_unlock(&dev->struct_mutex);
 873
 874         return ret;
 875 }
 876
 877 /*
 878  * Validate, add fence and relocate a block of bos from a userspace list
 879  */
 880 int i915_validate_buffer_list(struct drm_file *file_priv,
 881                               unsigned int fence_class, uint64_t data,
 882                               struct drm_buffer_object **buffers,
 883                               uint32_t *num_buffers)
 884 {
 885         struct drm_i915_op_arg arg;
 886         struct drm_bo_op_req *req = &arg.d.req;
 887         struct drm_bo_arg_rep rep;
 888         unsigned long next = 0;
 889         int ret = 0;
 890         unsigned buf_count = 0;
 891         struct drm_device *dev = file_priv->head->dev;
 892         uint32_t buf_reloc_handle, buf_handle;
 893         struct i915_relocatee_info relocatee;
 894
 895         do {
 896                 if (buf_count >= *num_buffers) {
 897                         DRM_ERROR("Buffer count exceeded %d\n.", *num_buffers);
 898                         ret = -EINVAL;
 899                         goto out_err;
 900                 }
 901
 902                 buffers[buf_count] = NULL;
 903
 904                 if (copy_from_user(&arg, (void __user *)(unsigned)data, sizeof(arg))) {
 905                         ret = -EFAULT;
 906                         goto out_err;
 907                 }
 908
 909                 if (arg.handled) {
 910                         data = arg.next;
 911                         mutex_lock(&dev->struct_mutex);
 912                         buffers[buf_count] = drm_lookup_buffer_object(file_priv, req->arg_handle, 1);
 913                         mutex_unlock(&dev->struct_mutex);
 914                         buf_count++;
 915                         continue;
 916                 }
 917
 918                 rep.ret = 0;
 919                 if (req->op != drm_bo_validate) {
 920                         DRM_ERROR
 921                             ("Buffer object operation wasn't \"validate\".\n");
 922                         rep.ret = -EINVAL;
 923                         goto out_err;
 924                 }
 925
 926                 buf_handle = req->bo_req.handle;
 927                 buf_reloc_handle = arg.reloc_handle;
 928
 929                 rep.ret = drm_bo_handle_validate(file_priv, req->bo_req.handle,
 930                                                  req->bo_req.fence_class,
 931                                                  req->bo_req.flags,
 932                                                  req->bo_req.mask,
 933                                                  req->bo_req.hint,
 934                                                  0,
 935                                                  &rep.bo_info,
 936                                                  &buffers[buf_count]);
 937
 938                 if (rep.ret) {
 939                         DRM_ERROR("error on handle validate %d\n", rep.ret);
 940                         goto out_err;
 941                 }
 942
 943
 944                 next = arg.next;
 945                 arg.handled = 1;
 946                 arg.d.rep = rep;
 947
 948                 if (copy_to_user((void __user *)(unsigned)data, &arg, sizeof(arg)))
 949                         return -EFAULT;
 950
 951                 data = next;
 952                 buf_count++;
 953
 954                 if (buf_reloc_handle) {
 955                         memset(&relocatee, 0, sizeof(relocatee));
 956
 957                         mutex_lock(&dev->struct_mutex);
 958                         relocatee.buf = drm_lookup_buffer_object(file_priv, buf_handle, 1);
 959                         mutex_unlock(&dev->struct_mutex);
 960                         if (!relocatee.buf) {
 961                                 DRM_DEBUG("relocatee buffer invalid %08x\n", buf_handle);
 962                                 ret = -EINVAL;
 963                                 goto out_err;
 964                         }
 965
 966                         while (buf_reloc_handle) {
 967                                 ret = i915_process_relocs(file_priv, buf_handle, &buf_reloc_handle, &relocatee, buffers, buf_count);
 968                                 if (ret) {
 969                                         DRM_ERROR("process relocs failed\n");
 970                                         break;
 971                                 }
 972                         }
 973
 974                         drm_bo_kunmap(&relocatee.kmap);
 975                         mutex_lock(&dev->struct_mutex);
 976                         drm_bo_usage_deref_locked(&relocatee.buf);
 977                         mutex_unlock(&dev->struct_mutex);
 978
 979                         if (ret)
 980                                 goto out_err;
 981
 982                 }
 983         } while (next != 0);
 984         *num_buffers = buf_count;
 985         return 0;
 986 out_err:
 987         mutex_lock(&dev->struct_mutex);
 988         i915_dereference_buffers_locked(buffers, buf_count);
 989         mutex_unlock(&dev->struct_mutex);
 990         *num_buffers = 0;
 991         return (ret) ? ret : rep.ret;
 992 }
 993
 994 static int i915_execbuffer(struct drm_device *dev, void *data,
 995                            struct drm_file *file_priv)
 996 {
 997         drm_i915_private_t *dev_priv = (drm_i915_private_t *) dev->dev_private;
 998         drm_i915_sarea_t *sarea_priv = (drm_i915_sarea_t *)
 999                 dev_priv->sarea_priv;
1000         struct drm_i915_execbuffer *exec_buf = data;
1001         struct _drm_i915_batchbuffer *batch = &exec_buf->batch;
1002         struct drm_fence_arg *fence_arg = &exec_buf->fence_arg;
1003         int num_buffers;
1004         int ret;
1005         struct drm_buffer_object **buffers;
1006         struct drm_fence_object *fence;
1007
1008         if (!dev_priv->allow_batchbuffer) {
1009                 DRM_ERROR("Batchbuffer ioctl disabled\n");
1010                 return -EINVAL;
1011         }
1012
1013
1014         if (batch->num_cliprects && DRM_VERIFYAREA_READ(batch->cliprects,
1015                                                         batch->num_cliprects *
1016                                                         sizeof(struct drm_clip_rect)))
1017                 return -EFAULT;
1018
1019         if (exec_buf->num_buffers > dev_priv->max_validate_buffers)
1020                 return -EINVAL;
1021
1022
1023         ret = drm_bo_read_lock(&dev->bm.bm_lock);
1024         if (ret)
1025                 return ret;
1026
1027         /*
1028          * The cmdbuf_mutex makes sure the validate-submit-fence
1029          * operation is atomic.
1030          */
1031
1032         ret = mutex_lock_interruptible(&dev_priv->cmdbuf_mutex);
1033         if (ret) {
1034                 drm_bo_read_unlock(&dev->bm.bm_lock);
1035                 return -EAGAIN;
1036         }
1037
1038         num_buffers = exec_buf->num_buffers;
1039
1040         buffers = drm_calloc(num_buffers, sizeof(struct drm_buffer_object *), DRM_MEM_DRIVER);
1041         if (!buffers) {
1042                 drm_bo_read_unlock(&dev->bm.bm_lock);
1043                 mutex_unlock(&dev_priv->cmdbuf_mutex);
1044                 return -ENOMEM;
1045         }
1046
1047         /* validate buffer list + fixup relocations */
1048         ret = i915_validate_buffer_list(file_priv, 0, exec_buf->ops_list,
1049                                         buffers, &num_buffers);
1050         if (ret)
1051                 goto out_free;
1052
1053         /* submit buffer */
1054         batch->start = buffers[num_buffers-1]->offset;
1055
1056         DRM_DEBUG("i915 exec batchbuffer, start %x used %d cliprects %d\n",
1057                   batch->start, batch->used, batch->num_cliprects);
1058
1059         ret = i915_dispatch_batchbuffer(dev, batch);
1060         if (ret)
1061                 goto out_err0;
1062
1063         sarea_priv->last_dispatch = READ_BREADCRUMB(dev_priv);
1064
1065         /* fence */
1066         ret = drm_fence_buffer_objects(dev, NULL, 0, NULL, &fence);
1067         if (ret)
1068                 goto out_err0;
1069
1070         if (!(fence_arg->flags & DRM_FENCE_FLAG_NO_USER)) {
1071                 ret = drm_fence_add_user_object(file_priv, fence, fence_arg->flags & DRM_FENCE_FLAG_SHAREABLE);
1072                 if (!ret) {
1073                         fence_arg->handle = fence->base.hash.key;
1074                         fence_arg->fence_class = fence->fence_class;
1075                         fence_arg->type = fence->type;
1076                         fence_arg->signaled = fence->signaled;
1077                 }
1078         }
1079         drm_fence_usage_deref_unlocked(&fence);
1080 out_err0:
1081
1082         /* handle errors */
1083         mutex_lock(&dev->struct_mutex);
1084         i915_dereference_buffers_locked(buffers, num_buffers);
1085         mutex_unlock(&dev->struct_mutex);
1086
1087 out_free:
1088         drm_free(buffers, (exec_buf->num_buffers * sizeof(struct drm_buffer_object *)), DRM_MEM_DRIVER);
1089
1090         mutex_unlock(&dev_priv->cmdbuf_mutex);
1091         drm_bo_read_unlock(&dev->bm.bm_lock);
1092         return ret;
1093 }
1094 #endif
1095
1096 static int i915_do_cleanup_pageflip(struct drm_device * dev)
1097 {
1098         drm_i915_private_t *dev_priv = dev->dev_private;
1099         int i, planes, num_pages = dev_priv->sarea_priv->third_handle ? 3 : 2;
1100
1101         DRM_DEBUG("%s\n", __FUNCTION__);
1102
1103         for (i = 0, planes = 0; i < 2; i++)
1104                 if (dev_priv->sarea_priv->pf_current_page & (0x3 << (2 * i))) {
1105                         dev_priv->sarea_priv->pf_current_page =
1106                                 (dev_priv->sarea_priv->pf_current_page &
1107                                  ~(0x3 << (2 * i))) | (num_pages - 1) << (2 * i);
1108
1109                         planes |= 1 << i;
1110                 }
1111
1112         if (planes)
1113                 i915_dispatch_flip(dev, planes, 0);
1114
1115         return 0;
1116 }
1117
1118 static int i915_flip_bufs(struct drm_device *dev, void *data, struct drm_file *file_priv)
1119 {
1120         drm_i915_flip_t *param = data;
1121
1122         DRM_DEBUG("%s\n", __FUNCTION__);
1123
1124         LOCK_TEST_WITH_RETURN(dev, file_priv);
1125
1126         /* This is really planes */
1127         if (param->pipes & ~0x3) {
1128                 DRM_ERROR("Invalid planes 0x%x, only <= 0x3 is valid\n",
1129                           param->pipes);
1130                 return -EINVAL;
1131         }
1132
1133         i915_dispatch_flip(dev, param->pipes, 0);
1134
1135         return 0;
1136 }
1137
1138
1139 static int i915_getparam(struct drm_device *dev, void *data,
1140                          struct drm_file *file_priv)
1141 {
1142         drm_i915_private_t *dev_priv = dev->dev_private;
1143         drm_i915_getparam_t *param = data;
1144         int value;
1145
1146         if (!dev_priv) {
1147                 DRM_ERROR("%s called with no initialization\n", __FUNCTION__);
1148                 return -EINVAL;
1149         }
1150
1151         switch (param->param) {
1152         case I915_PARAM_IRQ_ACTIVE:
1153                 value = dev->irq ? 1 : 0;
1154                 break;
1155         case I915_PARAM_ALLOW_BATCHBUFFER:
1156                 value = dev_priv->allow_batchbuffer ? 1 : 0;
1157                 break;
1158         case I915_PARAM_LAST_DISPATCH:
1159                 value = READ_BREADCRUMB(dev_priv);
1160                 break;
1161         default:
1162                 DRM_ERROR("Unknown parameter %d\n", param->param);
1163                 return -EINVAL;
1164         }
1165
1166         if (DRM_COPY_TO_USER(param->value, &value, sizeof(int))) {
1167                 DRM_ERROR("DRM_COPY_TO_USER failed\n");
1168                 return -EFAULT;
1169         }
1170
1171         return 0;
1172 }
1173
1174 static int i915_setparam(struct drm_device *dev, void *data,
1175                          struct drm_file *file_priv)
1176 {
1177         drm_i915_private_t *dev_priv = dev->dev_private;
1178         drm_i915_setparam_t *param = data;
1179
1180         if (!dev_priv) {
1181                 DRM_ERROR("%s called with no initialization\n", __FUNCTION__);
1182                 return -EINVAL;
1183         }
1184
1185         switch (param->param) {
1186         case I915_SETPARAM_USE_MI_BATCHBUFFER_START:
1187                 dev_priv->use_mi_batchbuffer_start = param->value;
1188                 break;
1189         case I915_SETPARAM_TEX_LRU_LOG_GRANULARITY:
1190                 dev_priv->tex_lru_log_granularity = param->value;
1191                 break;
1192         case I915_SETPARAM_ALLOW_BATCHBUFFER:
1193                 dev_priv->allow_batchbuffer = param->value;
1194                 break;
1195         default:
1196                 DRM_ERROR("unknown parameter %d\n", param->param);
1197                 return -EINVAL;
1198         }
1199
1200         return 0;
1201 }
1202
1203 drm_i915_mmio_entry_t mmio_table[] = {
1204         [MMIO_REGS_PS_DEPTH_COUNT] = {
1205                 I915_MMIO_MAY_READ|I915_MMIO_MAY_WRITE,
1206                 0x2350,
1207                 8
1208         }
1209 };
1210
1211 static int mmio_table_size = sizeof(mmio_table)/sizeof(drm_i915_mmio_entry_t);
1212
1213 static int i915_mmio(struct drm_device *dev, void *data,
1214                      struct drm_file *file_priv)
1215 {
1216         uint32_t buf[8];
1217         drm_i915_private_t *dev_priv = dev->dev_private;
1218         drm_i915_mmio_entry_t *e;
1219         drm_i915_mmio_t *mmio = data;
1220         void __iomem *base;
1221         int i;
1222
1223         if (!dev_priv) {
1224                 DRM_ERROR("%s called with no initialization\n", __FUNCTION__);
1225                 return -EINVAL;
1226         }
1227
1228         if (mmio->reg >= mmio_table_size)
1229                 return -EINVAL;
1230
1231         e = &mmio_table[mmio->reg];
1232         base = (u8 *) dev_priv->mmio_map->handle + e->offset;
1233
1234         switch (mmio->read_write) {
1235                 case I915_MMIO_READ:
1236                         if (!(e->flag & I915_MMIO_MAY_READ))
1237                                 return -EINVAL;
1238                         for (i = 0; i < e->size / 4; i++)
1239                                 buf[i] = I915_READ(e->offset + i * 4);
1240                         if (DRM_COPY_TO_USER(mmio->data, buf, e->size)) {
1241                                 DRM_ERROR("DRM_COPY_TO_USER failed\n");
1242                                 return -EFAULT;
1243                         }
1244                         break;
1245
1246                 case I915_MMIO_WRITE:
1247                         if (!(e->flag & I915_MMIO_MAY_WRITE))
1248                                 return -EINVAL;
1249                         if(DRM_COPY_FROM_USER(buf, mmio->data, e->size)) {
1250                                 DRM_ERROR("DRM_COPY_TO_USER failed\n");
1251                                 return -EFAULT;
1252                         }
1253                         for (i = 0; i < e->size / 4; i++)
1254                                 I915_WRITE(e->offset + i * 4, buf[i]);
1255                         break;
1256         }
1257         return 0;
1258 }
1259
1260 static int i915_set_status_page(struct drm_device *dev, void *data,
1261                                 struct drm_file *file_priv)
1262 {
1263         drm_i915_private_t *dev_priv = dev->dev_private;
1264         drm_i915_hws_addr_t *hws = data;
1265
1266         if (!dev_priv) {
1267                 DRM_ERROR("%s called with no initialization\n", __FUNCTION__);
1268                 return -EINVAL;
1269         }
1270         DRM_DEBUG("set status page addr 0x%08x\n", (u32)hws->addr);
1271
1272         dev_priv->status_gfx_addr = hws->addr & (0x1ffff<<12);
1273
1274         dev_priv->hws_map.offset = dev->agp->base + hws->addr;
1275         dev_priv->hws_map.size = 4*1024;
1276         dev_priv->hws_map.type = 0;
1277         dev_priv->hws_map.flags = 0;
1278         dev_priv->hws_map.mtrr = 0;
1279
1280         drm_core_ioremap(&dev_priv->hws_map, dev);
1281         if (dev_priv->hws_map.handle == NULL) {
1282                 dev->dev_private = (void *)dev_priv;
1283                 i915_dma_cleanup(dev);
1284                 dev_priv->status_gfx_addr = 0;
1285                 DRM_ERROR("can not ioremap virtual address for"
1286                                 " G33 hw status page\n");
1287                 return -ENOMEM;
1288         }
1289         dev_priv->hw_status_page = dev_priv->hws_map.handle;
1290
1291         memset(dev_priv->hw_status_page, 0, PAGE_SIZE);
1292         I915_WRITE(0x02080, dev_priv->status_gfx_addr);
1293         DRM_DEBUG("load hws 0x2080 with gfx mem 0x%x\n",
1294                         dev_priv->status_gfx_addr);
1295         DRM_DEBUG("load hws at %p\n", dev_priv->hw_status_page);
1296         return 0;
1297 }
1298
1299 int i915_driver_load(struct drm_device *dev, unsigned long flags)
1300 {
1301         /* i915 has 4 more counters */
1302         dev->counters += 4;
1303         dev->types[6] = _DRM_STAT_IRQ;
1304         dev->types[7] = _DRM_STAT_PRIMARY;
1305         dev->types[8] = _DRM_STAT_SECONDARY;
1306         dev->types[9] = _DRM_STAT_DMA;
1307
1308         return 0;
1309 }
1310
1311 void i915_driver_lastclose(struct drm_device * dev)
1312 {
1313         if (dev->dev_private) {
1314                 drm_i915_private_t *dev_priv = dev->dev_private;
1315                 i915_do_cleanup_pageflip(dev);
1316                 i915_mem_takedown(&(dev_priv->agp_heap));
1317         }
1318         i915_dma_cleanup(dev);
1319 }
1320
1321 void i915_driver_preclose(struct drm_device * dev, struct drm_file *file_priv)
1322 {
1323         if (dev->dev_private) {
1324                 drm_i915_private_t *dev_priv = dev->dev_private;
1325                 i915_mem_release(dev, file_priv, dev_priv->agp_heap);
1326         }
1327 }
1328
1329 struct drm_ioctl_desc i915_ioctls[] = {
1330         DRM_IOCTL_DEF(DRM_I915_INIT, i915_dma_init, DRM_AUTH|DRM_MASTER|DRM_ROOT_ONLY),
1331         DRM_IOCTL_DEF(DRM_I915_FLUSH, i915_flush_ioctl, DRM_AUTH),
1332         DRM_IOCTL_DEF(DRM_I915_FLIP, i915_flip_bufs, DRM_AUTH),
1333         DRM_IOCTL_DEF(DRM_I915_BATCHBUFFER, i915_batchbuffer, DRM_AUTH),
1334         DRM_IOCTL_DEF(DRM_I915_IRQ_EMIT, i915_irq_emit, DRM_AUTH),
1335         DRM_IOCTL_DEF(DRM_I915_IRQ_WAIT, i915_irq_wait, DRM_AUTH),
1336         DRM_IOCTL_DEF(DRM_I915_GETPARAM, i915_getparam, DRM_AUTH),
1337         DRM_IOCTL_DEF(DRM_I915_SETPARAM, i915_setparam, DRM_AUTH|DRM_MASTER|DRM_ROOT_ONLY),
1338         DRM_IOCTL_DEF(DRM_I915_ALLOC, i915_mem_alloc, DRM_AUTH),
1339         DRM_IOCTL_DEF(DRM_I915_FREE, i915_mem_free, DRM_AUTH),
1340         DRM_IOCTL_DEF(DRM_I915_INIT_HEAP, i915_mem_init_heap, DRM_AUTH|DRM_MASTER|DRM_ROOT_ONLY),
1341         DRM_IOCTL_DEF(DRM_I915_CMDBUFFER, i915_cmdbuffer, DRM_AUTH),
1342         DRM_IOCTL_DEF(DRM_I915_DESTROY_HEAP,  i915_mem_destroy_heap, DRM_AUTH|DRM_MASTER|DRM_ROOT_ONLY ),
1343         DRM_IOCTL_DEF(DRM_I915_SET_VBLANK_PIPE,  i915_vblank_pipe_set, DRM_AUTH|DRM_MASTER|DRM_ROOT_ONLY ),
1344         DRM_IOCTL_DEF(DRM_I915_GET_VBLANK_PIPE,  i915_vblank_pipe_get, DRM_AUTH ),
1345         DRM_IOCTL_DEF(DRM_I915_VBLANK_SWAP, i915_vblank_swap, DRM_AUTH),
1346         DRM_IOCTL_DEF(DRM_I915_MMIO, i915_mmio, DRM_AUTH),
1347         DRM_IOCTL_DEF(DRM_I915_HWS_ADDR, i915_set_status_page, DRM_AUTH),
1348 #ifdef I915_HAVE_BUFFER
1349         DRM_IOCTL_DEF(DRM_I915_EXECBUFFER, i915_execbuffer, DRM_AUTH),
1350 #endif
1351 };
1352
1353 int i915_max_ioctl = DRM_ARRAY_SIZE(i915_ioctls);
1354
1355 /**
1356  * Determine if the device really is AGP or not.
1357  *
1358  * All Intel graphics chipsets are treated as AGP, even if they are really
1359  * PCI-e.
1360  *
1361  * \param dev   The device to be tested.
1362  *
1363  * \returns
1364  * A value of 1 is always retured to indictate every i9x5 is AGP.
1365  */
1366 int i915_driver_device_is_agp(struct drm_device * dev)
1367 {
1368         return 1;
1369 }
1370
1371 int i915_driver_firstopen(struct drm_device *dev)
1372 {
1373 #ifdef I915_HAVE_BUFFER
1374         drm_bo_driver_init(dev);
1375 #endif
1376         return 0;
1377 }