shared-core/i915_dma.c

   1 /* i915_dma.c -- DMA support for the I915 -*- linux-c -*-
   2  */
   3 /*
   4  * Copyright 2003 Tungsten Graphics, Inc., Cedar Park, Texas.
   5  * All Rights Reserved.
   6  *
   7  * Permission is hereby granted, free of charge, to any person obtaining a
   8  * copy of this software and associated documentation files (the
   9  * "Software"), to deal in the Software without restriction, including
  10  * without limitation the rights to use, copy, modify, merge, publish,
  11  * distribute, sub license, and/or sell copies of the Software, and to
  12  * permit persons to whom the Software is furnished to do so, subject to
  13  * the following conditions:
  14  *
  15  * The above copyright notice and this permission notice (including the
  16  * next paragraph) shall be included in all copies or substantial portions
  17  * of the Software.
  18  *
  19  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
  20  * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
  21  * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT.
  22  * IN NO EVENT SHALL TUNGSTEN GRAPHICS AND/OR ITS SUPPLIERS BE LIABLE FOR
  23  * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
  24  * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
  25  * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  26  *
  27  */
  28
  29 #include "drmP.h"
  30 #include "drm.h"
  31 #include "i915_drm.h"
  32 #include "i915_drv.h"
  33
  34 #define IS_I965G(dev)  (dev->pci_device == 0x2972 || \
  35                         dev->pci_device == 0x2982 || \
  36                         dev->pci_device == 0x2992 || \
  37                         dev->pci_device == 0x29A2 || \
  38                         dev->pci_device == 0x2A02 || \
  39                         dev->pci_device == 0x2A12)
  40
  41 #define IS_G33(dev)    (dev->pci_device == 0x29C2 || \
  42                         dev->pci_device == 0x29B2 || \
  43                         dev->pci_device == 0x29D2)
  44
  45 /* Really want an OS-independent resettable timer.  Would like to have
  46  * this loop run for (eg) 3 sec, but have the timer reset every time
  47  * the head pointer changes, so that EBUSY only happens if the ring
  48  * actually stalls for (eg) 3 seconds.
  49  */
  50 int i915_wait_ring(struct drm_device * dev, int n, const char *caller)
  51 {
  52         drm_i915_private_t *dev_priv = dev->dev_private;
  53         drm_i915_ring_buffer_t *ring = &(dev_priv->ring);
  54         u32 last_head = I915_READ(LP_RING + RING_HEAD) & HEAD_ADDR;
  55         int i;
  56
  57         for (i = 0; i < 10000; i++) {
  58                 ring->head = I915_READ(LP_RING + RING_HEAD) & HEAD_ADDR;
  59                 ring->space = ring->head - (ring->tail + 8);
  60                 if (ring->space < 0)
  61                         ring->space += ring->Size;
  62                 if (ring->space >= n)
  63                         return 0;
  64
  65                 dev_priv->sarea_priv->perf_boxes |= I915_BOX_WAIT;
  66
  67                 if (ring->head != last_head)
  68                         i = 0;
  69
  70                 last_head = ring->head;
  71                 DRM_UDELAY(1);
  72         }
  73
  74         return -EBUSY;
  75 }
  76
  77 void i915_kernel_lost_context(struct drm_device * dev)
  78 {
  79         drm_i915_private_t *dev_priv = dev->dev_private;
  80         drm_i915_ring_buffer_t *ring = &(dev_priv->ring);
  81
  82         ring->head = I915_READ(LP_RING + RING_HEAD) & HEAD_ADDR;
  83         ring->tail = I915_READ(LP_RING + RING_TAIL) & TAIL_ADDR;
  84         ring->space = ring->head - (ring->tail + 8);
  85         if (ring->space < 0)
  86                 ring->space += ring->Size;
  87
  88         if (ring->head == ring->tail)
  89                 dev_priv->sarea_priv->perf_boxes |= I915_BOX_RING_EMPTY;
  90 }
  91
  92 static int i915_dma_cleanup(struct drm_device * dev)
  93 {
  94         /* Make sure interrupts are disabled here because the uninstall ioctl
  95          * may not have been called from userspace and after dev_private
  96          * is freed, it's too late.
  97          */
  98         if (dev->irq)
  99                 drm_irq_uninstall(dev);
 100
 101         if (dev->dev_private) {
 102                 drm_i915_private_t *dev_priv =
 103                     (drm_i915_private_t *) dev->dev_private;
 104
 105                 if (dev_priv->ring.virtual_start) {
 106                         drm_core_ioremapfree(&dev_priv->ring.map, dev);
 107                 }
 108
 109                 if (dev_priv->status_page_dmah) {
 110                         drm_pci_free(dev, dev_priv->status_page_dmah);
 111                         /* Need to rewrite hardware status page */
 112                         I915_WRITE(0x02080, 0x1ffff000);
 113                 }
 114                 if (dev_priv->status_gfx_addr) {
 115                         dev_priv->status_gfx_addr = 0;
 116                         drm_core_ioremapfree(&dev_priv->hws_map, dev);
 117                         I915_WRITE(0x02080, 0x1ffff000);
 118                 }
 119                 drm_free(dev->dev_private, sizeof(drm_i915_private_t),
 120                          DRM_MEM_DRIVER);
 121
 122                 dev->dev_private = NULL;
 123         }
 124
 125         return 0;
 126 }
 127
 128 static int i915_initialize(struct drm_device * dev,
 129                            drm_i915_private_t * dev_priv,
 130                            drm_i915_init_t * init)
 131 {
 132         memset(dev_priv, 0, sizeof(drm_i915_private_t));
 133
 134         dev_priv->sarea = drm_getsarea(dev);
 135         if (!dev_priv->sarea) {
 136                 DRM_ERROR("can not find sarea!\n");
 137                 dev->dev_private = (void *)dev_priv;
 138                 i915_dma_cleanup(dev);
 139                 return -EINVAL;
 140         }
 141
 142         dev_priv->mmio_map = drm_core_findmap(dev, init->mmio_offset);
 143         if (!dev_priv->mmio_map) {
 144                 dev->dev_private = (void *)dev_priv;
 145                 i915_dma_cleanup(dev);
 146                 DRM_ERROR("can not find mmio map!\n");
 147                 return -EINVAL;
 148         }
 149
 150 #ifdef I915_HAVE_BUFFER
 151         dev_priv->max_validate_buffers = I915_MAX_VALIDATE_BUFFERS;
 152 #endif
 153
 154         dev_priv->sarea_priv = (drm_i915_sarea_t *)
 155             ((u8 *) dev_priv->sarea->handle + init->sarea_priv_offset);
 156
 157         dev_priv->ring.Start = init->ring_start;
 158         dev_priv->ring.End = init->ring_end;
 159         dev_priv->ring.Size = init->ring_size;
 160         dev_priv->ring.tail_mask = dev_priv->ring.Size - 1;
 161
 162         dev_priv->ring.map.offset = init->ring_start;
 163         dev_priv->ring.map.size = init->ring_size;
 164         dev_priv->ring.map.type = 0;
 165         dev_priv->ring.map.flags = 0;
 166         dev_priv->ring.map.mtrr = 0;
 167
 168         drm_core_ioremap(&dev_priv->ring.map, dev);
 169
 170         if (dev_priv->ring.map.handle == NULL) {
 171                 dev->dev_private = (void *)dev_priv;
 172                 i915_dma_cleanup(dev);
 173                 DRM_ERROR("can not ioremap virtual address for"
 174                           " ring buffer\n");
 175                 return -ENOMEM;
 176         }
 177
 178         dev_priv->ring.virtual_start = dev_priv->ring.map.handle;
 179
 180         dev_priv->cpp = init->cpp;
 181         dev_priv->sarea_priv->pf_current_page = 0;
 182
 183         /* We are using separate values as placeholders for mechanisms for
 184          * private backbuffer/depthbuffer usage.
 185          */
 186         dev_priv->use_mi_batchbuffer_start = 0;
 187
 188         /* Allow hardware batchbuffers unless told otherwise.
 189          */
 190         dev_priv->allow_batchbuffer = 1;
 191
 192         /* Enable vblank on pipe A for older X servers
 193          */
 194         dev_priv->vblank_pipe = DRM_I915_VBLANK_PIPE_A;
 195
 196         /* Program Hardware Status Page */
 197         if (!IS_G33(dev)) {
 198                 dev_priv->status_page_dmah =
 199                         drm_pci_alloc(dev, PAGE_SIZE, PAGE_SIZE, 0xffffffff);
 200
 201                 if (!dev_priv->status_page_dmah) {
 202                         dev->dev_private = (void *)dev_priv;
 203                         i915_dma_cleanup(dev);
 204                         DRM_ERROR("Can not allocate hardware status page\n");
 205                         return -ENOMEM;
 206                 }
 207                 dev_priv->hw_status_page = dev_priv->status_page_dmah->vaddr;
 208                 dev_priv->dma_status_page = dev_priv->status_page_dmah->busaddr;
 209
 210                 memset(dev_priv->hw_status_page, 0, PAGE_SIZE);
 211
 212                 I915_WRITE(0x02080, dev_priv->dma_status_page);
 213         }
 214         DRM_DEBUG("Enabled hardware status page\n");
 215         dev->dev_private = (void *)dev_priv;
 216         return 0;
 217 }
 218
 219 static int i915_dma_resume(struct drm_device * dev)
 220 {
 221         drm_i915_private_t *dev_priv = (drm_i915_private_t *) dev->dev_private;
 222
 223         DRM_DEBUG("%s\n", __FUNCTION__);
 224
 225         if (!dev_priv->sarea) {
 226                 DRM_ERROR("can not find sarea!\n");
 227                 return -EINVAL;
 228         }
 229
 230         if (!dev_priv->mmio_map) {
 231                 DRM_ERROR("can not find mmio map!\n");
 232                 return -EINVAL;
 233         }
 234
 235         if (dev_priv->ring.map.handle == NULL) {
 236                 DRM_ERROR("can not ioremap virtual address for"
 237                           " ring buffer\n");
 238                 return -ENOMEM;
 239         }
 240
 241         /* Program Hardware Status Page */
 242         if (!dev_priv->hw_status_page) {
 243                 DRM_ERROR("Can not find hardware status page\n");
 244                 return -EINVAL;
 245         }
 246         DRM_DEBUG("hw status page @ %p\n", dev_priv->hw_status_page);
 247
 248         if (dev_priv->status_gfx_addr != 0)
 249                 I915_WRITE(0x02080, dev_priv->status_gfx_addr);
 250         else
 251                 I915_WRITE(0x02080, dev_priv->dma_status_page);
 252         DRM_DEBUG("Enabled hardware status page\n");
 253
 254         return 0;
 255 }
 256
 257 static int i915_dma_init(struct drm_device *dev, void *data,
 258                          struct drm_file *file_priv)
 259 {
 260         drm_i915_private_t *dev_priv;
 261         drm_i915_init_t *init = data;
 262         int retcode = 0;
 263
 264         switch (init->func) {
 265         case I915_INIT_DMA:
 266                 dev_priv = drm_alloc(sizeof(drm_i915_private_t),
 267                                      DRM_MEM_DRIVER);
 268                 if (dev_priv == NULL)
 269                         return -ENOMEM;
 270                 retcode = i915_initialize(dev, dev_priv, init);
 271                 break;
 272         case I915_CLEANUP_DMA:
 273                 retcode = i915_dma_cleanup(dev);
 274                 break;
 275         case I915_RESUME_DMA:
 276                 retcode = i915_dma_resume(dev);
 277                 break;
 278         default:
 279                 retcode = -EINVAL;
 280                 break;
 281         }
 282
 283         return retcode;
 284 }
 285
 286 /* Implement basically the same security restrictions as hardware does
 287  * for MI_BATCH_NON_SECURE.  These can be made stricter at any time.
 288  *
 289  * Most of the calculations below involve calculating the size of a
 290  * particular instruction.  It's important to get the size right as
 291  * that tells us where the next instruction to check is.  Any illegal
 292  * instruction detected will be given a size of zero, which is a
 293  * signal to abort the rest of the buffer.
 294  */
 295 static int do_validate_cmd(int cmd)
 296 {
 297         switch (((cmd >> 29) & 0x7)) {
 298         case 0x0:
 299                 switch ((cmd >> 23) & 0x3f) {
 300                 case 0x0:
 301                         return 1;       /* MI_NOOP */
 302                 case 0x4:
 303                         return 1;       /* MI_FLUSH */
 304                 default:
 305                         return 0;       /* disallow everything else */
 306                 }
 307                 break;
 308         case 0x1:
 309                 return 0;       /* reserved */
 310         case 0x2:
 311                 return (cmd & 0xff) + 2;        /* 2d commands */
 312         case 0x3:
 313                 if (((cmd >> 24) & 0x1f) <= 0x18)
 314                         return 1;
 315
 316                 switch ((cmd >> 24) & 0x1f) {
 317                 case 0x1c:
 318                         return 1;
 319                 case 0x1d:
 320                         switch ((cmd >> 16) & 0xff) {
 321                         case 0x3:
 322                                 return (cmd & 0x1f) + 2;
 323                         case 0x4:
 324                                 return (cmd & 0xf) + 2;
 325                         default:
 326                                 return (cmd & 0xffff) + 2;
 327                         }
 328                 case 0x1e:
 329                         if (cmd & (1 << 23))
 330                                 return (cmd & 0xffff) + 1;
 331                         else
 332                                 return 1;
 333                 case 0x1f:
 334                         if ((cmd & (1 << 23)) == 0)     /* inline vertices */
 335                                 return (cmd & 0x1ffff) + 2;
 336                         else if (cmd & (1 << 17))       /* indirect random */
 337                                 if ((cmd & 0xffff) == 0)
 338                                         return 0;       /* unknown length, too hard */
 339                                 else
 340                                         return (((cmd & 0xffff) + 1) / 2) + 1;
 341                         else
 342                                 return 2;       /* indirect sequential */
 343                 default:
 344                         return 0;
 345                 }
 346         default:
 347                 return 0;
 348         }
 349
 350         return 0;
 351 }
 352
 353 static int validate_cmd(int cmd)
 354 {
 355         int ret = do_validate_cmd(cmd);
 356
 357 /*      printk("validate_cmd( %x ): %d\n", cmd, ret); */
 358
 359         return ret;
 360 }
 361
 362 static int i915_emit_cmds(struct drm_device * dev, int __user * buffer,
 363                           int dwords)
 364 {
 365         drm_i915_private_t *dev_priv = dev->dev_private;
 366         int i;
 367         RING_LOCALS;
 368
 369         if ((dwords+1) * sizeof(int) >= dev_priv->ring.Size - 8)
 370                 return -EINVAL;
 371
 372         BEGIN_LP_RING((dwords+1)&~1);
 373
 374         for (i = 0; i < dwords;) {
 375                 int cmd, sz;
 376
 377                 if (DRM_COPY_FROM_USER_UNCHECKED(&cmd, &buffer[i], sizeof(cmd)))
 378                         return -EINVAL;
 379
 380                 if ((sz = validate_cmd(cmd)) == 0 || i + sz > dwords)
 381                         return -EINVAL;
 382
 383                 OUT_RING(cmd);
 384
 385                 while (++i, --sz) {
 386                         if (DRM_COPY_FROM_USER_UNCHECKED(&cmd, &buffer[i],
 387                                                          sizeof(cmd))) {
 388                                 return -EINVAL;
 389                         }
 390                         OUT_RING(cmd);
 391                 }
 392         }
 393
 394         if (dwords & 1)
 395                 OUT_RING(0);
 396
 397         ADVANCE_LP_RING();
 398
 399         return 0;
 400 }
 401
 402 static int i915_emit_box(struct drm_device * dev,
 403                          struct drm_clip_rect __user * boxes,
 404                          int i, int DR1, int DR4)
 405 {
 406         drm_i915_private_t *dev_priv = dev->dev_private;
 407         struct drm_clip_rect box;
 408         RING_LOCALS;
 409
 410         if (DRM_COPY_FROM_USER_UNCHECKED(&box, &boxes[i], sizeof(box))) {
 411                 return -EFAULT;
 412         }
 413
 414         if (box.y2 <= box.y1 || box.x2 <= box.x1 || box.y2 <= 0 || box.x2 <= 0) {
 415                 DRM_ERROR("Bad box %d,%d..%d,%d\n",
 416                           box.x1, box.y1, box.x2, box.y2);
 417                 return -EINVAL;
 418         }
 419
 420         if (IS_I965G(dev)) {
 421                 BEGIN_LP_RING(4);
 422                 OUT_RING(GFX_OP_DRAWRECT_INFO_I965);
 423                 OUT_RING((box.x1 & 0xffff) | (box.y1 << 16));
 424                 OUT_RING(((box.x2 - 1) & 0xffff) | ((box.y2 - 1) << 16));
 425                 OUT_RING(DR4);
 426                 ADVANCE_LP_RING();
 427         } else {
 428                 BEGIN_LP_RING(6);
 429                 OUT_RING(GFX_OP_DRAWRECT_INFO);
 430                 OUT_RING(DR1);
 431                 OUT_RING((box.x1 & 0xffff) | (box.y1 << 16));
 432                 OUT_RING(((box.x2 - 1) & 0xffff) | ((box.y2 - 1) << 16));
 433                 OUT_RING(DR4);
 434                 OUT_RING(0);
 435                 ADVANCE_LP_RING();
 436         }
 437
 438         return 0;
 439 }
 440
 441 /* XXX: Emitting the counter should really be moved to part of the IRQ
 442  * emit.  For now, do it in both places:
 443  */
 444
 445 void i915_emit_breadcrumb(struct drm_device *dev)
 446 {
 447         drm_i915_private_t *dev_priv = dev->dev_private;
 448         RING_LOCALS;
 449
 450         if (++dev_priv->counter > BREADCRUMB_MASK) {
 451                  dev_priv->counter = 1;
 452                  DRM_DEBUG("Breadcrumb counter wrapped around\n");
 453         }
 454
 455         dev_priv->sarea_priv->last_enqueue = dev_priv->counter;
 456
 457         BEGIN_LP_RING(4);
 458         OUT_RING(CMD_STORE_DWORD_IDX);
 459         OUT_RING(20);
 460         OUT_RING(dev_priv->counter);
 461         OUT_RING(0);
 462         ADVANCE_LP_RING();
 463 }
 464
 465
 466 int i915_emit_mi_flush(struct drm_device *dev, uint32_t flush)
 467 {
 468         drm_i915_private_t *dev_priv = dev->dev_private;
 469         uint32_t flush_cmd = CMD_MI_FLUSH;
 470         RING_LOCALS;
 471
 472         flush_cmd |= flush;
 473
 474         i915_kernel_lost_context(dev);
 475
 476         BEGIN_LP_RING(4);
 477         OUT_RING(flush_cmd);
 478         OUT_RING(0);
 479         OUT_RING(0);
 480         OUT_RING(0);
 481         ADVANCE_LP_RING();
 482
 483         return 0;
 484 }
 485
 486
 487 static int i915_dispatch_cmdbuffer(struct drm_device * dev,
 488                                    drm_i915_cmdbuffer_t * cmd)
 489 {
 490 #ifdef I915_HAVE_FENCE
 491         drm_i915_private_t *dev_priv = dev->dev_private;
 492 #endif
 493         int nbox = cmd->num_cliprects;
 494         int i = 0, count, ret;
 495
 496         if (cmd->sz & 0x3) {
 497                 DRM_ERROR("alignment");
 498                 return -EINVAL;
 499         }
 500
 501         i915_kernel_lost_context(dev);
 502
 503         count = nbox ? nbox : 1;
 504
 505         for (i = 0; i < count; i++) {
 506                 if (i < nbox) {
 507                         ret = i915_emit_box(dev, cmd->cliprects, i,
 508                                             cmd->DR1, cmd->DR4);
 509                         if (ret)
 510                                 return ret;
 511                 }
 512
 513                 ret = i915_emit_cmds(dev, (int __user *)cmd->buf, cmd->sz / 4);
 514                 if (ret)
 515                         return ret;
 516         }
 517
 518         i915_emit_breadcrumb( dev );
 519 #ifdef I915_HAVE_FENCE
 520         drm_fence_flush_old(dev, 0, dev_priv->counter);
 521 #endif
 522         return 0;
 523 }
 524
 525 static int i915_dispatch_batchbuffer(struct drm_device * dev,
 526                                      drm_i915_batchbuffer_t * batch)
 527 {
 528         drm_i915_private_t *dev_priv = dev->dev_private;
 529         struct drm_clip_rect __user *boxes = batch->cliprects;
 530         int nbox = batch->num_cliprects;
 531         int i = 0, count;
 532         RING_LOCALS;
 533
 534         if ((batch->start | batch->used) & 0x7) {
 535                 DRM_ERROR("alignment");
 536                 return -EINVAL;
 537         }
 538
 539         i915_kernel_lost_context(dev);
 540
 541         count = nbox ? nbox : 1;
 542
 543         for (i = 0; i < count; i++) {
 544                 if (i < nbox) {
 545                         int ret = i915_emit_box(dev, boxes, i,
 546                                                 batch->DR1, batch->DR4);
 547                         if (ret)
 548                                 return ret;
 549                 }
 550
 551                 if (dev_priv->use_mi_batchbuffer_start) {
 552                         BEGIN_LP_RING(2);
 553                         if (IS_I965G(dev)) {
 554                                 OUT_RING(MI_BATCH_BUFFER_START | (2 << 6) | MI_BATCH_NON_SECURE_I965);
 555                                 OUT_RING(batch->start);
 556                         } else {
 557                                 OUT_RING(MI_BATCH_BUFFER_START | (2 << 6));
 558                                 OUT_RING(batch->start | MI_BATCH_NON_SECURE);
 559                         }
 560                         ADVANCE_LP_RING();
 561
 562                 } else {
 563                         BEGIN_LP_RING(4);
 564                         OUT_RING(MI_BATCH_BUFFER);
 565                         OUT_RING(batch->start | MI_BATCH_NON_SECURE);
 566                         OUT_RING(batch->start + batch->used - 4);
 567                         OUT_RING(0);
 568                         ADVANCE_LP_RING();
 569                 }
 570         }
 571
 572         i915_emit_breadcrumb( dev );
 573 #ifdef I915_HAVE_FENCE
 574         drm_fence_flush_old(dev, 0, dev_priv->counter);
 575 #endif
 576         return 0;
 577 }
 578
 579 static void i915_do_dispatch_flip(struct drm_device * dev, int plane, int sync)
 580 {
 581         drm_i915_private_t *dev_priv = dev->dev_private;
 582         u32 num_pages, current_page, next_page, dspbase;
 583         int shift = 2 * plane, x, y;
 584         RING_LOCALS;
 585
 586         /* Calculate display base offset */
 587         num_pages = dev_priv->sarea_priv->third_handle ? 3 : 2;
 588         current_page = (dev_priv->sarea_priv->pf_current_page >> shift) & 0x3;
 589         next_page = (current_page + 1) % num_pages;
 590
 591         switch (next_page) {
 592         default:
 593         case 0:
 594                 dspbase = dev_priv->sarea_priv->front_offset;
 595                 break;
 596         case 1:
 597                 dspbase = dev_priv->sarea_priv->back_offset;
 598                 break;
 599         case 2:
 600                 dspbase = dev_priv->sarea_priv->third_offset;
 601                 break;
 602         }
 603
 604         if (plane == 0) {
 605                 x = dev_priv->sarea_priv->planeA_x;
 606                 y = dev_priv->sarea_priv->planeA_y;
 607         } else {
 608                 x = dev_priv->sarea_priv->planeB_x;
 609                 y = dev_priv->sarea_priv->planeB_y;
 610         }
 611
 612         dspbase += (y * dev_priv->sarea_priv->pitch + x) * dev_priv->cpp;
 613
 614         DRM_DEBUG("plane=%d current_page=%d dspbase=0x%x\n", plane, current_page,
 615                   dspbase);
 616
 617         BEGIN_LP_RING(4);
 618         OUT_RING(sync ? 0 :
 619                  (MI_WAIT_FOR_EVENT | (plane ? MI_WAIT_FOR_PLANE_B_FLIP :
 620                                        MI_WAIT_FOR_PLANE_A_FLIP)));
 621         OUT_RING(CMD_OP_DISPLAYBUFFER_INFO | (sync ? 0 : ASYNC_FLIP) |
 622                  (plane ? DISPLAY_PLANE_B : DISPLAY_PLANE_A));
 623         OUT_RING(dev_priv->sarea_priv->pitch * dev_priv->cpp);
 624         OUT_RING(dspbase);
 625         ADVANCE_LP_RING();
 626
 627         dev_priv->sarea_priv->pf_current_page &= ~(0x3 << shift);
 628         dev_priv->sarea_priv->pf_current_page |= next_page << shift;
 629 }
 630
 631 void i915_dispatch_flip(struct drm_device * dev, int planes, int sync)
 632 {
 633         drm_i915_private_t *dev_priv = dev->dev_private;
 634         int i;
 635
 636         DRM_DEBUG("%s: planes=0x%x pfCurrentPage=%d\n",
 637                   __FUNCTION__,
 638                   planes, dev_priv->sarea_priv->pf_current_page);
 639
 640         i915_emit_mi_flush(dev, MI_READ_FLUSH | MI_EXE_FLUSH);
 641
 642         for (i = 0; i < 2; i++)
 643                 if (planes & (1 << i))
 644                         i915_do_dispatch_flip(dev, i, sync);
 645
 646         i915_emit_breadcrumb(dev);
 647 #ifdef I915_HAVE_FENCE
 648         if (!sync)
 649                 drm_fence_flush_old(dev, 0, dev_priv->counter);
 650 #endif
 651 }
 652
 653 static int i915_quiescent(struct drm_device * dev)
 654 {
 655         drm_i915_private_t *dev_priv = dev->dev_private;
 656
 657         i915_kernel_lost_context(dev);
 658         return i915_wait_ring(dev, dev_priv->ring.Size - 8, __FUNCTION__);
 659 }
 660
 661 static int i915_flush_ioctl(struct drm_device *dev, void *data,
 662                             struct drm_file *file_priv)
 663 {
 664
 665         LOCK_TEST_WITH_RETURN(dev, file_priv);
 666
 667         return i915_quiescent(dev);
 668 }
 669
 670 static int i915_batchbuffer(struct drm_device *dev, void *data,
 671                             struct drm_file *file_priv)
 672 {
 673         drm_i915_private_t *dev_priv = (drm_i915_private_t *) dev->dev_private;
 674         drm_i915_sarea_t *sarea_priv = (drm_i915_sarea_t *)
 675             dev_priv->sarea_priv;
 676         drm_i915_batchbuffer_t *batch = data;
 677         int ret;
 678
 679         if (!dev_priv->allow_batchbuffer) {
 680                 DRM_ERROR("Batchbuffer ioctl disabled\n");
 681                 return -EINVAL;
 682         }
 683
 684         DRM_DEBUG("i915 batchbuffer, start %x used %d cliprects %d\n",
 685                   batch->start, batch->used, batch->num_cliprects);
 686
 687         LOCK_TEST_WITH_RETURN(dev, file_priv);
 688
 689         if (batch->num_cliprects && DRM_VERIFYAREA_READ(batch->cliprects,
 690                                                         batch->num_cliprects *
 691                                                         sizeof(struct drm_clip_rect)))
 692                 return -EFAULT;
 693
 694         ret = i915_dispatch_batchbuffer(dev, batch);
 695
 696         sarea_priv->last_dispatch = READ_BREADCRUMB(dev_priv);
 697         return ret;
 698 }
 699
 700 static int i915_cmdbuffer(struct drm_device *dev, void *data,
 701                           struct drm_file *file_priv)
 702 {
 703         drm_i915_private_t *dev_priv = (drm_i915_private_t *) dev->dev_private;
 704         drm_i915_sarea_t *sarea_priv = (drm_i915_sarea_t *)
 705             dev_priv->sarea_priv;
 706         drm_i915_cmdbuffer_t *cmdbuf = data;
 707         int ret;
 708
 709         DRM_DEBUG("i915 cmdbuffer, buf %p sz %d cliprects %d\n",
 710                   cmdbuf->buf, cmdbuf->sz, cmdbuf->num_cliprects);
 711
 712         LOCK_TEST_WITH_RETURN(dev, file_priv);
 713
 714         if (cmdbuf->num_cliprects &&
 715             DRM_VERIFYAREA_READ(cmdbuf->cliprects,
 716                                 cmdbuf->num_cliprects *
 717                                 sizeof(struct drm_clip_rect))) {
 718                 DRM_ERROR("Fault accessing cliprects\n");
 719                 return -EFAULT;
 720         }
 721
 722         ret = i915_dispatch_cmdbuffer(dev, cmdbuf);
 723         if (ret) {
 724                 DRM_ERROR("i915_dispatch_cmdbuffer failed\n");
 725                 return ret;
 726         }
 727
 728         sarea_priv->last_dispatch = READ_BREADCRUMB(dev_priv);
 729         return 0;
 730 }
 731
 732 #ifdef I915_HAVE_BUFFER
 733 struct i915_relocatee_info {
 734         struct drm_buffer_object *buf;
 735         unsigned long offset;
 736         u32 *data_page;
 737         unsigned page_offset;
 738         struct drm_bo_kmap_obj kmap;
 739         int is_iomem;
 740 };
 741
 742 static void i915_dereference_buffers_locked(struct drm_buffer_object **buffers,
 743                                             unsigned num_buffers)
 744 {
 745         while (num_buffers--)
 746                 drm_bo_usage_deref_locked(&buffers[num_buffers]);
 747 }
 748
 749 int i915_apply_reloc(struct drm_file *file_priv, int num_buffers,
 750                      struct drm_buffer_object **buffers,
 751                      struct i915_relocatee_info *relocatee,
 752                      uint32_t *reloc)
 753 {
 754         unsigned index;
 755         unsigned long new_cmd_offset;
 756         u32 val;
 757         int ret;
 758
 759         if (reloc[2] >= num_buffers) {
 760                 DRM_ERROR("Illegal relocation buffer %08X\n", reloc[2]);
 761                 return -EINVAL;
 762         }
 763
 764         new_cmd_offset = reloc[0];
 765         if (!relocatee->data_page ||
 766             !drm_bo_same_page(relocatee->offset, new_cmd_offset)) {
 767                 drm_bo_kunmap(&relocatee->kmap);
 768                 relocatee->offset = new_cmd_offset;
 769                 ret = drm_bo_kmap(relocatee->buf, new_cmd_offset >> PAGE_SHIFT,
 770                                   1, &relocatee->kmap);
 771                 if (ret) {
 772                         DRM_ERROR("Could not map command buffer to apply relocs\n %08lx", new_cmd_offset);
 773                         return ret;
 774                 }
 775
 776                 relocatee->data_page = drm_bmo_virtual(&relocatee->kmap,
 777                                                        &relocatee->is_iomem);
 778                 relocatee->page_offset = (relocatee->offset & PAGE_MASK);
 779         }
 780
 781         val = buffers[reloc[2]]->offset;
 782         index = (reloc[0] - relocatee->page_offset) >> 2;
 783
 784         /* add in validate */
 785         val = val + reloc[1];
 786
 787         relocatee->data_page[index] = val;
 788         return 0;
 789 }
 790
 791 int i915_process_relocs(struct drm_file *file_priv,
 792                         uint32_t buf_handle,
 793                         uint32_t *reloc_buf_handle,
 794                         struct i915_relocatee_info *relocatee,
 795                         struct drm_buffer_object **buffers,
 796                         uint32_t num_buffers)
 797 {
 798         struct drm_device *dev = file_priv->head->dev;
 799         struct drm_buffer_object *reloc_list_object;
 800         uint32_t cur_handle = *reloc_buf_handle;
 801         uint32_t *reloc_page;
 802         int ret, reloc_is_iomem, reloc_stride;
 803         uint32_t num_relocs, reloc_offset, reloc_end, reloc_page_offset, next_offset, cur_offset;
 804         struct drm_bo_kmap_obj reloc_kmap;
 805
 806         memset(&reloc_kmap, 0, sizeof(reloc_kmap));
 807
 808         reloc_list_object = drm_lookup_buffer_object(file_priv, cur_handle, 1);
 809         if (!reloc_list_object)
 810                 return -EINVAL;
 811
 812         ret = drm_bo_kmap(reloc_list_object, 0, 1, &reloc_kmap);
 813         if (ret) {
 814                 DRM_ERROR("Could not map relocation buffer.\n");
 815                 goto out;
 816         }
 817
 818         reloc_page = drm_bmo_virtual(&reloc_kmap, &reloc_is_iomem);
 819         num_relocs = reloc_page[0] & 0xffff;
 820
 821         if ((reloc_page[0] >> 16) & 0xffff) {
 822                 DRM_ERROR("Unsupported relocation type requested\n");
 823                 goto out;
 824         }
 825
 826         /* get next relocate buffer handle */
 827         *reloc_buf_handle = reloc_page[1];
 828         reloc_stride = I915_RELOC0_STRIDE * sizeof(uint32_t); /* may be different for other types of relocs */
 829
 830         DRM_DEBUG("num relocs is %d, next is %08X\n", num_relocs, reloc_page[1]);
 831
 832         reloc_page_offset = 0;
 833         reloc_offset = I915_RELOC_HEADER * sizeof(uint32_t);
 834         reloc_end = reloc_offset + (num_relocs * reloc_stride);
 835
 836         do {
 837                 next_offset = drm_bo_offset_end(reloc_offset, reloc_end);
 838
 839                 do {
 840                         cur_offset = ((reloc_offset + reloc_page_offset) & ~PAGE_MASK) / sizeof(uint32_t);
 841                         ret = i915_apply_reloc(file_priv, num_buffers,
 842                                          buffers, relocatee, &reloc_page[cur_offset]);
 843                         if (ret)
 844                                 goto out;
 845
 846                         reloc_offset += reloc_stride;
 847                 } while (reloc_offset < next_offset);
 848
 849                 drm_bo_kunmap(&reloc_kmap);
 850
 851                 reloc_offset = next_offset;
 852                 if (reloc_offset != reloc_end) {
 853                         ret = drm_bo_kmap(reloc_list_object, reloc_offset >> PAGE_SHIFT, 1, &reloc_kmap);
 854                         if (ret) {
 855                                 DRM_ERROR("Could not map relocation buffer.\n");
 856                                 goto out;
 857                         }
 858
 859                         reloc_page = drm_bmo_virtual(&reloc_kmap, &reloc_is_iomem);
 860                         reloc_page_offset = reloc_offset & ~PAGE_MASK;
 861                 }
 862
 863         } while (reloc_offset != reloc_end);
 864 out:
 865         drm_bo_kunmap(&reloc_kmap);
 866
 867         mutex_lock(&dev->struct_mutex);
 868         drm_bo_usage_deref_locked(&reloc_list_object);
 869         mutex_unlock(&dev->struct_mutex);
 870
 871         return ret;
 872 }
 873
 874 /*
 875  * Validate, add fence and relocate a block of bos from a userspace list
 876  */
 877 int i915_validate_buffer_list(struct drm_file *file_priv,
 878                               unsigned int fence_class, uint64_t data,
 879                               struct drm_buffer_object **buffers,
 880                               uint32_t *num_buffers)
 881 {
 882         struct drm_i915_op_arg arg;
 883         struct drm_bo_op_req *req = &arg.d.req;
 884         struct drm_bo_arg_rep rep;
 885         unsigned long next = 0;
 886         int ret = 0;
 887         unsigned buf_count = 0;
 888         struct drm_device *dev = file_priv->head->dev;
 889         uint32_t buf_reloc_handle, buf_handle;
 890         struct i915_relocatee_info relocatee;
 891
 892         do {
 893                 if (buf_count >= *num_buffers) {
 894                         DRM_ERROR("Buffer count exceeded %d\n.", *num_buffers);
 895                         ret = -EINVAL;
 896                         goto out_err;
 897                 }
 898
 899                 buffers[buf_count] = NULL;
 900
 901                 if (copy_from_user(&arg, (void __user *)(unsigned)data, sizeof(arg))) {
 902                         ret = -EFAULT;
 903                         goto out_err;
 904                 }
 905
 906                 if (arg.handled) {
 907                         data = arg.next;
 908                         buffers[buf_count] = drm_lookup_buffer_object(file_priv, req->arg_handle, 1);
 909                         buf_count++;
 910                         continue;
 911                 }
 912
 913                 rep.ret = 0;
 914                 if (req->op != drm_bo_validate) {
 915                         DRM_ERROR
 916                             ("Buffer object operation wasn't \"validate\".\n");
 917                         rep.ret = -EINVAL;
 918                         goto out_err;
 919                 }
 920
 921                 buf_handle = req->bo_req.handle;
 922                 buf_reloc_handle = arg.reloc_handle;
 923
 924                 rep.ret = drm_bo_handle_validate(file_priv, req->bo_req.handle,
 925                                                  req->bo_req.fence_class,
 926                                                  req->bo_req.flags,
 927                                                  req->bo_req.mask,
 928                                                  req->bo_req.hint,
 929                                                  &rep.bo_info,
 930                                                  &buffers[buf_count]);
 931
 932                 if (rep.ret) {
 933                         DRM_ERROR("error on handle validate %d\n", rep.ret);
 934                         goto out_err;
 935                 }
 936
 937
 938                 next = arg.next;
 939                 arg.handled = 1;
 940                 arg.d.rep = rep;
 941
 942                 if (copy_to_user((void __user *)(unsigned)data, &arg, sizeof(arg)))
 943                         return -EFAULT;
 944
 945                 data = next;
 946                 buf_count++;
 947
 948                 if (buf_reloc_handle) {
 949                         memset(&relocatee, 0, sizeof(relocatee));
 950
 951                         relocatee.buf = drm_lookup_buffer_object(file_priv, buf_handle, 1);
 952                         if (!relocatee.buf) {
 953                                 DRM_DEBUG("relocatee buffer invalid %08x\n", buf_handle);
 954                                 ret = -EINVAL;
 955                                 goto out_err;
 956                         }
 957
 958                         while (buf_reloc_handle) {
 959                                 ret = i915_process_relocs(file_priv, buf_handle, &buf_reloc_handle, &relocatee, buffers, buf_count);
 960                                 if (ret) {
 961                                         DRM_ERROR("process relocs failed\n");
 962                                         break;
 963                                 }
 964                         }
 965
 966                         drm_bo_kunmap(&relocatee.kmap);
 967                         mutex_lock(&dev->struct_mutex);
 968                         drm_bo_usage_deref_locked(&relocatee.buf);
 969                         mutex_unlock(&dev->struct_mutex);
 970
 971                         if (ret)
 972                                 goto out_err;
 973
 974                 }
 975         } while (next != 0);
 976         *num_buffers = buf_count;
 977         return 0;
 978 out_err:
 979         mutex_lock(&dev->struct_mutex);
 980         i915_dereference_buffers_locked(buffers, buf_count);
 981         mutex_unlock(&dev->struct_mutex);
 982         *num_buffers = 0;
 983         return (ret) ? ret : rep.ret;
 984 }
 985
 986 static int i915_execbuffer(struct drm_device *dev, void *data,
 987                            struct drm_file *file_priv)
 988 {
 989         drm_i915_private_t *dev_priv = (drm_i915_private_t *) dev->dev_private;
 990         drm_i915_sarea_t *sarea_priv = (drm_i915_sarea_t *)
 991                 dev_priv->sarea_priv;
 992         struct drm_i915_execbuffer *exec_buf = data;
 993         struct _drm_i915_batchbuffer *batch = &exec_buf->batch;
 994         struct drm_fence_arg *fence_arg = &exec_buf->fence_arg;
 995         int num_buffers;
 996         int ret;
 997         struct drm_buffer_object **buffers;
 998         struct drm_fence_object *fence;
 999
1000         if (!dev_priv->allow_batchbuffer) {
1001                 DRM_ERROR("Batchbuffer ioctl disabled\n");
1002                 return -EINVAL;
1003         }
1004
1005
1006         LOCK_TEST_WITH_RETURN(dev, file_priv);
1007
1008         if (batch->num_cliprects && DRM_VERIFYAREA_READ(batch->cliprects,
1009                                                         batch->num_cliprects *
1010                                                         sizeof(struct drm_clip_rect)))
1011                 return -EFAULT;
1012
1013         if (exec_buf->num_buffers > dev_priv->max_validate_buffers)
1014                 return -EINVAL;
1015
1016         num_buffers = exec_buf->num_buffers;
1017
1018         buffers = drm_calloc(num_buffers, sizeof(struct drm_buffer_object *), DRM_MEM_DRIVER);
1019         if (!buffers)
1020                 return -ENOMEM;
1021
1022         /* validate buffer list + fixup relocations */
1023         ret = i915_validate_buffer_list(file_priv, 0, exec_buf->ops_list,
1024                                         buffers, &num_buffers);
1025         if (ret)
1026                 goto out_free;
1027
1028         /* submit buffer */
1029         batch->start = buffers[num_buffers-1]->offset;
1030
1031         DRM_DEBUG("i915 exec batchbuffer, start %x used %d cliprects %d\n",
1032                   batch->start, batch->used, batch->num_cliprects);
1033
1034         ret = i915_dispatch_batchbuffer(dev, batch);
1035         if (ret)
1036                 goto out_err0;
1037
1038         sarea_priv->last_dispatch = READ_BREADCRUMB(dev_priv);
1039
1040         /* fence */
1041         ret = drm_fence_buffer_objects(dev, NULL, 0, NULL, &fence);
1042         if (ret)
1043                 goto out_err0;
1044
1045         if (!(fence_arg->flags & DRM_FENCE_FLAG_NO_USER)) {
1046                 ret = drm_fence_add_user_object(file_priv, fence, fence_arg->flags & DRM_FENCE_FLAG_SHAREABLE);
1047                 if (!ret) {
1048                         fence_arg->handle = fence->base.hash.key;
1049                         fence_arg->fence_class = fence->fence_class;
1050                         fence_arg->type = fence->type;
1051                         fence_arg->signaled = fence->signaled;
1052                 }
1053         }
1054         drm_fence_usage_deref_unlocked(&fence);
1055 out_err0:
1056
1057         /* handle errors */
1058         mutex_lock(&dev->struct_mutex);
1059         i915_dereference_buffers_locked(buffers, num_buffers);
1060         mutex_unlock(&dev->struct_mutex);
1061
1062 out_free:
1063         drm_free(buffers, (exec_buf->num_buffers * sizeof(struct drm_buffer_object *)), DRM_MEM_DRIVER);
1064
1065         return ret;
1066 }
1067 #endif
1068
1069 static int i915_do_cleanup_pageflip(struct drm_device * dev)
1070 {
1071         drm_i915_private_t *dev_priv = dev->dev_private;
1072         int i, planes, num_pages = dev_priv->sarea_priv->third_handle ? 3 : 2;
1073
1074         DRM_DEBUG("%s\n", __FUNCTION__);
1075
1076         for (i = 0, planes = 0; i < 2; i++)
1077                 if (dev_priv->sarea_priv->pf_current_page & (0x3 << (2 * i))) {
1078                         dev_priv->sarea_priv->pf_current_page =
1079                                 (dev_priv->sarea_priv->pf_current_page &
1080                                  ~(0x3 << (2 * i))) | (num_pages - 1) << (2 * i);
1081
1082                         planes |= 1 << i;
1083                 }
1084
1085         if (planes)
1086                 i915_dispatch_flip(dev, planes, 0);
1087
1088         return 0;
1089 }
1090
1091 static int i915_flip_bufs(struct drm_device *dev, void *data, struct drm_file *file_priv)
1092 {
1093         drm_i915_flip_t *param = data;
1094
1095         DRM_DEBUG("%s\n", __FUNCTION__);
1096
1097         LOCK_TEST_WITH_RETURN(dev, file_priv);
1098
1099         /* This is really planes */
1100         if (param->pipes & ~0x3) {
1101                 DRM_ERROR("Invalid planes 0x%x, only <= 0x3 is valid\n",
1102                           param->pipes);
1103                 return -EINVAL;
1104         }
1105
1106         i915_dispatch_flip(dev, param->pipes, 0);
1107
1108         return 0;
1109 }
1110
1111
1112 static int i915_getparam(struct drm_device *dev, void *data,
1113                          struct drm_file *file_priv)
1114 {
1115         drm_i915_private_t *dev_priv = dev->dev_private;
1116         drm_i915_getparam_t *param = data;
1117         int value;
1118
1119         if (!dev_priv) {
1120                 DRM_ERROR("%s called with no initialization\n", __FUNCTION__);
1121                 return -EINVAL;
1122         }
1123
1124         switch (param->param) {
1125         case I915_PARAM_IRQ_ACTIVE:
1126                 value = dev->irq ? 1 : 0;
1127                 break;
1128         case I915_PARAM_ALLOW_BATCHBUFFER:
1129                 value = dev_priv->allow_batchbuffer ? 1 : 0;
1130                 break;
1131         case I915_PARAM_LAST_DISPATCH:
1132                 value = READ_BREADCRUMB(dev_priv);
1133                 break;
1134         default:
1135                 DRM_ERROR("Unknown parameter %d\n", param->param);
1136                 return -EINVAL;
1137         }
1138
1139         if (DRM_COPY_TO_USER(param->value, &value, sizeof(int))) {
1140                 DRM_ERROR("DRM_COPY_TO_USER failed\n");
1141                 return -EFAULT;
1142         }
1143
1144         return 0;
1145 }
1146
1147 static int i915_setparam(struct drm_device *dev, void *data,
1148                          struct drm_file *file_priv)
1149 {
1150         drm_i915_private_t *dev_priv = dev->dev_private;
1151         drm_i915_setparam_t *param = data;
1152
1153         if (!dev_priv) {
1154                 DRM_ERROR("%s called with no initialization\n", __FUNCTION__);
1155                 return -EINVAL;
1156         }
1157
1158         switch (param->param) {
1159         case I915_SETPARAM_USE_MI_BATCHBUFFER_START:
1160                 dev_priv->use_mi_batchbuffer_start = param->value;
1161                 break;
1162         case I915_SETPARAM_TEX_LRU_LOG_GRANULARITY:
1163                 dev_priv->tex_lru_log_granularity = param->value;
1164                 break;
1165         case I915_SETPARAM_ALLOW_BATCHBUFFER:
1166                 dev_priv->allow_batchbuffer = param->value;
1167                 break;
1168         default:
1169                 DRM_ERROR("unknown parameter %d\n", param->param);
1170                 return -EINVAL;
1171         }
1172
1173         return 0;
1174 }
1175
1176 drm_i915_mmio_entry_t mmio_table[] = {
1177         [MMIO_REGS_PS_DEPTH_COUNT] = {
1178                 I915_MMIO_MAY_READ|I915_MMIO_MAY_WRITE,
1179                 0x2350,
1180                 8
1181         }
1182 };
1183
1184 static int mmio_table_size = sizeof(mmio_table)/sizeof(drm_i915_mmio_entry_t);
1185
1186 static int i915_mmio(struct drm_device *dev, void *data,
1187                      struct drm_file *file_priv)
1188 {
1189         uint32_t buf[8];
1190         drm_i915_private_t *dev_priv = dev->dev_private;
1191         drm_i915_mmio_entry_t *e;
1192         drm_i915_mmio_t *mmio = data;
1193         void __iomem *base;
1194         int i;
1195
1196         if (!dev_priv) {
1197                 DRM_ERROR("%s called with no initialization\n", __FUNCTION__);
1198                 return -EINVAL;
1199         }
1200
1201         if (mmio->reg >= mmio_table_size)
1202                 return -EINVAL;
1203
1204         e = &mmio_table[mmio->reg];
1205         base = (u8 *) dev_priv->mmio_map->handle + e->offset;
1206
1207         switch (mmio->read_write) {
1208                 case I915_MMIO_READ:
1209                         if (!(e->flag & I915_MMIO_MAY_READ))
1210                                 return -EINVAL;
1211                         for (i = 0; i < e->size / 4; i++)
1212                                 buf[i] = I915_READ(e->offset + i * 4);
1213                         if (DRM_COPY_TO_USER(mmio->data, buf, e->size)) {
1214                                 DRM_ERROR("DRM_COPY_TO_USER failed\n");
1215                                 return -EFAULT;
1216                         }
1217                         break;
1218
1219                 case I915_MMIO_WRITE:
1220                         if (!(e->flag & I915_MMIO_MAY_WRITE))
1221                                 return -EINVAL;
1222                         if(DRM_COPY_FROM_USER(buf, mmio->data, e->size)) {
1223                                 DRM_ERROR("DRM_COPY_TO_USER failed\n");
1224                                 return -EFAULT;
1225                         }
1226                         for (i = 0; i < e->size / 4; i++)
1227                                 I915_WRITE(e->offset + i * 4, buf[i]);
1228                         break;
1229         }
1230         return 0;
1231 }
1232
1233 static int i915_set_status_page(struct drm_device *dev, void *data,
1234                                 struct drm_file *file_priv)
1235 {
1236         drm_i915_private_t *dev_priv = dev->dev_private;
1237         drm_i915_hws_addr_t *hws = data;
1238
1239         if (!dev_priv) {
1240                 DRM_ERROR("%s called with no initialization\n", __FUNCTION__);
1241                 return -EINVAL;
1242         }
1243         DRM_DEBUG("set status page addr 0x%08x\n", (u32)hws->addr);
1244
1245         dev_priv->status_gfx_addr = hws->addr & (0x1ffff<<12);
1246
1247         dev_priv->hws_map.offset = dev->agp->base + hws->addr;
1248         dev_priv->hws_map.size = 4*1024;
1249         dev_priv->hws_map.type = 0;
1250         dev_priv->hws_map.flags = 0;
1251         dev_priv->hws_map.mtrr = 0;
1252
1253         drm_core_ioremap(&dev_priv->hws_map, dev);
1254         if (dev_priv->hws_map.handle == NULL) {
1255                 dev->dev_private = (void *)dev_priv;
1256                 i915_dma_cleanup(dev);
1257                 dev_priv->status_gfx_addr = 0;
1258                 DRM_ERROR("can not ioremap virtual address for"
1259                                 " G33 hw status page\n");
1260                 return -ENOMEM;
1261         }
1262         dev_priv->hw_status_page = dev_priv->hws_map.handle;
1263
1264         memset(dev_priv->hw_status_page, 0, PAGE_SIZE);
1265         I915_WRITE(0x02080, dev_priv->status_gfx_addr);
1266         DRM_DEBUG("load hws 0x2080 with gfx mem 0x%x\n",
1267                         dev_priv->status_gfx_addr);
1268         DRM_DEBUG("load hws at %p\n", dev_priv->hw_status_page);
1269         return 0;
1270 }
1271
1272 int i915_driver_load(struct drm_device *dev, unsigned long flags)
1273 {
1274         /* i915 has 4 more counters */
1275         dev->counters += 4;
1276         dev->types[6] = _DRM_STAT_IRQ;
1277         dev->types[7] = _DRM_STAT_PRIMARY;
1278         dev->types[8] = _DRM_STAT_SECONDARY;
1279         dev->types[9] = _DRM_STAT_DMA;
1280
1281         return 0;
1282 }
1283
1284 void i915_driver_lastclose(struct drm_device * dev)
1285 {
1286         if (dev->dev_private) {
1287                 drm_i915_private_t *dev_priv = dev->dev_private;
1288                 i915_do_cleanup_pageflip(dev);
1289                 i915_mem_takedown(&(dev_priv->agp_heap));
1290         }
1291         i915_dma_cleanup(dev);
1292 }
1293
1294 void i915_driver_preclose(struct drm_device * dev, struct drm_file *file_priv)
1295 {
1296         if (dev->dev_private) {
1297                 drm_i915_private_t *dev_priv = dev->dev_private;
1298                 i915_mem_release(dev, file_priv, dev_priv->agp_heap);
1299         }
1300 }
1301
1302 struct drm_ioctl_desc i915_ioctls[] = {
1303         DRM_IOCTL_DEF(DRM_I915_INIT, i915_dma_init, DRM_AUTH|DRM_MASTER|DRM_ROOT_ONLY),
1304         DRM_IOCTL_DEF(DRM_I915_FLUSH, i915_flush_ioctl, DRM_AUTH),
1305         DRM_IOCTL_DEF(DRM_I915_FLIP, i915_flip_bufs, DRM_AUTH),
1306         DRM_IOCTL_DEF(DRM_I915_BATCHBUFFER, i915_batchbuffer, DRM_AUTH),
1307         DRM_IOCTL_DEF(DRM_I915_IRQ_EMIT, i915_irq_emit, DRM_AUTH),
1308         DRM_IOCTL_DEF(DRM_I915_IRQ_WAIT, i915_irq_wait, DRM_AUTH),
1309         DRM_IOCTL_DEF(DRM_I915_GETPARAM, i915_getparam, DRM_AUTH),
1310         DRM_IOCTL_DEF(DRM_I915_SETPARAM, i915_setparam, DRM_AUTH|DRM_MASTER|DRM_ROOT_ONLY),
1311         DRM_IOCTL_DEF(DRM_I915_ALLOC, i915_mem_alloc, DRM_AUTH),
1312         DRM_IOCTL_DEF(DRM_I915_FREE, i915_mem_free, DRM_AUTH),
1313         DRM_IOCTL_DEF(DRM_I915_INIT_HEAP, i915_mem_init_heap, DRM_AUTH|DRM_MASTER|DRM_ROOT_ONLY),
1314         DRM_IOCTL_DEF(DRM_I915_CMDBUFFER, i915_cmdbuffer, DRM_AUTH),
1315         DRM_IOCTL_DEF(DRM_I915_DESTROY_HEAP,  i915_mem_destroy_heap, DRM_AUTH|DRM_MASTER|DRM_ROOT_ONLY ),
1316         DRM_IOCTL_DEF(DRM_I915_SET_VBLANK_PIPE,  i915_vblank_pipe_set, DRM_AUTH|DRM_MASTER|DRM_ROOT_ONLY ),
1317         DRM_IOCTL_DEF(DRM_I915_GET_VBLANK_PIPE,  i915_vblank_pipe_get, DRM_AUTH ),
1318         DRM_IOCTL_DEF(DRM_I915_VBLANK_SWAP, i915_vblank_swap, DRM_AUTH),
1319         DRM_IOCTL_DEF(DRM_I915_MMIO, i915_mmio, DRM_AUTH),
1320         DRM_IOCTL_DEF(DRM_I915_HWS_ADDR, i915_set_status_page, DRM_AUTH),
1321 #ifdef I915_HAVE_BUFFER
1322         DRM_IOCTL_DEF(DRM_I915_EXECBUFFER, i915_execbuffer, DRM_AUTH),
1323 #endif
1324 };
1325
1326 int i915_max_ioctl = DRM_ARRAY_SIZE(i915_ioctls);
1327
1328 /**
1329  * Determine if the device really is AGP or not.
1330  *
1331  * All Intel graphics chipsets are treated as AGP, even if they are really
1332  * PCI-e.
1333  *
1334  * \param dev   The device to be tested.
1335  *
1336  * \returns
1337  * A value of 1 is always retured to indictate every i9x5 is AGP.
1338  */
1339 int i915_driver_device_is_agp(struct drm_device * dev)
1340 {
1341         return 1;
1342 }
1343
1344 int i915_driver_firstopen(struct drm_device *dev)
1345 {
1346 #ifdef I915_HAVE_BUFFER
1347         drm_bo_driver_init(dev);
1348 #endif
1349         return 0;
1350 }