shared-core/i915_dma.c

   1 /* i915_dma.c -- DMA support for the I915 -*- linux-c -*-
   2  */
   3 /*
   4  * Copyright 2003 Tungsten Graphics, Inc., Cedar Park, Texas.
   5  * All Rights Reserved.
   6  *
   7  * Permission is hereby granted, free of charge, to any person obtaining a
   8  * copy of this software and associated documentation files (the
   9  * "Software"), to deal in the Software without restriction, including
  10  * without limitation the rights to use, copy, modify, merge, publish,
  11  * distribute, sub license, and/or sell copies of the Software, and to
  12  * permit persons to whom the Software is furnished to do so, subject to
  13  * the following conditions:
  14  *
  15  * The above copyright notice and this permission notice (including the
  16  * next paragraph) shall be included in all copies or substantial portions
  17  * of the Software.
  18  *
  19  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
  20  * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
  21  * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT.
  22  * IN NO EVENT SHALL TUNGSTEN GRAPHICS AND/OR ITS SUPPLIERS BE LIABLE FOR
  23  * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
  24  * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
  25  * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  26  *
  27  */
  28
  29 #include "drmP.h"
  30 #include "drm.h"
  31 #include "i915_drm.h"
  32 #include "i915_drv.h"
  33
  34 #define IS_I965G(dev)  (dev->pci_device == 0x2972 || \
  35                         dev->pci_device == 0x2982 || \
  36                         dev->pci_device == 0x2992 || \
  37                         dev->pci_device == 0x29A2)
  38
  39
  40 /* Really want an OS-independent resettable timer.  Would like to have
  41  * this loop run for (eg) 3 sec, but have the timer reset every time
  42  * the head pointer changes, so that EBUSY only happens if the ring
  43  * actually stalls for (eg) 3 seconds.
  44  */
  45 int i915_wait_ring(drm_device_t * dev, int n, const char *caller)
  46 {
  47         drm_i915_private_t *dev_priv = dev->dev_private;
  48         drm_i915_ring_buffer_t *ring = &(dev_priv->ring);
  49         u32 last_head = I915_READ(LP_RING + RING_HEAD) & HEAD_ADDR;
  50         int i;
  51
  52         for (i = 0; i < 10000; i++) {
  53                 ring->head = I915_READ(LP_RING + RING_HEAD) & HEAD_ADDR;
  54                 ring->space = ring->head - (ring->tail + 8);
  55                 if (ring->space < 0)
  56                         ring->space += ring->Size;
  57                 if (ring->space >= n)
  58                         return 0;
  59
  60                 dev_priv->sarea_priv->perf_boxes |= I915_BOX_WAIT;
  61
  62                 if (ring->head != last_head)
  63                         i = 0;
  64
  65                 last_head = ring->head;
  66         }
  67
  68         return DRM_ERR(EBUSY);
  69 }
  70
  71 void i915_kernel_lost_context(drm_device_t * dev)
  72 {
  73         drm_i915_private_t *dev_priv = dev->dev_private;
  74         drm_i915_ring_buffer_t *ring = &(dev_priv->ring);
  75
  76         ring->head = I915_READ(LP_RING + RING_HEAD) & HEAD_ADDR;
  77         ring->tail = I915_READ(LP_RING + RING_TAIL) & TAIL_ADDR;
  78         ring->space = ring->head - (ring->tail + 8);
  79         if (ring->space < 0)
  80                 ring->space += ring->Size;
  81
  82         if (ring->head == ring->tail)
  83                 dev_priv->sarea_priv->perf_boxes |= I915_BOX_RING_EMPTY;
  84 }
  85
  86 static int i915_dma_cleanup(drm_device_t * dev)
  87 {
  88         /* Make sure interrupts are disabled here because the uninstall ioctl
  89          * may not have been called from userspace and after dev_private
  90          * is freed, it's too late.
  91          */
  92         if (dev->irq)
  93                 drm_irq_uninstall(dev);
  94
  95         if (dev->dev_private) {
  96                 drm_i915_private_t *dev_priv =
  97                     (drm_i915_private_t *) dev->dev_private;
  98
  99                 if (dev_priv->ring.virtual_start) {
 100                         drm_core_ioremapfree(&dev_priv->ring.map, dev);
 101                 }
 102
 103                 if (dev_priv->status_page_dmah) {
 104                         drm_pci_free(dev, dev_priv->status_page_dmah);
 105                         /* Need to rewrite hardware status page */
 106                         I915_WRITE(0x02080, 0x1ffff000);
 107                 }
 108
 109                 drm_free(dev->dev_private, sizeof(drm_i915_private_t),
 110                          DRM_MEM_DRIVER);
 111
 112                 dev->dev_private = NULL;
 113         }
 114
 115         return 0;
 116 }
 117
 118 static int i915_initialize(drm_device_t * dev,
 119                            drm_i915_private_t * dev_priv,
 120                            drm_i915_init_t * init)
 121 {
 122         memset(dev_priv, 0, sizeof(drm_i915_private_t));
 123
 124         DRM_GETSAREA();
 125         if (!dev_priv->sarea) {
 126                 DRM_ERROR("can not find sarea!\n");
 127                 dev->dev_private = (void *)dev_priv;
 128                 i915_dma_cleanup(dev);
 129                 return DRM_ERR(EINVAL);
 130         }
 131
 132         dev_priv->mmio_map = drm_core_findmap(dev, init->mmio_offset);
 133         if (!dev_priv->mmio_map) {
 134                 dev->dev_private = (void *)dev_priv;
 135                 i915_dma_cleanup(dev);
 136                 DRM_ERROR("can not find mmio map!\n");
 137                 return DRM_ERR(EINVAL);
 138         }
 139
 140         dev_priv->sarea_priv = (drm_i915_sarea_t *)
 141             ((u8 *) dev_priv->sarea->handle + init->sarea_priv_offset);
 142
 143         dev_priv->ring.Start = init->ring_start;
 144         dev_priv->ring.End = init->ring_end;
 145         dev_priv->ring.Size = init->ring_size;
 146         dev_priv->ring.tail_mask = dev_priv->ring.Size - 1;
 147
 148         dev_priv->ring.map.offset = init->ring_start;
 149         dev_priv->ring.map.size = init->ring_size;
 150         dev_priv->ring.map.type = 0;
 151         dev_priv->ring.map.flags = 0;
 152         dev_priv->ring.map.mtrr = 0;
 153
 154         drm_core_ioremap(&dev_priv->ring.map, dev);
 155
 156         if (dev_priv->ring.map.handle == NULL) {
 157                 dev->dev_private = (void *)dev_priv;
 158                 i915_dma_cleanup(dev);
 159                 DRM_ERROR("can not ioremap virtual address for"
 160                           " ring buffer\n");
 161                 return DRM_ERR(ENOMEM);
 162         }
 163
 164         dev_priv->ring.virtual_start = dev_priv->ring.map.handle;
 165
 166         dev_priv->back_offset = init->back_offset;
 167         dev_priv->front_offset = init->front_offset;
 168         dev_priv->current_page = 0;
 169         dev_priv->sarea_priv->pf_current_page = dev_priv->current_page;
 170
 171         /* We are using separate values as placeholders for mechanisms for
 172          * private backbuffer/depthbuffer usage.
 173          */
 174         dev_priv->use_mi_batchbuffer_start = 0;
 175
 176         /* Allow hardware batchbuffers unless told otherwise.
 177          */
 178         dev_priv->allow_batchbuffer = 1;
 179
 180         /* Program Hardware Status Page */
 181         dev_priv->status_page_dmah = drm_pci_alloc(dev, PAGE_SIZE, PAGE_SIZE,
 182             0xffffffff);
 183
 184         if (!dev_priv->status_page_dmah) {
 185                 dev->dev_private = (void *)dev_priv;
 186                 i915_dma_cleanup(dev);
 187                 DRM_ERROR("Can not allocate hardware status page\n");
 188                 return DRM_ERR(ENOMEM);
 189         }
 190         dev_priv->hw_status_page = dev_priv->status_page_dmah->vaddr;
 191         dev_priv->dma_status_page = dev_priv->status_page_dmah->busaddr;
 192
 193         memset(dev_priv->hw_status_page, 0, PAGE_SIZE);
 194         DRM_DEBUG("hw status page @ %p\n", dev_priv->hw_status_page);
 195
 196         I915_WRITE(0x02080, dev_priv->dma_status_page);
 197         DRM_DEBUG("Enabled hardware status page\n");
 198
 199         dev->dev_private = (void *)dev_priv;
 200
 201         return 0;
 202 }
 203
 204 static int i915_dma_resume(drm_device_t * dev)
 205 {
 206         drm_i915_private_t *dev_priv = (drm_i915_private_t *) dev->dev_private;
 207
 208         DRM_DEBUG("%s\n", __FUNCTION__);
 209
 210         if (!dev_priv->sarea) {
 211                 DRM_ERROR("can not find sarea!\n");
 212                 return DRM_ERR(EINVAL);
 213         }
 214
 215         if (!dev_priv->mmio_map) {
 216                 DRM_ERROR("can not find mmio map!\n");
 217                 return DRM_ERR(EINVAL);
 218         }
 219
 220         if (dev_priv->ring.map.handle == NULL) {
 221                 DRM_ERROR("can not ioremap virtual address for"
 222                           " ring buffer\n");
 223                 return DRM_ERR(ENOMEM);
 224         }
 225
 226         /* Program Hardware Status Page */
 227         if (!dev_priv->hw_status_page) {
 228                 DRM_ERROR("Can not find hardware status page\n");
 229                 return DRM_ERR(EINVAL);
 230         }
 231         DRM_DEBUG("hw status page @ %p\n", dev_priv->hw_status_page);
 232
 233         I915_WRITE(0x02080, dev_priv->dma_status_page);
 234         DRM_DEBUG("Enabled hardware status page\n");
 235
 236         return 0;
 237 }
 238
 239 static int i915_dma_init(DRM_IOCTL_ARGS)
 240 {
 241         DRM_DEVICE;
 242         drm_i915_private_t *dev_priv;
 243         drm_i915_init_t init;
 244         int retcode = 0;
 245
 246         DRM_COPY_FROM_USER_IOCTL(init, (drm_i915_init_t __user *) data,
 247                                  sizeof(init));
 248
 249         switch (init.func) {
 250         case I915_INIT_DMA:
 251                 dev_priv = drm_alloc(sizeof(drm_i915_private_t),
 252                                      DRM_MEM_DRIVER);
 253                 if (dev_priv == NULL)
 254                         return DRM_ERR(ENOMEM);
 255                 retcode = i915_initialize(dev, dev_priv, &init);
 256                 break;
 257         case I915_CLEANUP_DMA:
 258                 retcode = i915_dma_cleanup(dev);
 259                 break;
 260         case I915_RESUME_DMA:
 261                 retcode = i915_dma_resume(dev);
 262                 break;
 263         default:
 264                 retcode = -EINVAL;
 265                 break;
 266         }
 267
 268         return retcode;
 269 }
 270
 271 /* Implement basically the same security restrictions as hardware does
 272  * for MI_BATCH_NON_SECURE.  These can be made stricter at any time.
 273  *
 274  * Most of the calculations below involve calculating the size of a
 275  * particular instruction.  It's important to get the size right as
 276  * that tells us where the next instruction to check is.  Any illegal
 277  * instruction detected will be given a size of zero, which is a
 278  * signal to abort the rest of the buffer.
 279  */
 280 static int do_validate_cmd(int cmd)
 281 {
 282         switch (((cmd >> 29) & 0x7)) {
 283         case 0x0:
 284                 switch ((cmd >> 23) & 0x3f) {
 285                 case 0x0:
 286                         return 1;       /* MI_NOOP */
 287                 case 0x4:
 288                         return 1;       /* MI_FLUSH */
 289                 default:
 290                         return 0;       /* disallow everything else */
 291                 }
 292                 break;
 293         case 0x1:
 294                 return 0;       /* reserved */
 295         case 0x2:
 296                 return (cmd & 0xff) + 2;        /* 2d commands */
 297         case 0x3:
 298                 if (((cmd >> 24) & 0x1f) <= 0x18)
 299                         return 1;
 300
 301                 switch ((cmd >> 24) & 0x1f) {
 302                 case 0x1c:
 303                         return 1;
 304                 case 0x1d:
 305                         switch ((cmd >> 16) & 0xff) {
 306                         case 0x3:
 307                                 return (cmd & 0x1f) + 2;
 308                         case 0x4:
 309                                 return (cmd & 0xf) + 2;
 310                         default:
 311                                 return (cmd & 0xffff) + 2;
 312                         }
 313                 case 0x1e:
 314                         if (cmd & (1 << 23))
 315                                 return (cmd & 0xffff) + 1;
 316                         else
 317                                 return 1;
 318                 case 0x1f:
 319                         if ((cmd & (1 << 23)) == 0)     /* inline vertices */
 320                                 return (cmd & 0x1ffff) + 2;
 321                         else if (cmd & (1 << 17))       /* indirect random */
 322                                 if ((cmd & 0xffff) == 0)
 323                                         return 0;       /* unknown length, too hard */
 324                                 else
 325                                         return (((cmd & 0xffff) + 1) / 2) + 1;
 326                         else
 327                                 return 2;       /* indirect sequential */
 328                 default:
 329                         return 0;
 330                 }
 331         default:
 332                 return 0;
 333         }
 334
 335         return 0;
 336 }
 337
 338 static int validate_cmd(int cmd)
 339 {
 340         int ret = do_validate_cmd(cmd);
 341
 342 /*      printk("validate_cmd( %x ): %d\n", cmd, ret); */
 343
 344         return ret;
 345 }
 346
 347 static int i915_emit_cmds(drm_device_t * dev, int __user * buffer, int dwords)
 348 {
 349         drm_i915_private_t *dev_priv = dev->dev_private;
 350         int i;
 351         RING_LOCALS;
 352
 353         if ((dwords+1) * sizeof(int) >= dev_priv->ring.Size - 8)
 354                 return DRM_ERR(EINVAL);
 355
 356         BEGIN_LP_RING((dwords+1)&~1);
 357
 358         for (i = 0; i < dwords;) {
 359                 int cmd, sz;
 360
 361              if (DRM_COPY_FROM_USER_UNCHECKED(&cmd, &buffer[i], sizeof(cmd))) {
 362
 363                         return DRM_ERR(EINVAL);
 364               }
 365                 if ((sz = validate_cmd(cmd)) == 0 || i + sz > dwords)
 366                         return DRM_ERR(EINVAL);
 367
 368                 OUT_RING(cmd);
 369
 370                 while (++i, --sz) {
 371                         if (DRM_COPY_FROM_USER_UNCHECKED(&cmd, &buffer[i],
 372                                                          sizeof(cmd))) {
 373                                 return DRM_ERR(EINVAL);
 374                         }
 375                         OUT_RING(cmd);
 376                 }
 377         }
 378
 379         if (dwords & 1)
 380                 OUT_RING(0);
 381
 382         ADVANCE_LP_RING();
 383
 384         return 0;
 385 }
 386
 387 static int i915_emit_box(drm_device_t * dev,
 388                          drm_clip_rect_t __user * boxes,
 389                          int i, int DR1, int DR4)
 390 {
 391         drm_i915_private_t *dev_priv = dev->dev_private;
 392         drm_clip_rect_t box;
 393         RING_LOCALS;
 394
 395         if (DRM_COPY_FROM_USER_UNCHECKED(&box, &boxes[i], sizeof(box))) {
 396                 return EFAULT;
 397         }
 398
 399         if (box.y2 <= box.y1 || box.x2 <= box.x1 || box.y2 <= 0 || box.x2 <= 0) {
 400                 DRM_ERROR("Bad box %d,%d..%d,%d\n",
 401                           box.x1, box.y1, box.x2, box.y2);
 402                 return DRM_ERR(EINVAL);
 403         }
 404
 405         if (IS_I965G(dev)) {
 406                 BEGIN_LP_RING(4);
 407                 OUT_RING(GFX_OP_DRAWRECT_INFO_I965);
 408                 OUT_RING((box.x1 & 0xffff) | (box.y1 << 16));
 409                 OUT_RING(((box.x2 - 1) & 0xffff) | ((box.y2 - 1) << 16));
 410                 OUT_RING(DR4);
 411                 ADVANCE_LP_RING();
 412         } else {
 413                 BEGIN_LP_RING(6);
 414                 OUT_RING(GFX_OP_DRAWRECT_INFO);
 415                 OUT_RING(DR1);
 416                 OUT_RING((box.x1 & 0xffff) | (box.y1 << 16));
 417                 OUT_RING(((box.x2 - 1) & 0xffff) | ((box.y2 - 1) << 16));
 418                 OUT_RING(DR4);
 419                 OUT_RING(0);
 420                 ADVANCE_LP_RING();
 421         }
 422
 423         return 0;
 424 }
 425
 426 /* XXX: Emitting the counter should really be moved to part of the IRQ
 427  * emit.  For now, do it in both places:
 428  */
 429
 430 static void i915_emit_breadcrumb(drm_device_t *dev)
 431 {
 432         drm_i915_private_t *dev_priv = dev->dev_private;
 433         RING_LOCALS;
 434
 435         dev_priv->sarea_priv->last_enqueue = ++dev_priv->counter;
 436
 437         if (dev_priv->counter > 0x7FFFFFFFUL)
 438                 dev_priv->sarea_priv->last_enqueue = dev_priv->counter = 1;
 439
 440         BEGIN_LP_RING(4);
 441         OUT_RING(CMD_STORE_DWORD_IDX);
 442         OUT_RING(20);
 443         OUT_RING(dev_priv->counter);
 444         OUT_RING(0);
 445         ADVANCE_LP_RING();
 446 }
 447
 448 static int i915_dispatch_cmdbuffer(drm_device_t * dev,
 449                                    drm_i915_cmdbuffer_t * cmd)
 450 {
 451         int nbox = cmd->num_cliprects;
 452         int i = 0, count, ret;
 453
 454         if (cmd->sz & 0x3) {
 455                 DRM_ERROR("alignment");
 456                 return DRM_ERR(EINVAL);
 457         }
 458
 459         i915_kernel_lost_context(dev);
 460
 461         count = nbox ? nbox : 1;
 462
 463         for (i = 0; i < count; i++) {
 464                 if (i < nbox) {
 465                         ret = i915_emit_box(dev, cmd->cliprects, i,
 466                                             cmd->DR1, cmd->DR4);
 467                         if (ret)
 468                                 return ret;
 469                 }
 470
 471                 ret = i915_emit_cmds(dev, (int __user *)cmd->buf, cmd->sz / 4);
 472                 if (ret)
 473                         return ret;
 474         }
 475
 476         i915_emit_breadcrumb( dev );
 477         return 0;
 478 }
 479
 480 static int i915_dispatch_batchbuffer(drm_device_t * dev,
 481                                      drm_i915_batchbuffer_t * batch)
 482 {
 483         drm_i915_private_t *dev_priv = dev->dev_private;
 484         drm_clip_rect_t __user *boxes = batch->cliprects;
 485         int nbox = batch->num_cliprects;
 486         int i = 0, count;
 487         RING_LOCALS;
 488
 489         if ((batch->start | batch->used) & 0x7) {
 490                 DRM_ERROR("alignment");
 491                 return DRM_ERR(EINVAL);
 492         }
 493
 494         i915_kernel_lost_context(dev);
 495
 496         count = nbox ? nbox : 1;
 497
 498         for (i = 0; i < count; i++) {
 499                 if (i < nbox) {
 500                         int ret = i915_emit_box(dev, boxes, i,
 501                                                 batch->DR1, batch->DR4);
 502                         if (ret)
 503                                 return ret;
 504                 }
 505
 506                 if (dev_priv->use_mi_batchbuffer_start) {
 507                         BEGIN_LP_RING(2);
 508                         OUT_RING(MI_BATCH_BUFFER_START | (2 << 6));
 509                         OUT_RING(batch->start | MI_BATCH_NON_SECURE);
 510                         ADVANCE_LP_RING();
 511                 } else {
 512                         BEGIN_LP_RING(4);
 513                         OUT_RING(MI_BATCH_BUFFER);
 514                         OUT_RING(batch->start | MI_BATCH_NON_SECURE);
 515                         OUT_RING(batch->start + batch->used - 4);
 516                         OUT_RING(0);
 517                         ADVANCE_LP_RING();
 518                 }
 519         }
 520
 521         i915_emit_breadcrumb( dev );
 522         return 0;
 523 }
 524
 525 static int i915_dispatch_flip(drm_device_t * dev)
 526 {
 527         drm_i915_private_t *dev_priv = dev->dev_private;
 528         RING_LOCALS;
 529
 530         DRM_DEBUG("%s: page=%d pfCurrentPage=%d\n",
 531                   __FUNCTION__,
 532                   dev_priv->current_page,
 533                   dev_priv->sarea_priv->pf_current_page);
 534
 535         i915_kernel_lost_context(dev);
 536
 537         BEGIN_LP_RING(2);
 538         OUT_RING(INST_PARSER_CLIENT | INST_OP_FLUSH | INST_FLUSH_MAP_CACHE);
 539         OUT_RING(0);
 540         ADVANCE_LP_RING();
 541
 542         BEGIN_LP_RING(6);
 543         OUT_RING(CMD_OP_DISPLAYBUFFER_INFO | ASYNC_FLIP);
 544         OUT_RING(0);
 545         if (dev_priv->current_page == 0) {
 546                 OUT_RING(dev_priv->back_offset);
 547                 dev_priv->current_page = 1;
 548         } else {
 549                 OUT_RING(dev_priv->front_offset);
 550                 dev_priv->current_page = 0;
 551         }
 552         OUT_RING(0);
 553         ADVANCE_LP_RING();
 554
 555         BEGIN_LP_RING(2);
 556         OUT_RING(MI_WAIT_FOR_EVENT | MI_WAIT_FOR_PLANE_A_FLIP);
 557         OUT_RING(0);
 558         ADVANCE_LP_RING();
 559
 560         dev_priv->sarea_priv->last_enqueue = dev_priv->counter++;
 561
 562         BEGIN_LP_RING(4);
 563         OUT_RING(CMD_STORE_DWORD_IDX);
 564         OUT_RING(20);
 565         OUT_RING(dev_priv->counter);
 566         OUT_RING(0);
 567         ADVANCE_LP_RING();
 568
 569         dev_priv->sarea_priv->pf_current_page = dev_priv->current_page;
 570         return 0;
 571 }
 572
 573 static int i915_quiescent(drm_device_t * dev)
 574 {
 575         drm_i915_private_t *dev_priv = dev->dev_private;
 576
 577         i915_kernel_lost_context(dev);
 578         return i915_wait_ring(dev, dev_priv->ring.Size - 8, __FUNCTION__);
 579 }
 580
 581 static int i915_flush_ioctl(DRM_IOCTL_ARGS)
 582 {
 583         DRM_DEVICE;
 584
 585         LOCK_TEST_WITH_RETURN(dev, filp);
 586
 587         return i915_quiescent(dev);
 588 }
 589
 590 static int i915_batchbuffer(DRM_IOCTL_ARGS)
 591 {
 592         DRM_DEVICE;
 593         drm_i915_private_t *dev_priv = (drm_i915_private_t *) dev->dev_private;
 594         u32 *hw_status = dev_priv->hw_status_page;
 595         drm_i915_sarea_t *sarea_priv = (drm_i915_sarea_t *)
 596             dev_priv->sarea_priv;
 597         drm_i915_batchbuffer_t batch;
 598         int ret;
 599
 600         if (!dev_priv->allow_batchbuffer) {
 601                 DRM_ERROR("Batchbuffer ioctl disabled\n");
 602                 return DRM_ERR(EINVAL);
 603         }
 604
 605         DRM_COPY_FROM_USER_IOCTL(batch, (drm_i915_batchbuffer_t __user *) data,
 606                                  sizeof(batch));
 607
 608         DRM_DEBUG("i915 batchbuffer, start %x used %d cliprects %d\n",
 609                   batch.start, batch.used, batch.num_cliprects);
 610
 611         LOCK_TEST_WITH_RETURN(dev, filp);
 612
 613         if (batch.num_cliprects && DRM_VERIFYAREA_READ(batch.cliprects,
 614                                                        batch.num_cliprects *
 615                                                        sizeof(drm_clip_rect_t)))
 616                 return DRM_ERR(EFAULT);
 617
 618         ret = i915_dispatch_batchbuffer(dev, &batch);
 619
 620         sarea_priv->last_dispatch = (int)hw_status[5];
 621         return ret;
 622 }
 623
 624 static int i915_cmdbuffer(DRM_IOCTL_ARGS)
 625 {
 626         DRM_DEVICE;
 627         drm_i915_private_t *dev_priv = (drm_i915_private_t *) dev->dev_private;
 628         u32 *hw_status = dev_priv->hw_status_page;
 629         drm_i915_sarea_t *sarea_priv = (drm_i915_sarea_t *)
 630             dev_priv->sarea_priv;
 631         drm_i915_cmdbuffer_t cmdbuf;
 632         int ret;
 633
 634         DRM_COPY_FROM_USER_IOCTL(cmdbuf, (drm_i915_cmdbuffer_t __user *) data,
 635                                  sizeof(cmdbuf));
 636
 637         DRM_DEBUG("i915 cmdbuffer, buf %p sz %d cliprects %d\n",
 638                   cmdbuf.buf, cmdbuf.sz, cmdbuf.num_cliprects);
 639
 640         LOCK_TEST_WITH_RETURN(dev, filp);
 641
 642         if (cmdbuf.num_cliprects &&
 643             DRM_VERIFYAREA_READ(cmdbuf.cliprects,
 644                                 cmdbuf.num_cliprects *
 645                                 sizeof(drm_clip_rect_t))) {
 646                 DRM_ERROR("Fault accessing cliprects\n");
 647                 return DRM_ERR(EFAULT);
 648         }
 649
 650         ret = i915_dispatch_cmdbuffer(dev, &cmdbuf);
 651         if (ret) {
 652                 DRM_ERROR("i915_dispatch_cmdbuffer failed\n");
 653                 return ret;
 654         }
 655
 656         sarea_priv->last_dispatch = (int)hw_status[5];
 657         return 0;
 658 }
 659
 660 static int i915_do_cleanup_pageflip(drm_device_t * dev)
 661 {
 662         drm_i915_private_t *dev_priv = dev->dev_private;
 663
 664         DRM_DEBUG("%s\n", __FUNCTION__);
 665         if (dev_priv->current_page != 0)
 666                 i915_dispatch_flip(dev);
 667
 668         return 0;
 669 }
 670
 671 static int i915_flip_bufs(DRM_IOCTL_ARGS)
 672 {
 673         DRM_DEVICE;
 674
 675         DRM_DEBUG("%s\n", __FUNCTION__);
 676
 677         LOCK_TEST_WITH_RETURN(dev, filp);
 678
 679         return i915_dispatch_flip(dev);
 680 }
 681
 682 static int i915_getparam(DRM_IOCTL_ARGS)
 683 {
 684         DRM_DEVICE;
 685         drm_i915_private_t *dev_priv = dev->dev_private;
 686         drm_i915_getparam_t param;
 687         int value;
 688
 689         if (!dev_priv) {
 690                 DRM_ERROR("%s called with no initialization\n", __FUNCTION__);
 691                 return DRM_ERR(EINVAL);
 692         }
 693
 694         DRM_COPY_FROM_USER_IOCTL(param, (drm_i915_getparam_t __user *) data,
 695                                  sizeof(param));
 696
 697         switch (param.param) {
 698         case I915_PARAM_IRQ_ACTIVE:
 699                 value = dev->irq ? 1 : 0;
 700                 break;
 701         case I915_PARAM_ALLOW_BATCHBUFFER:
 702                 value = dev_priv->allow_batchbuffer ? 1 : 0;
 703                 break;
 704         case I915_PARAM_LAST_DISPATCH:
 705                 value = READ_BREADCRUMB(dev_priv);
 706                 break;
 707         default:
 708                 DRM_ERROR("Unknown parameter %d\n", param.param);
 709                 return DRM_ERR(EINVAL);
 710         }
 711
 712         if (DRM_COPY_TO_USER(param.value, &value, sizeof(int))) {
 713                 DRM_ERROR("DRM_COPY_TO_USER failed\n");
 714                 return DRM_ERR(EFAULT);
 715         }
 716
 717         return 0;
 718 }
 719
 720 static int i915_setparam(DRM_IOCTL_ARGS)
 721 {
 722         DRM_DEVICE;
 723         drm_i915_private_t *dev_priv = dev->dev_private;
 724         drm_i915_setparam_t param;
 725
 726         if (!dev_priv) {
 727                 DRM_ERROR("%s called with no initialization\n", __FUNCTION__);
 728                 return DRM_ERR(EINVAL);
 729         }
 730
 731         DRM_COPY_FROM_USER_IOCTL(param, (drm_i915_setparam_t __user *) data,
 732                                  sizeof(param));
 733
 734         switch (param.param) {
 735         case I915_SETPARAM_USE_MI_BATCHBUFFER_START:
 736                 dev_priv->use_mi_batchbuffer_start = param.value;
 737                 break;
 738         case I915_SETPARAM_TEX_LRU_LOG_GRANULARITY:
 739                 dev_priv->tex_lru_log_granularity = param.value;
 740                 break;
 741         case I915_SETPARAM_ALLOW_BATCHBUFFER:
 742                 dev_priv->allow_batchbuffer = param.value;
 743                 break;
 744         default:
 745                 DRM_ERROR("unknown parameter %d\n", param.param);
 746                 return DRM_ERR(EINVAL);
 747         }
 748
 749         return 0;
 750 }
 751
 752 int i915_driver_load(drm_device_t *dev, unsigned long flags)
 753 {
 754         /* i915 has 4 more counters */
 755         dev->counters += 4;
 756         dev->types[6] = _DRM_STAT_IRQ;
 757         dev->types[7] = _DRM_STAT_PRIMARY;
 758         dev->types[8] = _DRM_STAT_SECONDARY;
 759         dev->types[9] = _DRM_STAT_DMA;
 760
 761         return 0;
 762 }
 763
 764 void i915_driver_lastclose(drm_device_t * dev)
 765 {
 766         if (dev->dev_private) {
 767                 drm_i915_private_t *dev_priv = dev->dev_private;
 768                 i915_mem_takedown(&(dev_priv->agp_heap));
 769         }
 770         i915_dma_cleanup(dev);
 771 }
 772
 773 void i915_driver_preclose(drm_device_t * dev, DRMFILE filp)
 774 {
 775         if (dev->dev_private) {
 776                 drm_i915_private_t *dev_priv = dev->dev_private;
 777                 if (dev_priv->page_flipping) {
 778                         i915_do_cleanup_pageflip(dev);
 779                 }
 780                 i915_mem_release(dev, filp, dev_priv->agp_heap);
 781         }
 782 }
 783
 784 drm_ioctl_desc_t i915_ioctls[] = {
 785         [DRM_IOCTL_NR(DRM_I915_INIT)] = {i915_dma_init, DRM_AUTH|DRM_MASTER|DRM_ROOT_ONLY},
 786         [DRM_IOCTL_NR(DRM_I915_FLUSH)] = {i915_flush_ioctl, DRM_AUTH},
 787         [DRM_IOCTL_NR(DRM_I915_FLIP)] = {i915_flip_bufs, DRM_AUTH},
 788         [DRM_IOCTL_NR(DRM_I915_BATCHBUFFER)] = {i915_batchbuffer, DRM_AUTH},
 789         [DRM_IOCTL_NR(DRM_I915_IRQ_EMIT)] = {i915_irq_emit, DRM_AUTH},
 790         [DRM_IOCTL_NR(DRM_I915_IRQ_WAIT)] = {i915_irq_wait, DRM_AUTH},
 791         [DRM_IOCTL_NR(DRM_I915_GETPARAM)] = {i915_getparam, DRM_AUTH},
 792         [DRM_IOCTL_NR(DRM_I915_SETPARAM)] = {i915_setparam, DRM_AUTH|DRM_MASTER|DRM_ROOT_ONLY},
 793         [DRM_IOCTL_NR(DRM_I915_ALLOC)] = {i915_mem_alloc, DRM_AUTH},
 794         [DRM_IOCTL_NR(DRM_I915_FREE)] = {i915_mem_free, DRM_AUTH},
 795         [DRM_IOCTL_NR(DRM_I915_INIT_HEAP)] = {i915_mem_init_heap, DRM_AUTH|DRM_MASTER|DRM_ROOT_ONLY},
 796         [DRM_IOCTL_NR(DRM_I915_CMDBUFFER)] = {i915_cmdbuffer, DRM_AUTH},
 797         [DRM_IOCTL_NR(DRM_I915_DESTROY_HEAP)] = { i915_mem_destroy_heap, DRM_AUTH|DRM_MASTER|DRM_ROOT_ONLY },
 798         [DRM_IOCTL_NR(DRM_I915_SET_VBLANK_PIPE)] = { i915_vblank_pipe_set, DRM_AUTH|DRM_MASTER|DRM_ROOT_ONLY },
 799         [DRM_IOCTL_NR(DRM_I915_GET_VBLANK_PIPE)] = { i915_vblank_pipe_get, DRM_AUTH },
 800 };
 801
 802 int i915_max_ioctl = DRM_ARRAY_SIZE(i915_ioctls);
 803
 804 /**
 805  * Determine if the device really is AGP or not.
 806  *
 807  * All Intel graphics chipsets are treated as AGP, even if they are really
 808  * PCI-e.
 809  *
 810  * \param dev   The device to be tested.
 811  *
 812  * \returns
 813  * A value of 1 is always retured to indictate every i9x5 is AGP.
 814  */
 815 int i915_driver_device_is_agp(drm_device_t * dev)
 816 {
 817         return 1;
 818 }