shared-core/i915_dma.c

   1 /* i915_dma.c -- DMA support for the I915 -*- linux-c -*-
   2  */
   3 /*
   4  * Copyright 2003 Tungsten Graphics, Inc., Cedar Park, Texas.
   5  * All Rights Reserved.
   6  *
   7  * Permission is hereby granted, free of charge, to any person obtaining a
   8  * copy of this software and associated documentation files (the
   9  * "Software"), to deal in the Software without restriction, including
  10  * without limitation the rights to use, copy, modify, merge, publish,
  11  * distribute, sub license, and/or sell copies of the Software, and to
  12  * permit persons to whom the Software is furnished to do so, subject to
  13  * the following conditions:
  14  *
  15  * The above copyright notice and this permission notice (including the
  16  * next paragraph) shall be included in all copies or substantial portions
  17  * of the Software.
  18  *
  19  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
  20  * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
  21  * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT.
  22  * IN NO EVENT SHALL TUNGSTEN GRAPHICS AND/OR ITS SUPPLIERS BE LIABLE FOR
  23  * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
  24  * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
  25  * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  26  *
  27  */
  28
  29 #include "drmP.h"
  30 #include "drm.h"
  31 #include "i915_drm.h"
  32 #include "i915_drv.h"
  33
  34 /* Really want an OS-independent resettable timer.  Would like to have
  35  * this loop run for (eg) 3 sec, but have the timer reset every time
  36  * the head pointer changes, so that EBUSY only happens if the ring
  37  * actually stalls for (eg) 3 seconds.
  38  */
  39 int i915_wait_ring(struct drm_device * dev, int n, const char *caller)
  40 {
  41         drm_i915_private_t *dev_priv = dev->dev_private;
  42         drm_i915_ring_buffer_t *ring = &(dev_priv->ring);
  43         u32 last_head = I915_READ(LP_RING + RING_HEAD) & HEAD_ADDR;
  44         int i;
  45
  46         for (i = 0; i < 10000; i++) {
  47                 ring->head = I915_READ(LP_RING + RING_HEAD) & HEAD_ADDR;
  48                 ring->space = ring->head - (ring->tail + 8);
  49                 if (ring->space < 0)
  50                         ring->space += ring->Size;
  51                 if (ring->space >= n)
  52                         return 0;
  53
  54                 dev_priv->sarea_priv->perf_boxes |= I915_BOX_WAIT;
  55
  56                 if (ring->head != last_head)
  57                         i = 0;
  58
  59                 last_head = ring->head;
  60                 DRM_UDELAY(1);
  61         }
  62
  63         return -EBUSY;
  64 }
  65
  66 void i915_kernel_lost_context(struct drm_device * dev)
  67 {
  68         drm_i915_private_t *dev_priv = dev->dev_private;
  69         drm_i915_ring_buffer_t *ring = &(dev_priv->ring);
  70
  71         ring->head = I915_READ(LP_RING + RING_HEAD) & HEAD_ADDR;
  72         ring->tail = I915_READ(LP_RING + RING_TAIL) & TAIL_ADDR;
  73         ring->space = ring->head - (ring->tail + 8);
  74         if (ring->space < 0)
  75                 ring->space += ring->Size;
  76
  77         if (ring->head == ring->tail)
  78                 dev_priv->sarea_priv->perf_boxes |= I915_BOX_RING_EMPTY;
  79 }
  80
  81 static int i915_dma_cleanup(struct drm_device * dev)
  82 {
  83         drm_i915_private_t *dev_priv = dev->dev_private;
  84         /* Make sure interrupts are disabled here because the uninstall ioctl
  85          * may not have been called from userspace and after dev_private
  86          * is freed, it's too late.
  87          */
  88         if (dev->irq)
  89                 drm_irq_uninstall(dev);
  90
  91         if (dev_priv->ring.virtual_start) {
  92                 drm_core_ioremapfree(&dev_priv->ring.map, dev);
  93                 dev_priv->ring.virtual_start = 0;
  94                 dev_priv->ring.map.handle = 0;
  95                 dev_priv->ring.map.size = 0;
  96         }
  97
  98         if (dev_priv->status_page_dmah) {
  99                 drm_pci_free(dev, dev_priv->status_page_dmah);
 100                 dev_priv->status_page_dmah = NULL;
 101                 /* Need to rewrite hardware status page */
 102                 I915_WRITE(0x02080, 0x1ffff000);
 103         }
 104
 105         if (dev_priv->status_gfx_addr) {
 106                 dev_priv->status_gfx_addr = 0;
 107                 drm_core_ioremapfree(&dev_priv->hws_map, dev);
 108                 I915_WRITE(0x02080, 0x1ffff000);
 109         }
 110
 111         return 0;
 112 }
 113
 114 static int i915_initialize(struct drm_device * dev, drm_i915_init_t * init)
 115 {
 116         drm_i915_private_t *dev_priv = dev->dev_private;
 117
 118         dev_priv->sarea = drm_getsarea(dev);
 119         if (!dev_priv->sarea) {
 120                 DRM_ERROR("can not find sarea!\n");
 121                 i915_dma_cleanup(dev);
 122                 return -EINVAL;
 123         }
 124
 125         dev_priv->mmio_map = drm_core_findmap(dev, init->mmio_offset);
 126         if (!dev_priv->mmio_map) {
 127                 i915_dma_cleanup(dev);
 128                 DRM_ERROR("can not find mmio map!\n");
 129                 return -EINVAL;
 130         }
 131
 132 #ifdef I915_HAVE_BUFFER
 133         dev_priv->max_validate_buffers = I915_MAX_VALIDATE_BUFFERS;
 134 #endif
 135
 136         dev_priv->sarea_priv = (drm_i915_sarea_t *)
 137             ((u8 *) dev_priv->sarea->handle + init->sarea_priv_offset);
 138
 139         dev_priv->ring.Start = init->ring_start;
 140         dev_priv->ring.End = init->ring_end;
 141         dev_priv->ring.Size = init->ring_size;
 142         dev_priv->ring.tail_mask = dev_priv->ring.Size - 1;
 143
 144         dev_priv->ring.map.offset = init->ring_start;
 145         dev_priv->ring.map.size = init->ring_size;
 146         dev_priv->ring.map.type = 0;
 147         dev_priv->ring.map.flags = 0;
 148         dev_priv->ring.map.mtrr = 0;
 149
 150         drm_core_ioremap(&dev_priv->ring.map, dev);
 151
 152         if (dev_priv->ring.map.handle == NULL) {
 153                 i915_dma_cleanup(dev);
 154                 DRM_ERROR("can not ioremap virtual address for"
 155                           " ring buffer\n");
 156                 return -ENOMEM;
 157         }
 158
 159         dev_priv->ring.virtual_start = dev_priv->ring.map.handle;
 160
 161         dev_priv->cpp = init->cpp;
 162         dev_priv->sarea_priv->pf_current_page = 0;
 163
 164         /* We are using separate values as placeholders for mechanisms for
 165          * private backbuffer/depthbuffer usage.
 166          */
 167         dev_priv->use_mi_batchbuffer_start = 0;
 168         if (IS_I965G(dev)) /* 965 doesn't support older method */
 169                 dev_priv->use_mi_batchbuffer_start = 1;
 170
 171         /* Allow hardware batchbuffers unless told otherwise.
 172          */
 173         dev_priv->allow_batchbuffer = 1;
 174
 175         /* Enable vblank on pipe A for older X servers
 176          */
 177         dev_priv->vblank_pipe = DRM_I915_VBLANK_PIPE_A;
 178
 179         /* Program Hardware Status Page */
 180         if (!IS_G33(dev)) {
 181                 dev_priv->status_page_dmah =
 182                         drm_pci_alloc(dev, PAGE_SIZE, PAGE_SIZE, 0xffffffff);
 183
 184                 if (!dev_priv->status_page_dmah) {
 185                         i915_dma_cleanup(dev);
 186                         DRM_ERROR("Can not allocate hardware status page\n");
 187                         return -ENOMEM;
 188                 }
 189                 dev_priv->hw_status_page = dev_priv->status_page_dmah->vaddr;
 190                 dev_priv->dma_status_page = dev_priv->status_page_dmah->busaddr;
 191
 192                 memset(dev_priv->hw_status_page, 0, PAGE_SIZE);
 193
 194                 I915_WRITE(0x02080, dev_priv->dma_status_page);
 195         }
 196         DRM_DEBUG("Enabled hardware status page\n");
 197 #ifdef I915_HAVE_BUFFER
 198         mutex_init(&dev_priv->cmdbuf_mutex);
 199 #endif
 200         return 0;
 201 }
 202
 203 static int i915_dma_resume(struct drm_device * dev)
 204 {
 205         drm_i915_private_t *dev_priv = (drm_i915_private_t *) dev->dev_private;
 206
 207         DRM_DEBUG("%s\n", __FUNCTION__);
 208
 209         if (!dev_priv->sarea) {
 210                 DRM_ERROR("can not find sarea!\n");
 211                 return -EINVAL;
 212         }
 213
 214         if (!dev_priv->mmio_map) {
 215                 DRM_ERROR("can not find mmio map!\n");
 216                 return -EINVAL;
 217         }
 218
 219         if (dev_priv->ring.map.handle == NULL) {
 220                 DRM_ERROR("can not ioremap virtual address for"
 221                           " ring buffer\n");
 222                 return -ENOMEM;
 223         }
 224
 225         /* Program Hardware Status Page */
 226         if (!dev_priv->hw_status_page) {
 227                 DRM_ERROR("Can not find hardware status page\n");
 228                 return -EINVAL;
 229         }
 230         DRM_DEBUG("hw status page @ %p\n", dev_priv->hw_status_page);
 231
 232         if (dev_priv->status_gfx_addr != 0)
 233                 I915_WRITE(0x02080, dev_priv->status_gfx_addr);
 234         else
 235                 I915_WRITE(0x02080, dev_priv->dma_status_page);
 236         DRM_DEBUG("Enabled hardware status page\n");
 237
 238         return 0;
 239 }
 240
 241 static int i915_dma_init(struct drm_device *dev, void *data,
 242                          struct drm_file *file_priv)
 243 {
 244         drm_i915_init_t *init = data;
 245         int retcode = 0;
 246
 247         switch (init->func) {
 248         case I915_INIT_DMA:
 249                 retcode = i915_initialize(dev, init);
 250                 break;
 251         case I915_CLEANUP_DMA:
 252                 retcode = i915_dma_cleanup(dev);
 253                 break;
 254         case I915_RESUME_DMA:
 255                 retcode = i915_dma_resume(dev);
 256                 break;
 257         default:
 258                 retcode = -EINVAL;
 259                 break;
 260         }
 261
 262         return retcode;
 263 }
 264
 265 /* Implement basically the same security restrictions as hardware does
 266  * for MI_BATCH_NON_SECURE.  These can be made stricter at any time.
 267  *
 268  * Most of the calculations below involve calculating the size of a
 269  * particular instruction.  It's important to get the size right as
 270  * that tells us where the next instruction to check is.  Any illegal
 271  * instruction detected will be given a size of zero, which is a
 272  * signal to abort the rest of the buffer.
 273  */
 274 static int do_validate_cmd(int cmd)
 275 {
 276         switch (((cmd >> 29) & 0x7)) {
 277         case 0x0:
 278                 switch ((cmd >> 23) & 0x3f) {
 279                 case 0x0:
 280                         return 1;       /* MI_NOOP */
 281                 case 0x4:
 282                         return 1;       /* MI_FLUSH */
 283                 default:
 284                         return 0;       /* disallow everything else */
 285                 }
 286                 break;
 287         case 0x1:
 288                 return 0;       /* reserved */
 289         case 0x2:
 290                 return (cmd & 0xff) + 2;        /* 2d commands */
 291         case 0x3:
 292                 if (((cmd >> 24) & 0x1f) <= 0x18)
 293                         return 1;
 294
 295                 switch ((cmd >> 24) & 0x1f) {
 296                 case 0x1c:
 297                         return 1;
 298                 case 0x1d:
 299                         switch ((cmd >> 16) & 0xff) {
 300                         case 0x3:
 301                                 return (cmd & 0x1f) + 2;
 302                         case 0x4:
 303                                 return (cmd & 0xf) + 2;
 304                         default:
 305                                 return (cmd & 0xffff) + 2;
 306                         }
 307                 case 0x1e:
 308                         if (cmd & (1 << 23))
 309                                 return (cmd & 0xffff) + 1;
 310                         else
 311                                 return 1;
 312                 case 0x1f:
 313                         if ((cmd & (1 << 23)) == 0)     /* inline vertices */
 314                                 return (cmd & 0x1ffff) + 2;
 315                         else if (cmd & (1 << 17))       /* indirect random */
 316                                 if ((cmd & 0xffff) == 0)
 317                                         return 0;       /* unknown length, too hard */
 318                                 else
 319                                         return (((cmd & 0xffff) + 1) / 2) + 1;
 320                         else
 321                                 return 2;       /* indirect sequential */
 322                 default:
 323                         return 0;
 324                 }
 325         default:
 326                 return 0;
 327         }
 328
 329         return 0;
 330 }
 331
 332 static int validate_cmd(int cmd)
 333 {
 334         int ret = do_validate_cmd(cmd);
 335
 336 /*      printk("validate_cmd( %x ): %d\n", cmd, ret); */
 337
 338         return ret;
 339 }
 340
 341 static int i915_emit_cmds(struct drm_device *dev, int __user *buffer,
 342                           int dwords)
 343 {
 344         drm_i915_private_t *dev_priv = dev->dev_private;
 345         int i;
 346         RING_LOCALS;
 347
 348         if ((dwords+1) * sizeof(int) >= dev_priv->ring.Size - 8)
 349                 return -EINVAL;
 350
 351         BEGIN_LP_RING((dwords+1)&~1);
 352
 353         for (i = 0; i < dwords;) {
 354                 int cmd, sz;
 355
 356                 if (DRM_COPY_FROM_USER_UNCHECKED(&cmd, &buffer[i], sizeof(cmd)))
 357                         return -EINVAL;
 358
 359                 if ((sz = validate_cmd(cmd)) == 0 || i + sz > dwords)
 360                         return -EINVAL;
 361
 362                 OUT_RING(cmd);
 363
 364                 while (++i, --sz) {
 365                         if (DRM_COPY_FROM_USER_UNCHECKED(&cmd, &buffer[i],
 366                                                          sizeof(cmd))) {
 367                                 return -EINVAL;
 368                         }
 369                         OUT_RING(cmd);
 370                 }
 371         }
 372
 373         if (dwords & 1)
 374                 OUT_RING(0);
 375
 376         ADVANCE_LP_RING();
 377
 378         return 0;
 379 }
 380
 381 static int i915_emit_box(struct drm_device * dev,
 382                          struct drm_clip_rect __user * boxes,
 383                          int i, int DR1, int DR4)
 384 {
 385         drm_i915_private_t *dev_priv = dev->dev_private;
 386         struct drm_clip_rect box;
 387         RING_LOCALS;
 388
 389         if (DRM_COPY_FROM_USER_UNCHECKED(&box, &boxes[i], sizeof(box))) {
 390                 return -EFAULT;
 391         }
 392
 393         if (box.y2 <= box.y1 || box.x2 <= box.x1 || box.y2 <= 0 || box.x2 <= 0) {
 394                 DRM_ERROR("Bad box %d,%d..%d,%d\n",
 395                           box.x1, box.y1, box.x2, box.y2);
 396                 return -EINVAL;
 397         }
 398
 399         if (IS_I965G(dev)) {
 400                 BEGIN_LP_RING(4);
 401                 OUT_RING(GFX_OP_DRAWRECT_INFO_I965);
 402                 OUT_RING((box.x1 & 0xffff) | (box.y1 << 16));
 403                 OUT_RING(((box.x2 - 1) & 0xffff) | ((box.y2 - 1) << 16));
 404                 OUT_RING(DR4);
 405                 ADVANCE_LP_RING();
 406         } else {
 407                 BEGIN_LP_RING(6);
 408                 OUT_RING(GFX_OP_DRAWRECT_INFO);
 409                 OUT_RING(DR1);
 410                 OUT_RING((box.x1 & 0xffff) | (box.y1 << 16));
 411                 OUT_RING(((box.x2 - 1) & 0xffff) | ((box.y2 - 1) << 16));
 412                 OUT_RING(DR4);
 413                 OUT_RING(0);
 414                 ADVANCE_LP_RING();
 415         }
 416
 417         return 0;
 418 }
 419
 420 /* XXX: Emitting the counter should really be moved to part of the IRQ
 421  * emit. For now, do it in both places:
 422  */
 423
 424 void i915_emit_breadcrumb(struct drm_device *dev)
 425 {
 426         drm_i915_private_t *dev_priv = dev->dev_private;
 427         RING_LOCALS;
 428
 429         if (++dev_priv->counter > BREADCRUMB_MASK) {
 430                  dev_priv->counter = 1;
 431                  DRM_DEBUG("Breadcrumb counter wrapped around\n");
 432         }
 433
 434         dev_priv->sarea_priv->last_enqueue = dev_priv->counter;
 435
 436         BEGIN_LP_RING(4);
 437         OUT_RING(CMD_STORE_DWORD_IDX);
 438         OUT_RING(20);
 439         OUT_RING(dev_priv->counter);
 440         OUT_RING(0);
 441         ADVANCE_LP_RING();
 442 }
 443
 444
 445 int i915_emit_mi_flush(struct drm_device *dev, uint32_t flush)
 446 {
 447         drm_i915_private_t *dev_priv = dev->dev_private;
 448         uint32_t flush_cmd = CMD_MI_FLUSH;
 449         RING_LOCALS;
 450
 451         flush_cmd |= flush;
 452
 453         i915_kernel_lost_context(dev);
 454
 455         BEGIN_LP_RING(4);
 456         OUT_RING(flush_cmd);
 457         OUT_RING(0);
 458         OUT_RING(0);
 459         OUT_RING(0);
 460         ADVANCE_LP_RING();
 461
 462         return 0;
 463 }
 464
 465
 466 static int i915_dispatch_cmdbuffer(struct drm_device * dev,
 467                                    drm_i915_cmdbuffer_t * cmd)
 468 {
 469 #ifdef I915_HAVE_FENCE
 470         drm_i915_private_t *dev_priv = dev->dev_private;
 471 #endif
 472         int nbox = cmd->num_cliprects;
 473         int i = 0, count, ret;
 474
 475         if (cmd->sz & 0x3) {
 476                 DRM_ERROR("alignment\n");
 477                 return -EINVAL;
 478         }
 479
 480         i915_kernel_lost_context(dev);
 481
 482         count = nbox ? nbox : 1;
 483
 484         for (i = 0; i < count; i++) {
 485                 if (i < nbox) {
 486                         ret = i915_emit_box(dev, cmd->cliprects, i,
 487                                             cmd->DR1, cmd->DR4);
 488                         if (ret)
 489                                 return ret;
 490                 }
 491
 492                 ret = i915_emit_cmds(dev, (int __user *)cmd->buf, cmd->sz / 4);
 493                 if (ret)
 494                         return ret;
 495         }
 496
 497         i915_emit_breadcrumb(dev);
 498 #ifdef I915_HAVE_FENCE
 499         drm_fence_flush_old(dev, 0, dev_priv->counter);
 500 #endif
 501         return 0;
 502 }
 503
 504 static int i915_dispatch_batchbuffer(struct drm_device * dev,
 505                                      drm_i915_batchbuffer_t * batch)
 506 {
 507         drm_i915_private_t *dev_priv = dev->dev_private;
 508         struct drm_clip_rect __user *boxes = batch->cliprects;
 509         int nbox = batch->num_cliprects;
 510         int i = 0, count;
 511         RING_LOCALS;
 512
 513         if ((batch->start | batch->used) & 0x7) {
 514                 DRM_ERROR("alignment\n");
 515                 return -EINVAL;
 516         }
 517
 518         i915_kernel_lost_context(dev);
 519
 520         count = nbox ? nbox : 1;
 521
 522         for (i = 0; i < count; i++) {
 523                 if (i < nbox) {
 524                         int ret = i915_emit_box(dev, boxes, i,
 525                                                 batch->DR1, batch->DR4);
 526                         if (ret)
 527                                 return ret;
 528                 }
 529
 530                 if (dev_priv->use_mi_batchbuffer_start) {
 531                         BEGIN_LP_RING(2);
 532                         if (IS_I965G(dev)) {
 533                                 OUT_RING(MI_BATCH_BUFFER_START | (2 << 6) | MI_BATCH_NON_SECURE_I965);
 534                                 OUT_RING(batch->start);
 535                         } else {
 536                                 OUT_RING(MI_BATCH_BUFFER_START | (2 << 6));
 537                                 OUT_RING(batch->start | MI_BATCH_NON_SECURE);
 538                         }
 539                         ADVANCE_LP_RING();
 540
 541                 } else {
 542                         BEGIN_LP_RING(4);
 543                         OUT_RING(MI_BATCH_BUFFER);
 544                         OUT_RING(batch->start | MI_BATCH_NON_SECURE);
 545                         OUT_RING(batch->start + batch->used - 4);
 546                         OUT_RING(0);
 547                         ADVANCE_LP_RING();
 548                 }
 549         }
 550
 551         i915_emit_breadcrumb(dev);
 552 #ifdef I915_HAVE_FENCE
 553         drm_fence_flush_old(dev, 0, dev_priv->counter);
 554 #endif
 555         return 0;
 556 }
 557
 558 static void i915_do_dispatch_flip(struct drm_device * dev, int plane, int sync)
 559 {
 560         drm_i915_private_t *dev_priv = dev->dev_private;
 561         u32 num_pages, current_page, next_page, dspbase;
 562         int shift = 2 * plane, x, y;
 563         RING_LOCALS;
 564
 565         /* Calculate display base offset */
 566         num_pages = dev_priv->sarea_priv->third_handle ? 3 : 2;
 567         current_page = (dev_priv->sarea_priv->pf_current_page >> shift) & 0x3;
 568         next_page = (current_page + 1) % num_pages;
 569
 570         switch (next_page) {
 571         default:
 572         case 0:
 573                 dspbase = dev_priv->sarea_priv->front_offset;
 574                 break;
 575         case 1:
 576                 dspbase = dev_priv->sarea_priv->back_offset;
 577                 break;
 578         case 2:
 579                 dspbase = dev_priv->sarea_priv->third_offset;
 580                 break;
 581         }
 582
 583         if (plane == 0) {
 584                 x = dev_priv->sarea_priv->planeA_x;
 585                 y = dev_priv->sarea_priv->planeA_y;
 586         } else {
 587                 x = dev_priv->sarea_priv->planeB_x;
 588                 y = dev_priv->sarea_priv->planeB_y;
 589         }
 590
 591         dspbase += (y * dev_priv->sarea_priv->pitch + x) * dev_priv->cpp;
 592
 593         DRM_DEBUG("plane=%d current_page=%d dspbase=0x%x\n", plane, current_page,
 594                   dspbase);
 595
 596         BEGIN_LP_RING(4);
 597         OUT_RING(sync ? 0 :
 598                  (MI_WAIT_FOR_EVENT | (plane ? MI_WAIT_FOR_PLANE_B_FLIP :
 599                                        MI_WAIT_FOR_PLANE_A_FLIP)));
 600         OUT_RING(CMD_OP_DISPLAYBUFFER_INFO | (sync ? 0 : ASYNC_FLIP) |
 601                  (plane ? DISPLAY_PLANE_B : DISPLAY_PLANE_A));
 602         OUT_RING(dev_priv->sarea_priv->pitch * dev_priv->cpp);
 603         OUT_RING(dspbase);
 604         ADVANCE_LP_RING();
 605
 606         dev_priv->sarea_priv->pf_current_page &= ~(0x3 << shift);
 607         dev_priv->sarea_priv->pf_current_page |= next_page << shift;
 608 }
 609
 610 void i915_dispatch_flip(struct drm_device * dev, int planes, int sync)
 611 {
 612         drm_i915_private_t *dev_priv = dev->dev_private;
 613         int i;
 614
 615         DRM_DEBUG("%s: planes=0x%x pfCurrentPage=%d\n",
 616                   __FUNCTION__,
 617                   planes, dev_priv->sarea_priv->pf_current_page);
 618
 619         i915_emit_mi_flush(dev, MI_READ_FLUSH | MI_EXE_FLUSH);
 620
 621         for (i = 0; i < 2; i++)
 622                 if (planes & (1 << i))
 623                         i915_do_dispatch_flip(dev, i, sync);
 624
 625         i915_emit_breadcrumb(dev);
 626 #ifdef I915_HAVE_FENCE
 627         if (!sync)
 628                 drm_fence_flush_old(dev, 0, dev_priv->counter);
 629 #endif
 630 }
 631
 632 static int i915_quiescent(struct drm_device *dev)
 633 {
 634         drm_i915_private_t *dev_priv = dev->dev_private;
 635
 636         i915_kernel_lost_context(dev);
 637         return i915_wait_ring(dev, dev_priv->ring.Size - 8, __FUNCTION__);
 638 }
 639
 640 static int i915_flush_ioctl(struct drm_device *dev, void *data,
 641                             struct drm_file *file_priv)
 642 {
 643
 644         LOCK_TEST_WITH_RETURN(dev, file_priv);
 645
 646         return i915_quiescent(dev);
 647 }
 648
 649 static int i915_batchbuffer(struct drm_device *dev, void *data,
 650                             struct drm_file *file_priv)
 651 {
 652         drm_i915_private_t *dev_priv = (drm_i915_private_t *) dev->dev_private;
 653         drm_i915_sarea_t *sarea_priv = (drm_i915_sarea_t *)
 654             dev_priv->sarea_priv;
 655         drm_i915_batchbuffer_t *batch = data;
 656         int ret;
 657
 658         if (!dev_priv->allow_batchbuffer) {
 659                 DRM_ERROR("Batchbuffer ioctl disabled\n");
 660                 return -EINVAL;
 661         }
 662
 663         DRM_DEBUG("i915 batchbuffer, start %x used %d cliprects %d\n",
 664                   batch->start, batch->used, batch->num_cliprects);
 665
 666         LOCK_TEST_WITH_RETURN(dev, file_priv);
 667
 668         if (batch->num_cliprects && DRM_VERIFYAREA_READ(batch->cliprects,
 669                                                         batch->num_cliprects *
 670                                                         sizeof(struct drm_clip_rect)))
 671                 return -EFAULT;
 672
 673         ret = i915_dispatch_batchbuffer(dev, batch);
 674
 675         sarea_priv->last_dispatch = READ_BREADCRUMB(dev_priv);
 676         return ret;
 677 }
 678
 679 static int i915_cmdbuffer(struct drm_device *dev, void *data,
 680                           struct drm_file *file_priv)
 681 {
 682         drm_i915_private_t *dev_priv = (drm_i915_private_t *) dev->dev_private;
 683         drm_i915_sarea_t *sarea_priv = (drm_i915_sarea_t *)
 684             dev_priv->sarea_priv;
 685         drm_i915_cmdbuffer_t *cmdbuf = data;
 686         int ret;
 687
 688         DRM_DEBUG("i915 cmdbuffer, buf %p sz %d cliprects %d\n",
 689                   cmdbuf->buf, cmdbuf->sz, cmdbuf->num_cliprects);
 690
 691         LOCK_TEST_WITH_RETURN(dev, file_priv);
 692
 693         if (cmdbuf->num_cliprects &&
 694             DRM_VERIFYAREA_READ(cmdbuf->cliprects,
 695                                 cmdbuf->num_cliprects *
 696                                 sizeof(struct drm_clip_rect))) {
 697                 DRM_ERROR("Fault accessing cliprects\n");
 698                 return -EFAULT;
 699         }
 700
 701         ret = i915_dispatch_cmdbuffer(dev, cmdbuf);
 702         if (ret) {
 703                 DRM_ERROR("i915_dispatch_cmdbuffer failed\n");
 704                 return ret;
 705         }
 706
 707         sarea_priv->last_dispatch = READ_BREADCRUMB(dev_priv);
 708         return 0;
 709 }
 710
 711 #ifdef I915_HAVE_BUFFER
 712 struct i915_relocatee_info {
 713         struct drm_buffer_object *buf;
 714         unsigned long offset;
 715         u32 *data_page;
 716         unsigned page_offset;
 717         struct drm_bo_kmap_obj kmap;
 718         int is_iomem;
 719 };
 720
 721 static void i915_dereference_buffers_locked(struct drm_buffer_object **buffers,
 722                                             unsigned num_buffers)
 723 {
 724         while (num_buffers--)
 725                 drm_bo_usage_deref_locked(&buffers[num_buffers]);
 726 }
 727
 728 int i915_apply_reloc(struct drm_file *file_priv, int num_buffers,
 729                      struct drm_buffer_object **buffers,
 730                      struct i915_relocatee_info *relocatee,
 731                      uint32_t *reloc)
 732 {
 733         unsigned index;
 734         unsigned long new_cmd_offset;
 735         u32 val;
 736         int ret;
 737
 738         if (reloc[2] >= num_buffers) {
 739                 DRM_ERROR("Illegal relocation buffer %08X\n", reloc[2]);
 740                 return -EINVAL;
 741         }
 742
 743         new_cmd_offset = reloc[0];
 744         if (!relocatee->data_page ||
 745             !drm_bo_same_page(relocatee->offset, new_cmd_offset)) {
 746                 drm_bo_kunmap(&relocatee->kmap);
 747                 relocatee->offset = new_cmd_offset;
 748                 ret = drm_bo_kmap(relocatee->buf, new_cmd_offset >> PAGE_SHIFT,
 749                                   1, &relocatee->kmap);
 750                 if (ret) {
 751                         DRM_ERROR("Could not map command buffer to apply relocs\n %08lx", new_cmd_offset);
 752                         return ret;
 753                 }
 754
 755                 relocatee->data_page = drm_bmo_virtual(&relocatee->kmap,
 756                                                        &relocatee->is_iomem);
 757                 relocatee->page_offset = (relocatee->offset & PAGE_MASK);
 758         }
 759
 760         val = buffers[reloc[2]]->offset;
 761         index = (reloc[0] - relocatee->page_offset) >> 2;
 762
 763         /* add in validate */
 764         val = val + reloc[1];
 765
 766         relocatee->data_page[index] = val;
 767         return 0;
 768 }
 769
 770 int i915_process_relocs(struct drm_file *file_priv,
 771                         uint32_t buf_handle,
 772                         uint32_t *reloc_buf_handle,
 773                         struct i915_relocatee_info *relocatee,
 774                         struct drm_buffer_object **buffers,
 775                         uint32_t num_buffers)
 776 {
 777         struct drm_device *dev = file_priv->head->dev;
 778         struct drm_buffer_object *reloc_list_object;
 779         uint32_t cur_handle = *reloc_buf_handle;
 780         uint32_t *reloc_page;
 781         int ret, reloc_is_iomem, reloc_stride;
 782         uint32_t num_relocs, reloc_offset, reloc_end, reloc_page_offset, next_offset, cur_offset;
 783         struct drm_bo_kmap_obj reloc_kmap;
 784
 785         memset(&reloc_kmap, 0, sizeof(reloc_kmap));
 786
 787         mutex_lock(&dev->struct_mutex);
 788         reloc_list_object = drm_lookup_buffer_object(file_priv, cur_handle, 1);
 789         mutex_unlock(&dev->struct_mutex);
 790         if (!reloc_list_object)
 791                 return -EINVAL;
 792
 793         ret = drm_bo_kmap(reloc_list_object, 0, 1, &reloc_kmap);
 794         if (ret) {
 795                 DRM_ERROR("Could not map relocation buffer.\n");
 796                 goto out;
 797         }
 798
 799         reloc_page = drm_bmo_virtual(&reloc_kmap, &reloc_is_iomem);
 800         num_relocs = reloc_page[0] & 0xffff;
 801
 802         if ((reloc_page[0] >> 16) & 0xffff) {
 803                 DRM_ERROR("Unsupported relocation type requested\n");
 804                 goto out;
 805         }
 806
 807         /* get next relocate buffer handle */
 808         *reloc_buf_handle = reloc_page[1];
 809         reloc_stride = I915_RELOC0_STRIDE * sizeof(uint32_t); /* may be different for other types of relocs */
 810
 811         DRM_DEBUG("num relocs is %d, next is %08X\n", num_relocs, reloc_page[1]);
 812
 813         reloc_page_offset = 0;
 814         reloc_offset = I915_RELOC_HEADER * sizeof(uint32_t);
 815         reloc_end = reloc_offset + (num_relocs * reloc_stride);
 816
 817         do {
 818                 next_offset = drm_bo_offset_end(reloc_offset, reloc_end);
 819
 820                 do {
 821                         cur_offset = ((reloc_offset + reloc_page_offset) & ~PAGE_MASK) / sizeof(uint32_t);
 822                         ret = i915_apply_reloc(file_priv, num_buffers,
 823                                          buffers, relocatee, &reloc_page[cur_offset]);
 824                         if (ret)
 825                                 goto out;
 826
 827                         reloc_offset += reloc_stride;
 828                 } while (reloc_offset < next_offset);
 829
 830                 drm_bo_kunmap(&reloc_kmap);
 831
 832                 reloc_offset = next_offset;
 833                 if (reloc_offset != reloc_end) {
 834                         ret = drm_bo_kmap(reloc_list_object, reloc_offset >> PAGE_SHIFT, 1, &reloc_kmap);
 835                         if (ret) {
 836                                 DRM_ERROR("Could not map relocation buffer.\n");
 837                                 goto out;
 838                         }
 839
 840                         reloc_page = drm_bmo_virtual(&reloc_kmap, &reloc_is_iomem);
 841                         reloc_page_offset = reloc_offset & ~PAGE_MASK;
 842                 }
 843
 844         } while (reloc_offset != reloc_end);
 845 out:
 846         drm_bo_kunmap(&relocatee->kmap);
 847         relocatee->data_page = NULL;
 848
 849         drm_bo_kunmap(&reloc_kmap);
 850
 851         mutex_lock(&dev->struct_mutex);
 852         drm_bo_usage_deref_locked(&reloc_list_object);
 853         mutex_unlock(&dev->struct_mutex);
 854
 855         return ret;
 856 }
 857
 858 static int i915_exec_reloc(struct drm_file *file_priv, drm_handle_t buf_handle,
 859                            drm_handle_t buf_reloc_handle,
 860                            struct drm_buffer_object **buffers,
 861                            uint32_t buf_count)
 862 {
 863         struct drm_device *dev = file_priv->head->dev;
 864         struct i915_relocatee_info relocatee;
 865         int ret = 0;
 866
 867         memset(&relocatee, 0, sizeof(relocatee));
 868
 869         mutex_lock(&dev->struct_mutex);
 870         relocatee.buf = drm_lookup_buffer_object(file_priv, buf_handle, 1);
 871         mutex_unlock(&dev->struct_mutex);
 872         if (!relocatee.buf) {
 873                 DRM_DEBUG("relocatee buffer invalid %08x\n", buf_handle);
 874                 ret = -EINVAL;
 875                 goto out_err;
 876         }
 877
 878         while (buf_reloc_handle) {
 879                 ret = i915_process_relocs(file_priv, buf_handle, &buf_reloc_handle, &relocatee, buffers, buf_count);
 880                 if (ret) {
 881                         DRM_ERROR("process relocs failed\n");
 882                         break;
 883                 }
 884         }
 885
 886         mutex_lock(&dev->struct_mutex);
 887         drm_bo_usage_deref_locked(&relocatee.buf);
 888         mutex_unlock(&dev->struct_mutex);
 889
 890 out_err:
 891         return ret;
 892 }
 893
 894 /*
 895  * Validate, add fence and relocate a block of bos from a userspace list
 896  */
 897 int i915_validate_buffer_list(struct drm_file *file_priv,
 898                               unsigned int fence_class, uint64_t data,
 899                               struct drm_buffer_object **buffers,
 900                               uint32_t *num_buffers)
 901 {
 902         struct drm_i915_op_arg arg;
 903         struct drm_bo_op_req *req = &arg.d.req;
 904         struct drm_bo_arg_rep rep;
 905         unsigned long next = 0;
 906         int ret = 0;
 907         unsigned buf_count = 0;
 908         struct drm_device *dev = file_priv->head->dev;
 909         uint32_t buf_reloc_handle, buf_handle;
 910
 911
 912         do {
 913                 if (buf_count >= *num_buffers) {
 914                         DRM_ERROR("Buffer count exceeded %d\n.", *num_buffers);
 915                         ret = -EINVAL;
 916                         goto out_err;
 917                 }
 918
 919                 buffers[buf_count] = NULL;
 920
 921                 if (copy_from_user(&arg, (void __user *)(unsigned)data, sizeof(arg))) {
 922                         ret = -EFAULT;
 923                         goto out_err;
 924                 }
 925
 926                 if (arg.handled) {
 927                         data = arg.next;
 928                         mutex_lock(&dev->struct_mutex);
 929                         buffers[buf_count] = drm_lookup_buffer_object(file_priv, req->arg_handle, 1);
 930                         mutex_unlock(&dev->struct_mutex);
 931                         buf_count++;
 932                         continue;
 933                 }
 934
 935                 rep.ret = 0;
 936                 if (req->op != drm_bo_validate) {
 937                         DRM_ERROR
 938                             ("Buffer object operation wasn't \"validate\".\n");
 939                         rep.ret = -EINVAL;
 940                         goto out_err;
 941                 }
 942
 943                 buf_handle = req->bo_req.handle;
 944                 buf_reloc_handle = arg.reloc_handle;
 945
 946                 if (buf_reloc_handle) {
 947                         ret = i915_exec_reloc(file_priv, buf_handle, buf_reloc_handle, buffers, buf_count);
 948                         if (ret)
 949                                 goto out_err;
 950                         DRM_MEMORYBARRIER();
 951                 }
 952
 953                 rep.ret = drm_bo_handle_validate(file_priv, req->bo_req.handle,
 954                                                  req->bo_req.fence_class,
 955                                                  req->bo_req.flags,
 956                                                  req->bo_req.mask,
 957                                                  req->bo_req.hint,
 958                                                  0,
 959                                                  &rep.bo_info,
 960                                                  &buffers[buf_count]);
 961
 962                 if (rep.ret) {
 963                         DRM_ERROR("error on handle validate %d\n", rep.ret);
 964                         goto out_err;
 965                 }
 966
 967
 968                 next = arg.next;
 969                 arg.handled = 1;
 970                 arg.d.rep = rep;
 971
 972                 if (copy_to_user((void __user *)(unsigned)data, &arg, sizeof(arg)))
 973                         return -EFAULT;
 974
 975                 data = next;
 976                 buf_count++;
 977
 978         } while (next != 0);
 979         *num_buffers = buf_count;
 980         return 0;
 981 out_err:
 982         mutex_lock(&dev->struct_mutex);
 983         i915_dereference_buffers_locked(buffers, buf_count);
 984         mutex_unlock(&dev->struct_mutex);
 985         *num_buffers = 0;
 986         return (ret) ? ret : rep.ret;
 987 }
 988
 989 static int i915_execbuffer(struct drm_device *dev, void *data,
 990                            struct drm_file *file_priv)
 991 {
 992         drm_i915_private_t *dev_priv = (drm_i915_private_t *) dev->dev_private;
 993         drm_i915_sarea_t *sarea_priv = (drm_i915_sarea_t *)
 994                 dev_priv->sarea_priv;
 995         struct drm_i915_execbuffer *exec_buf = data;
 996         struct _drm_i915_batchbuffer *batch = &exec_buf->batch;
 997         struct drm_fence_arg *fence_arg = &exec_buf->fence_arg;
 998         int num_buffers;
 999         int ret;
1000         struct drm_buffer_object **buffers;
1001         struct drm_fence_object *fence;
1002
1003         if (!dev_priv->allow_batchbuffer) {
1004                 DRM_ERROR("Batchbuffer ioctl disabled\n");
1005                 return -EINVAL;
1006         }
1007
1008
1009         if (batch->num_cliprects && DRM_VERIFYAREA_READ(batch->cliprects,
1010                                                         batch->num_cliprects *
1011                                                         sizeof(struct drm_clip_rect)))
1012                 return -EFAULT;
1013
1014         if (exec_buf->num_buffers > dev_priv->max_validate_buffers)
1015                 return -EINVAL;
1016
1017
1018         ret = drm_bo_read_lock(&dev->bm.bm_lock);
1019         if (ret)
1020                 return ret;
1021
1022         /*
1023          * The cmdbuf_mutex makes sure the validate-submit-fence
1024          * operation is atomic.
1025          */
1026
1027         ret = mutex_lock_interruptible(&dev_priv->cmdbuf_mutex);
1028         if (ret) {
1029                 drm_bo_read_unlock(&dev->bm.bm_lock);
1030                 return -EAGAIN;
1031         }
1032
1033         num_buffers = exec_buf->num_buffers;
1034
1035         buffers = drm_calloc(num_buffers, sizeof(struct drm_buffer_object *), DRM_MEM_DRIVER);
1036         if (!buffers) {
1037                 drm_bo_read_unlock(&dev->bm.bm_lock);
1038                 mutex_unlock(&dev_priv->cmdbuf_mutex);
1039                 return -ENOMEM;
1040         }
1041
1042         /* validate buffer list + fixup relocations */
1043         ret = i915_validate_buffer_list(file_priv, 0, exec_buf->ops_list,
1044                                         buffers, &num_buffers);
1045         if (ret)
1046                 goto out_free;
1047
1048         /* make sure all previous memory operations have passed */
1049         DRM_MEMORYBARRIER();
1050         drm_agp_chipset_flush(dev);
1051
1052         /* submit buffer */
1053         batch->start = buffers[num_buffers-1]->offset;
1054
1055         DRM_DEBUG("i915 exec batchbuffer, start %x used %d cliprects %d\n",
1056                   batch->start, batch->used, batch->num_cliprects);
1057
1058         ret = i915_dispatch_batchbuffer(dev, batch);
1059         if (ret)
1060                 goto out_err0;
1061
1062         sarea_priv->last_dispatch = READ_BREADCRUMB(dev_priv);
1063
1064         /* fence */
1065         ret = drm_fence_buffer_objects(dev, NULL, 0, NULL, &fence);
1066         if (ret)
1067                 goto out_err0;
1068
1069         if (!(fence_arg->flags & DRM_FENCE_FLAG_NO_USER)) {
1070                 ret = drm_fence_add_user_object(file_priv, fence, fence_arg->flags & DRM_FENCE_FLAG_SHAREABLE);
1071                 if (!ret) {
1072                         fence_arg->handle = fence->base.hash.key;
1073                         fence_arg->fence_class = fence->fence_class;
1074                         fence_arg->type = fence->type;
1075                         fence_arg->signaled = fence->signaled;
1076                 }
1077         }
1078         drm_fence_usage_deref_unlocked(&fence);
1079 out_err0:
1080
1081         /* handle errors */
1082         mutex_lock(&dev->struct_mutex);
1083         i915_dereference_buffers_locked(buffers, num_buffers);
1084         mutex_unlock(&dev->struct_mutex);
1085
1086 out_free:
1087         drm_free(buffers, (exec_buf->num_buffers * sizeof(struct drm_buffer_object *)), DRM_MEM_DRIVER);
1088
1089         mutex_unlock(&dev_priv->cmdbuf_mutex);
1090         drm_bo_read_unlock(&dev->bm.bm_lock);
1091         return ret;
1092 }
1093 #endif
1094
1095 static int i915_do_cleanup_pageflip(struct drm_device * dev)
1096 {
1097         drm_i915_private_t *dev_priv = dev->dev_private;
1098         int i, planes, num_pages = dev_priv->sarea_priv->third_handle ? 3 : 2;
1099
1100         DRM_DEBUG("%s\n", __FUNCTION__);
1101
1102         for (i = 0, planes = 0; i < 2; i++)
1103                 if (dev_priv->sarea_priv->pf_current_page & (0x3 << (2 * i))) {
1104                         dev_priv->sarea_priv->pf_current_page =
1105                                 (dev_priv->sarea_priv->pf_current_page &
1106                                  ~(0x3 << (2 * i))) | (num_pages - 1) << (2 * i);
1107
1108                         planes |= 1 << i;
1109                 }
1110
1111         if (planes)
1112                 i915_dispatch_flip(dev, planes, 0);
1113
1114         return 0;
1115 }
1116
1117 static int i915_flip_bufs(struct drm_device *dev, void *data, struct drm_file *file_priv)
1118 {
1119         drm_i915_flip_t *param = data;
1120
1121         DRM_DEBUG("%s\n", __FUNCTION__);
1122
1123         LOCK_TEST_WITH_RETURN(dev, file_priv);
1124
1125         /* This is really planes */
1126         if (param->pipes & ~0x3) {
1127                 DRM_ERROR("Invalid planes 0x%x, only <= 0x3 is valid\n",
1128                           param->pipes);
1129                 return -EINVAL;
1130         }
1131
1132         i915_dispatch_flip(dev, param->pipes, 0);
1133
1134         return 0;
1135 }
1136
1137
1138 static int i915_getparam(struct drm_device *dev, void *data,
1139                          struct drm_file *file_priv)
1140 {
1141         drm_i915_private_t *dev_priv = dev->dev_private;
1142         drm_i915_getparam_t *param = data;
1143         int value;
1144
1145         if (!dev_priv) {
1146                 DRM_ERROR("%s called with no initialization\n", __FUNCTION__);
1147                 return -EINVAL;
1148         }
1149
1150         switch (param->param) {
1151         case I915_PARAM_IRQ_ACTIVE:
1152                 value = dev->irq ? 1 : 0;
1153                 break;
1154         case I915_PARAM_ALLOW_BATCHBUFFER:
1155                 value = dev_priv->allow_batchbuffer ? 1 : 0;
1156                 break;
1157         case I915_PARAM_LAST_DISPATCH:
1158                 value = READ_BREADCRUMB(dev_priv);
1159                 break;
1160         default:
1161                 DRM_ERROR("Unknown parameter %d\n", param->param);
1162                 return -EINVAL;
1163         }
1164
1165         if (DRM_COPY_TO_USER(param->value, &value, sizeof(int))) {
1166                 DRM_ERROR("DRM_COPY_TO_USER failed\n");
1167                 return -EFAULT;
1168         }
1169
1170         return 0;
1171 }
1172
1173 static int i915_setparam(struct drm_device *dev, void *data,
1174                          struct drm_file *file_priv)
1175 {
1176         drm_i915_private_t *dev_priv = dev->dev_private;
1177         drm_i915_setparam_t *param = data;
1178
1179         if (!dev_priv) {
1180                 DRM_ERROR("%s called with no initialization\n", __FUNCTION__);
1181                 return -EINVAL;
1182         }
1183
1184         switch (param->param) {
1185         case I915_SETPARAM_USE_MI_BATCHBUFFER_START:
1186                 if (!IS_I965G(dev))
1187                         dev_priv->use_mi_batchbuffer_start = param->value;
1188                 break;
1189         case I915_SETPARAM_TEX_LRU_LOG_GRANULARITY:
1190                 dev_priv->tex_lru_log_granularity = param->value;
1191                 break;
1192         case I915_SETPARAM_ALLOW_BATCHBUFFER:
1193                 dev_priv->allow_batchbuffer = param->value;
1194                 break;
1195         default:
1196                 DRM_ERROR("unknown parameter %d\n", param->param);
1197                 return -EINVAL;
1198         }
1199
1200         return 0;
1201 }
1202
1203 drm_i915_mmio_entry_t mmio_table[] = {
1204         [MMIO_REGS_PS_DEPTH_COUNT] = {
1205                 I915_MMIO_MAY_READ|I915_MMIO_MAY_WRITE,
1206                 0x2350,
1207                 8
1208         }
1209 };
1210
1211 static int mmio_table_size = sizeof(mmio_table)/sizeof(drm_i915_mmio_entry_t);
1212
1213 static int i915_mmio(struct drm_device *dev, void *data,
1214                      struct drm_file *file_priv)
1215 {
1216         uint32_t buf[8];
1217         drm_i915_private_t *dev_priv = dev->dev_private;
1218         drm_i915_mmio_entry_t *e;
1219         drm_i915_mmio_t *mmio = data;
1220         void __iomem *base;
1221         int i;
1222
1223         if (!dev_priv) {
1224                 DRM_ERROR("%s called with no initialization\n", __FUNCTION__);
1225                 return -EINVAL;
1226         }
1227
1228         if (mmio->reg >= mmio_table_size)
1229                 return -EINVAL;
1230
1231         e = &mmio_table[mmio->reg];
1232         base = (u8 *) dev_priv->mmio_map->handle + e->offset;
1233
1234         switch (mmio->read_write) {
1235         case I915_MMIO_READ:
1236                 if (!(e->flag & I915_MMIO_MAY_READ))
1237                         return -EINVAL;
1238                 for (i = 0; i < e->size / 4; i++)
1239                         buf[i] = I915_READ(e->offset + i * 4);
1240                 if (DRM_COPY_TO_USER(mmio->data, buf, e->size)) {
1241                         DRM_ERROR("DRM_COPY_TO_USER failed\n");
1242                         return -EFAULT;
1243                 }
1244                 break;
1245
1246         case I915_MMIO_WRITE:
1247                 if (!(e->flag & I915_MMIO_MAY_WRITE))
1248                         return -EINVAL;
1249                 if (DRM_COPY_FROM_USER(buf, mmio->data, e->size)) {
1250                         DRM_ERROR("DRM_COPY_TO_USER failed\n");
1251                         return -EFAULT;
1252                 }
1253                 for (i = 0; i < e->size / 4; i++)
1254                         I915_WRITE(e->offset + i * 4, buf[i]);
1255                 break;
1256         }
1257         return 0;
1258 }
1259
1260 static int i915_set_status_page(struct drm_device *dev, void *data,
1261                                 struct drm_file *file_priv)
1262 {
1263         drm_i915_private_t *dev_priv = dev->dev_private;
1264         drm_i915_hws_addr_t *hws = data;
1265
1266         if (!dev_priv) {
1267                 DRM_ERROR("%s called with no initialization\n", __FUNCTION__);
1268                 return -EINVAL;
1269         }
1270         DRM_DEBUG("set status page addr 0x%08x\n", (u32)hws->addr);
1271
1272         dev_priv->status_gfx_addr = hws->addr & (0x1ffff<<12);
1273
1274         dev_priv->hws_map.offset = dev->agp->base + hws->addr;
1275         dev_priv->hws_map.size = 4*1024;
1276         dev_priv->hws_map.type = 0;
1277         dev_priv->hws_map.flags = 0;
1278         dev_priv->hws_map.mtrr = 0;
1279
1280         drm_core_ioremap(&dev_priv->hws_map, dev);
1281         if (dev_priv->hws_map.handle == NULL) {
1282                 i915_dma_cleanup(dev);
1283                 dev_priv->status_gfx_addr = 0;
1284                 DRM_ERROR("can not ioremap virtual address for"
1285                                 " G33 hw status page\n");
1286                 return -ENOMEM;
1287         }
1288         dev_priv->hw_status_page = dev_priv->hws_map.handle;
1289
1290         memset(dev_priv->hw_status_page, 0, PAGE_SIZE);
1291         I915_WRITE(0x02080, dev_priv->status_gfx_addr);
1292         DRM_DEBUG("load hws 0x2080 with gfx mem 0x%x\n",
1293                         dev_priv->status_gfx_addr);
1294         DRM_DEBUG("load hws at %p\n", dev_priv->hw_status_page);
1295         return 0;
1296 }
1297
1298 int i915_driver_load(struct drm_device *dev, unsigned long flags)
1299 {
1300         struct drm_i915_private *dev_priv = dev->dev_private;
1301         unsigned long base, size;
1302         int ret = 0, mmio_bar = IS_I9XX(dev) ? 0 : 1;
1303
1304         /* i915 has 4 more counters */
1305         dev->counters += 4;
1306         dev->types[6] = _DRM_STAT_IRQ;
1307         dev->types[7] = _DRM_STAT_PRIMARY;
1308         dev->types[8] = _DRM_STAT_SECONDARY;
1309         dev->types[9] = _DRM_STAT_DMA;
1310
1311         dev_priv = drm_alloc(sizeof(drm_i915_private_t), DRM_MEM_DRIVER);
1312         if (dev_priv == NULL)
1313                 return -ENOMEM;
1314
1315         memset(dev_priv, 0, sizeof(drm_i915_private_t));
1316
1317         dev->dev_private = (void *)dev_priv;
1318
1319         /* Add register map (needed for suspend/resume) */
1320         base = drm_get_resource_start(dev, mmio_bar);
1321         size = drm_get_resource_len(dev, mmio_bar);
1322
1323         ret = drm_addmap(dev, base, size, _DRM_REGISTERS, _DRM_KERNEL,
1324                          &dev_priv->mmio_map);
1325
1326 #ifdef __linux__
1327 #if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,25)
1328         intel_init_chipset_flush_compat(dev);
1329 #endif
1330 #endif
1331         return ret;
1332 }
1333
1334 int i915_driver_unload(struct drm_device *dev)
1335 {
1336         struct drm_i915_private *dev_priv = dev->dev_private;
1337
1338         if (dev_priv->mmio_map)
1339                 drm_rmmap(dev, dev_priv->mmio_map);
1340
1341         drm_free(dev->dev_private, sizeof(drm_i915_private_t),
1342                  DRM_MEM_DRIVER);
1343 #ifdef __linux__
1344 #if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,25)
1345         intel_fini_chipset_flush_compat(dev);
1346 #endif
1347 #endif
1348         return 0;
1349 }
1350
1351 void i915_driver_lastclose(struct drm_device * dev)
1352 {
1353         drm_i915_private_t *dev_priv = dev->dev_private;
1354
1355         if (drm_getsarea(dev) && dev_priv->sarea_priv)
1356                 i915_do_cleanup_pageflip(dev);
1357         if (dev_priv->agp_heap)
1358                 i915_mem_takedown(&(dev_priv->agp_heap));
1359
1360         i915_dma_cleanup(dev);
1361 }
1362
1363 void i915_driver_preclose(struct drm_device * dev, struct drm_file *file_priv)
1364 {
1365         drm_i915_private_t *dev_priv = dev->dev_private;
1366         i915_mem_release(dev, file_priv, dev_priv->agp_heap);
1367 }
1368
1369 struct drm_ioctl_desc i915_ioctls[] = {
1370         DRM_IOCTL_DEF(DRM_I915_INIT, i915_dma_init, DRM_AUTH|DRM_MASTER|DRM_ROOT_ONLY),
1371         DRM_IOCTL_DEF(DRM_I915_FLUSH, i915_flush_ioctl, DRM_AUTH),
1372         DRM_IOCTL_DEF(DRM_I915_FLIP, i915_flip_bufs, DRM_AUTH),
1373         DRM_IOCTL_DEF(DRM_I915_BATCHBUFFER, i915_batchbuffer, DRM_AUTH),
1374         DRM_IOCTL_DEF(DRM_I915_IRQ_EMIT, i915_irq_emit, DRM_AUTH),
1375         DRM_IOCTL_DEF(DRM_I915_IRQ_WAIT, i915_irq_wait, DRM_AUTH),
1376         DRM_IOCTL_DEF(DRM_I915_GETPARAM, i915_getparam, DRM_AUTH),
1377         DRM_IOCTL_DEF(DRM_I915_SETPARAM, i915_setparam, DRM_AUTH|DRM_MASTER|DRM_ROOT_ONLY),
1378         DRM_IOCTL_DEF(DRM_I915_ALLOC, i915_mem_alloc, DRM_AUTH),
1379         DRM_IOCTL_DEF(DRM_I915_FREE, i915_mem_free, DRM_AUTH),
1380         DRM_IOCTL_DEF(DRM_I915_INIT_HEAP, i915_mem_init_heap, DRM_AUTH|DRM_MASTER|DRM_ROOT_ONLY),
1381         DRM_IOCTL_DEF(DRM_I915_CMDBUFFER, i915_cmdbuffer, DRM_AUTH),
1382         DRM_IOCTL_DEF(DRM_I915_DESTROY_HEAP,  i915_mem_destroy_heap, DRM_AUTH|DRM_MASTER|DRM_ROOT_ONLY ),
1383         DRM_IOCTL_DEF(DRM_I915_SET_VBLANK_PIPE,  i915_vblank_pipe_set, DRM_AUTH|DRM_MASTER|DRM_ROOT_ONLY ),
1384         DRM_IOCTL_DEF(DRM_I915_GET_VBLANK_PIPE,  i915_vblank_pipe_get, DRM_AUTH ),
1385         DRM_IOCTL_DEF(DRM_I915_VBLANK_SWAP, i915_vblank_swap, DRM_AUTH),
1386         DRM_IOCTL_DEF(DRM_I915_MMIO, i915_mmio, DRM_AUTH),
1387         DRM_IOCTL_DEF(DRM_I915_HWS_ADDR, i915_set_status_page, DRM_AUTH),
1388 #ifdef I915_HAVE_BUFFER
1389         DRM_IOCTL_DEF(DRM_I915_EXECBUFFER, i915_execbuffer, DRM_AUTH),
1390 #endif
1391 };
1392
1393 int i915_max_ioctl = DRM_ARRAY_SIZE(i915_ioctls);
1394
1395 /**
1396  * Determine if the device really is AGP or not.
1397  *
1398  * All Intel graphics chipsets are treated as AGP, even if they are really
1399  * PCI-e.
1400  *
1401  * \param dev   The device to be tested.
1402  *
1403  * \returns
1404  * A value of 1 is always retured to indictate every i9x5 is AGP.
1405  */
1406 int i915_driver_device_is_agp(struct drm_device * dev)
1407 {
1408         return 1;
1409 }
1410
1411 int i915_driver_firstopen(struct drm_device *dev)
1412 {
1413 #ifdef I915_HAVE_BUFFER
1414         drm_bo_driver_init(dev);
1415 #endif
1416         return 0;
1417 }