1 /* drm.h -- Header for Direct Rendering Manager -*- linux-c -*-
2 * Created: Mon Jan 4 10:05:05 1999 by faith@precisioninsight.com
3 * Revised: Mon Feb 14 00:15:23 2000 by kevin@precisioninsight.com
5 * Copyright 1999 Precision Insight, Inc., Cedar Park, Texas.
8 * Permission is hereby granted, free of charge, to any person obtaining a
9 * copy of this software and associated documentation files (the "Software"),
10 * to deal in the Software without restriction, including without limitation
11 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
12 * and/or sell copies of the Software, and to permit persons to whom the
13 * Software is furnished to do so, subject to the following conditions:
15 * The above copyright notice and this permission notice (including the next
16 * paragraph) shall be included in all copies or substantial portions of the
19 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
20 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
21 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
22 * PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
23 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
24 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
25 * DEALINGS IN THE SOFTWARE.
27 * $XFree86: xc/programs/Xserver/hw/xfree86/os-support/linux/drm/kernel/drm.h,v 1.5 2000/02/23 04:47:26 martin Exp $
30 * Dec 1999, Richard Henderson <rth@twiddle.net>, move to generic cmpxchg.
37 #include <asm/ioctl.h> /* For _IO* macros */
39 #define DRM_PROC_DEVICES "/proc/devices"
40 #define DRM_PROC_MISC "/proc/misc"
41 #define DRM_PROC_DRM "/proc/drm"
42 #define DRM_DEV_DRM "/dev/drm"
43 #define DRM_DEV_MODE (S_IRUSR|S_IWUSR|S_IRGRP|S_IWGRP)
48 #define DRM_NAME "drm" /* Name in kernel, /dev, and /proc */
49 #define DRM_MIN_ORDER 5 /* At least 2^5 bytes = 32 bytes */
50 #define DRM_MAX_ORDER 22 /* Up to 2^22 bytes = 4MB */
51 #define DRM_RAM_PERCENT 10 /* How much system ram can we lock? */
53 #define _DRM_LOCK_HELD 0x80000000 /* Hardware lock is held */
54 #define _DRM_LOCK_CONT 0x40000000 /* Hardware lock is contended */
55 #define _DRM_LOCK_IS_HELD(lock) ((lock) & _DRM_LOCK_HELD)
56 #define _DRM_LOCK_IS_CONT(lock) ((lock) & _DRM_LOCK_CONT)
57 #define _DRM_LOCKING_CONTEXT(lock) ((lock) & ~(_DRM_LOCK_HELD|_DRM_LOCK_CONT))
59 typedef unsigned long drm_handle_t;
60 typedef unsigned int drm_context_t;
61 typedef unsigned int drm_drawable_t;
62 typedef unsigned int drm_magic_t;
65 typedef struct drm_version {
66 int version_major; /* Major version */
67 int version_minor; /* Minor version */
68 int version_patchlevel;/* Patch level */
69 size_t name_len; /* Length of name buffer */
70 char *name; /* Name of driver */
71 size_t date_len; /* Length of date buffer */
72 char *date; /* User-space buffer to hold date */
73 size_t desc_len; /* Length of desc buffer */
74 char *desc; /* User-space buffer to hold desc */
77 typedef struct drm_unique {
78 size_t unique_len; /* Length of unique */
79 char *unique; /* Unique name for driver instantiation */
82 typedef struct drm_list {
83 int count; /* Length of user-space structures */
84 drm_version_t *version;
87 typedef struct drm_block {
91 typedef struct drm_control {
101 typedef enum drm_map_type {
102 _DRM_FRAME_BUFFER = 0, /* WC (no caching), no core dump */
103 _DRM_REGISTERS = 1, /* no caching, no core dump */
104 _DRM_SHM = 2 /* shared, cached */
107 typedef enum drm_map_flags {
108 _DRM_RESTRICTED = 0x01, /* Cannot be mapped to user-virtual */
109 _DRM_READ_ONLY = 0x02,
110 _DRM_LOCKED = 0x04, /* shared, cached, locked */
111 _DRM_KERNEL = 0x08, /* kernel requires access */
112 _DRM_WRITE_COMBINING = 0x10, /* use write-combining if available */
113 _DRM_CONTAINS_LOCK = 0x20 /* SHM page that contains lock */
116 typedef struct drm_map {
117 unsigned long offset; /* Requested physical address (0 for SAREA)*/
118 unsigned long size; /* Requested physical size (bytes) */
119 drm_map_type_t type; /* Type of memory to map */
120 drm_map_flags_t flags; /* Flags */
121 void *handle; /* User-space: "Handle" to pass to mmap */
122 /* Kernel-space: kernel-virtual address */
123 int mtrr; /* MTRR slot used */
127 typedef enum drm_lock_flags {
128 _DRM_LOCK_READY = 0x01, /* Wait until hardware is ready for DMA */
129 _DRM_LOCK_QUIESCENT = 0x02, /* Wait until hardware quiescent */
130 _DRM_LOCK_FLUSH = 0x04, /* Flush this context's DMA queue first */
131 _DRM_LOCK_FLUSH_ALL = 0x08, /* Flush all DMA queues first */
132 /* These *HALT* flags aren't supported yet
133 -- they will be used to support the
134 full-screen DGA-like mode. */
135 _DRM_HALT_ALL_QUEUES = 0x10, /* Halt all current and future queues */
136 _DRM_HALT_CUR_QUEUES = 0x20 /* Halt all current queues */
139 typedef struct drm_lock {
141 drm_lock_flags_t flags;
144 typedef enum drm_dma_flags { /* These values *MUST* match xf86drm.h */
145 /* Flags for DMA buffer dispatch */
146 _DRM_DMA_BLOCK = 0x01, /* Block until buffer dispatched.
147 Note, the buffer may not yet have
148 been processed by the hardware --
149 getting a hardware lock with the
150 hardware quiescent will ensure
151 that the buffer has been
153 _DRM_DMA_WHILE_LOCKED = 0x02, /* Dispatch while lock held */
154 _DRM_DMA_PRIORITY = 0x04, /* High priority dispatch */
156 /* Flags for DMA buffer request */
157 _DRM_DMA_WAIT = 0x10, /* Wait for free buffers */
158 _DRM_DMA_SMALLER_OK = 0x20, /* Smaller-than-requested buffers ok */
159 _DRM_DMA_LARGER_OK = 0x40 /* Larger-than-requested buffers ok */
162 typedef struct drm_buf_desc {
163 int count; /* Number of buffers of this size */
164 int size; /* Size in bytes */
165 int low_mark; /* Low water mark */
166 int high_mark; /* High water mark */
168 DRM_PAGE_ALIGN = 0x01 /* Align on page boundaries for DMA */
172 typedef struct drm_buf_info {
173 int count; /* Entries in list */
174 drm_buf_desc_t *list;
177 typedef struct drm_buf_free {
182 typedef struct drm_buf_pub {
183 int idx; /* Index into master buflist */
184 int total; /* Buffer size */
185 int used; /* Amount of buffer in use (for DMA) */
186 void *address; /* Address of buffer */
189 typedef struct drm_buf_map {
190 int count; /* Length of buflist */
191 void *virtual; /* Mmaped area in user-virtual */
192 drm_buf_pub_t *list; /* Buffer information */
195 typedef struct drm_dma {
196 /* Indices here refer to the offset into
197 buflist in drm_buf_get_t. */
198 int context; /* Context handle */
199 int send_count; /* Number of buffers to send */
200 int *send_indices; /* List of handles to buffers */
201 int *send_sizes; /* Lengths of data to send */
202 drm_dma_flags_t flags; /* Flags */
203 int request_count; /* Number of buffers requested */
204 int request_size; /* Desired size for buffers */
205 int *request_indices; /* Buffer information */
207 int granted_count; /* Number of buffers granted */
211 _DRM_CONTEXT_PRESERVED = 0x01,
212 _DRM_CONTEXT_2DONLY = 0x02
215 typedef struct drm_ctx {
216 drm_context_t handle;
217 drm_ctx_flags_t flags;
220 typedef struct drm_ctx_res {
225 typedef struct drm_draw {
226 drm_drawable_t handle;
229 typedef struct drm_auth {
233 typedef struct drm_irq_busid {
240 #define DRM_IOCTL_BASE 'd'
241 #define DRM_IOCTL_NR(n) _IOC_NR(n)
242 #define DRM_IO(nr) _IO(DRM_IOCTL_BASE,nr)
243 #define DRM_IOR(nr,size) _IOR(DRM_IOCTL_BASE,nr,size)
244 #define DRM_IOW(nr,size) _IOW(DRM_IOCTL_BASE,nr,size)
245 #define DRM_IOWR(nr,size) _IOWR(DRM_IOCTL_BASE,nr,size)
248 #define DRM_IOCTL_VERSION DRM_IOWR(0x00, drm_version_t)
249 #define DRM_IOCTL_GET_UNIQUE DRM_IOWR(0x01, drm_unique_t)
250 #define DRM_IOCTL_GET_MAGIC DRM_IOW( 0x02, drm_auth_t)
251 #define DRM_IOCTL_IRQ_BUSID DRM_IOWR(0x03, drm_irq_busid_t)
253 #define DRM_IOCTL_SET_UNIQUE DRM_IOW( 0x10, drm_unique_t)
254 #define DRM_IOCTL_AUTH_MAGIC DRM_IOW( 0x11, drm_auth_t)
255 #define DRM_IOCTL_BLOCK DRM_IOWR(0x12, drm_block_t)
256 #define DRM_IOCTL_UNBLOCK DRM_IOWR(0x13, drm_block_t)
257 #define DRM_IOCTL_CONTROL DRM_IOW( 0x14, drm_control_t)
258 #define DRM_IOCTL_ADD_MAP DRM_IOWR(0x15, drm_map_t)
259 #define DRM_IOCTL_ADD_BUFS DRM_IOWR(0x16, drm_buf_desc_t)
260 #define DRM_IOCTL_MARK_BUFS DRM_IOW( 0x17, drm_buf_desc_t)
261 #define DRM_IOCTL_INFO_BUFS DRM_IOWR(0x18, drm_buf_info_t)
262 #define DRM_IOCTL_MAP_BUFS DRM_IOWR(0x19, drm_buf_map_t)
263 #define DRM_IOCTL_FREE_BUFS DRM_IOW( 0x1a, drm_buf_free_t)
265 #define DRM_IOCTL_ADD_CTX DRM_IOWR(0x20, drm_ctx_t)
266 #define DRM_IOCTL_RM_CTX DRM_IOWR(0x21, drm_ctx_t)
267 #define DRM_IOCTL_MOD_CTX DRM_IOW( 0x22, drm_ctx_t)
268 #define DRM_IOCTL_GET_CTX DRM_IOWR(0x23, drm_ctx_t)
269 #define DRM_IOCTL_SWITCH_CTX DRM_IOW( 0x24, drm_ctx_t)
270 #define DRM_IOCTL_NEW_CTX DRM_IOW( 0x25, drm_ctx_t)
271 #define DRM_IOCTL_RES_CTX DRM_IOWR(0x26, drm_ctx_res_t)
272 #define DRM_IOCTL_ADD_DRAW DRM_IOWR(0x27, drm_draw_t)
273 #define DRM_IOCTL_RM_DRAW DRM_IOWR(0x28, drm_draw_t)
274 #define DRM_IOCTL_DMA DRM_IOWR(0x29, drm_dma_t)
275 #define DRM_IOCTL_LOCK DRM_IOW( 0x2a, drm_lock_t)
276 #define DRM_IOCTL_UNLOCK DRM_IOW( 0x2b, drm_lock_t)
277 #define DRM_IOCTL_FINISH DRM_IOW( 0x2c, drm_lock_t)