2 * (C) Copyright IBM Corporation 2006
5 * Permission is hereby granted, free of charge, to any person obtaining a
6 * copy of this software and associated documentation files (the "Software"),
7 * to deal in the Software without restriction, including without limitation
8 * on the rights to use, copy, modify, merge, publish, distribute, sub
9 * license, and/or sell copies of the Software, and to permit persons to whom
10 * the Software is furnished to do so, subject to the following conditions:
12 * The above copyright notice and this permission notice (including the next
13 * paragraph) shall be included in all copies or substantial portions of the
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
19 * IBM AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
20 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
21 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
22 * DEALINGS IN THE SOFTWARE.
39 # define err(exitcode, format, args...) \
40 errx(exitcode, format ": %s", ## args, strerror(errno))
41 # define errx(exitcode, format, args...) \
42 { warnx(format, ## args); exit(exitcode); }
43 # define warn(format, args...) \
44 warnx(format ": %s", ## args, strerror(errno))
45 # define warnx(format, args...) \
46 fprintf(stderr, format "\n", ## args)
49 #include "pciaccess.h"
50 #include "pciaccess_private.h"
54 print_pci_bridge( const struct pci_bridge_info * info )
56 printf( " Bus: primary=%02"PRIx8", secondary=%02"PRIx8", subordinate=%02"PRIx8", "
57 "sec-latency=%"PRIu8"\n",
60 info->subordinate_bus,
61 info->secondary_latency_timer );
62 printf( " I/O behind bridge: %08"PRIx32"-%08"PRIx32"\n",
65 printf( " Memory behind bridge: %08"PRIx32"-%08"PRIx32"\n",
68 printf( " Prefetchable memory behind bridge: %08"PRIx64"-%08"PRIx64"\n",
69 info->prefetch_mem_base,
70 info->prefetch_mem_limit );
74 print_pci_device( struct pci_device * dev, int verbose )
76 const char * dev_name;
77 const char * vend_name;
79 vend_name = pci_device_get_vendor_name( dev );
80 dev_name = pci_device_get_device_name( dev );
81 if ( dev_name == NULL ) {
82 dev_name = "Device unknown";
87 printf("domain 0x%04x ", dev->domain);
88 printf("bus 0x%04x cardnum 0x%02x function 0x%02x:"
89 " vendor 0x%04x device 0x%04x\n",
95 if ( vend_name != NULL ) {
96 printf( " %s %s\n", vend_name, dev_name );
99 printf( " %s\n", dev_name );
104 uint16_t command, status;
107 uint8_t latency_timer;
108 uint8_t cache_line_size;
114 vend_name = pci_device_get_subvendor_name( dev );
115 dev_name = pci_device_get_subdevice_name( dev );
116 if ( dev_name == NULL ) {
117 dev_name = "Card unknown";
120 printf( " CardVendor 0x%04x card 0x%04x (",
123 if ( vend_name != NULL ) {
124 printf( "%s, %s)\n", vend_name, dev_name );
127 printf( "%s)\n", dev_name );
130 pci_device_cfg_read_u16( dev, & command, 4 );
131 pci_device_cfg_read_u16( dev, & status, 6 );
132 printf( " STATUS 0x%04x COMMAND 0x%04x\n",
135 printf( " CLASS 0x%02x 0x%02x 0x%02x REVISION 0x%02x\n",
136 (dev->device_class >> 16) & 0x0ff,
137 (dev->device_class >> 8) & 0x0ff,
138 (dev->device_class >> 0) & 0x0ff,
141 pci_device_cfg_read_u8( dev, & cache_line_size, 12 );
142 pci_device_cfg_read_u8( dev, & latency_timer, 13 );
143 pci_device_cfg_read_u8( dev, & header_type, 14 );
144 pci_device_cfg_read_u8( dev, & bist, 15 );
146 printf( " BIST 0x%02x HEADER 0x%02x LATENCY 0x%02x CACHE 0x%02x\n",
152 pci_device_probe( dev );
153 for ( i = 0 ; i < 6 ; i++ ) {
154 if ( dev->regions[i].base_addr != 0 ) {
155 printf( " BASE%u 0x%08"PRIxPTR" SIZE %zu %s",
157 (intptr_t) dev->regions[i].base_addr,
158 (size_t) dev->regions[i].size,
159 (dev->regions[i].is_IO) ? "I/O" : "MEM" );
161 if ( ! dev->regions[i].is_IO ) {
162 if ( dev->regions[i].is_prefetchable ) {
163 printf( " PREFETCHABLE" );
171 if ( dev->rom_size ) {
172 struct pci_device_private *priv =
173 (struct pci_device_private *) dev;
175 printf( " BASEROM 0x%08"PRIxPTR" SIZE %zu\n",
176 (intptr_t) priv->rom_base, (size_t) dev->rom_size);
179 pci_device_cfg_read_u8( dev, & int_pin, 61 );
180 pci_device_cfg_read_u8( dev, & min_grant, 62 );
181 pci_device_cfg_read_u8( dev, & max_latency, 63 );
183 printf( " MAX_LAT 0x%02x MIN_GNT 0x%02x INT_PIN 0x%02x INT_LINE 0x%02x\n",
189 if ( (dev->device_class >> 16) == 0x06 ) {
192 if ( (info = pci_device_get_bridge_info(dev)) != NULL ) {
193 print_pci_bridge( (const struct pci_bridge_info *) info );
195 else if ( (info = pci_device_get_pcmcia_bridge_info(dev)) != NULL ) {
203 int main( int argc, char ** argv )
205 struct pci_device_iterator * iter;
206 struct pci_device * dev;
212 while ((c = getopt(argc, argv, "v")) != -1) {
222 fprintf(stderr, "usage: %s [-v]\n", argv[0]);
226 ret = pci_system_init();
228 err(1, "Couldn't initialize PCI system");
230 iter = pci_slot_match_iterator_create( NULL );
232 while ( (dev = pci_device_next( iter )) != NULL ) {
233 print_pci_device( dev, verbose );
236 pci_system_cleanup();