2 * Copyright (c) 2018 Samsung Electronics Co., Ltd. All Rights Reserved
4 * Licensed under the Apache License, Version 2.0 (the "License");
5 * you may not use this file except in compliance with the License.
6 * You may obtain a copy of the License at
8 * http://www.apache.org/licenses/LICENSE-2.0
10 * Unless required by applicable law or agreed to in writing, software
11 * distributed under the License is distributed on an "AS IS" BASIS,
12 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
13 * See the License for the specific language governing permissions and
14 * limitations under the License.
20 #include "ir/DataType.h"
21 #include "ir/operation/ElementwiseActivation.h"
27 ::arm_compute::DataLayout asDataLayout(onert::ir::Layout layout)
31 case onert::ir::Layout::NHWC:
32 return ::arm_compute::DataLayout::NHWC;
33 case onert::ir::Layout::NCHW:
34 return ::arm_compute::DataLayout::NCHW;
36 return ::arm_compute::DataLayout::UNKNOWN;
49 ::arm_compute::TensorShape asTensorShape(const ir::Shape &shape, ir::Layout frontend_layout,
50 ir::Layout backend_layout, bool apply_dim_correction)
52 // If shape's rank is 0, the tensor is a scalar
53 // Sometimes, some ACL kernel can use a scalar as tensor. But ACL does not allocate buffer for
54 // tensor having rank as 0.
55 const auto tensor_shape = shape.rank() == 0 ? ir::Shape{1} : shape;
57 const uint32_t rank = tensor_shape.rank();
59 ::arm_compute::TensorShape res{};
61 res.set_num_dimensions(rank);
63 for (uint32_t axis = 0; axis < rank; ++axis)
65 // NOTE In some cases, in incorrect dimensions is required.
66 // For example, intput_size is 1 in LSTM. The input-to-input weights([num_units, input_size]) of
67 // LSTM is used as the weight of the FullyConnected.
68 // The FullyConnected's weight must be greater or equal than 2-dimensions.
69 // However, if the dimension correction is applied to input_to_input_weights with input_size
70 // equal to 1, it will be changed to 1-D.
71 // So input_to_input_weights is not used by the weight of FullyConnected.
72 res.set(ToARMComputeAxis(rank, axis, frontend_layout, backend_layout).value(),
73 tensor_shape.dim(axis), apply_dim_correction);
79 ::arm_compute::Coordinates asTensorCoordinate(const ir::Coordinates &coord,
80 ir::Layout frontend_layout, ir::Layout backend_layout)
82 const uint32_t rank = coord.size();
84 ::arm_compute::Coordinates res{};
86 res.set_num_dimensions(rank);
88 for (uint32_t axis = 0; axis < rank; ++axis)
90 res.set(ToARMComputeAxis(rank, axis, frontend_layout, backend_layout).value(), coord[axis]);
96 ::arm_compute::DataType asDataType(const ir::DataType type)
100 case ir::DataType::FLOAT32:
101 return ::arm_compute::DataType::F32;
102 case ir::DataType::INT32:
103 return ::arm_compute::DataType::S32;
104 case ir::DataType::UINT32:
105 return ::arm_compute::DataType::U32;
106 case ir::DataType::QUANT_UINT8_ASYMM:
107 return ::arm_compute::DataType::QASYMM8;
108 case ir::DataType::BOOL8:
109 case ir::DataType::UINT8:
110 return ::arm_compute::DataType::U8;
111 case ir::DataType::QUANT_INT8_SYMM:
112 return ::arm_compute::DataType::S8;
113 case ir::DataType::FLOAT16:
114 return ::arm_compute::DataType::F16;
116 throw std::runtime_error("Not supported, yet");
121 ::arm_compute::QuantizationInfo asQuantizationInfo(const float scale, const int32_t offset)
123 return ::arm_compute::QuantizationInfo(scale, offset);
126 ::arm_compute::TensorInfo asTensorInfo(const ir::Shape &shape, const ir::TypeInfo &typeInfo,
127 ir::Layout frontend_layout, ir::Layout backend_layout,
128 bool apply_dim_correction)
130 ::arm_compute::TensorInfo info(
131 asTensorShape(shape, frontend_layout, backend_layout, apply_dim_correction), 1,
132 asDataType(typeInfo.type()), asQuantizationInfo(typeInfo.scale(), typeInfo.offset()));
133 info.set_data_layout(asDataLayout(backend_layout));
137 ::arm_compute::PadStrideInfo asPadStrideInfo(const ir::ExplicitPadding &padding,
138 const ir::Stride &stride)
140 return ::arm_compute::PadStrideInfo{stride.horizontal,
146 ::arm_compute::DimensionRoundingType::FLOOR};
149 ::arm_compute::ActivationLayerInfo asActivationLayerInfo(const ir::Activation act_code)
153 case ir::Activation::NONE:
154 return ::arm_compute::ActivationLayerInfo{};
155 case ir::Activation::RELU:
156 return ::arm_compute::ActivationLayerInfo{
157 ::arm_compute::ActivationLayerInfo::ActivationFunction::RELU};
158 case ir::Activation::RELU1:
159 return ::arm_compute::ActivationLayerInfo{
160 ::arm_compute::ActivationLayerInfo::ActivationFunction::LU_BOUNDED_RELU, 1.0f, -1.0f};
161 case ir::Activation::RELU6:
162 return ::arm_compute::ActivationLayerInfo{
163 ::arm_compute::ActivationLayerInfo::ActivationFunction::LU_BOUNDED_RELU, 6.0f, 0.0f};
164 // Cases for activation of LSTM.
165 case ir::Activation::TANH:
166 return ::arm_compute::ActivationLayerInfo{
167 ::arm_compute::ActivationLayerInfo::ActivationFunction::TANH, 1.0f, 1.0f};
168 case ir::Activation::SIGMOID:
169 // NOTE The sigmoid function is a special case of the Logistic function when L=1, k=1, x0=0.
170 // TODO In ACL and nnapi sepc, currently, Logistic's L always is 1, k always is 1, x0 always
171 // 0(always sigmoid) regardless of values of the parameter.
172 // If ACL support non-sigmoid logistic, should fix param values.
173 return ::arm_compute::ActivationLayerInfo{
174 ::arm_compute::ActivationLayerInfo::ActivationFunction::LOGISTIC, 0.0f, 0.0f};
176 throw std::runtime_error{"Not supported, yet"};
181 ::arm_compute::ActivationLayerInfo
182 asActivationLayerInfo(const ir::operation::ElementwiseActivation::Type op_type, float alpha,
187 case ir::operation::ElementwiseActivation::Type::RELU:
190 if (alpha == ir::operation::ElementwiseActivation::infinity)
192 return ::arm_compute::ActivationLayerInfo{
193 ::arm_compute::ActivationLayerInfo::ActivationFunction::RELU};
197 return ::arm_compute::ActivationLayerInfo{
198 ::arm_compute::ActivationLayerInfo::ActivationFunction::BOUNDED_RELU, alpha};
203 return ::arm_compute::ActivationLayerInfo{
204 ::arm_compute::ActivationLayerInfo::ActivationFunction::LU_BOUNDED_RELU, alpha, beta};
206 case ir::operation::ElementwiseActivation::Type::TANH:
207 return ::arm_compute::ActivationLayerInfo{
208 ::arm_compute::ActivationLayerInfo::ActivationFunction::TANH, alpha, beta};
209 case ir::operation::ElementwiseActivation::Type::LOGISTIC:
210 // NOTE The sigmoid function is a special case of the Logistic function when L=1, k=1, x0=0.
211 // TODO In ACL and nnapi sepc, currently, Logistic's L always is 1, k always is 1, x0 always
212 // 0(always sigmoid) regardless of values of the parameter.
213 // If ACL support non-sigmoid logistic, should fix param values.
214 return ::arm_compute::ActivationLayerInfo{
215 ::arm_compute::ActivationLayerInfo::ActivationFunction::LOGISTIC};
216 case ir::operation::ElementwiseActivation::Type::LEAKY_RELU:
217 return ::arm_compute::ActivationLayerInfo{
218 ::arm_compute::ActivationLayerInfo::ActivationFunction::LEAKY_RELU, alpha};
220 throw std::runtime_error{"Not supported, yet"};
225 arm_compute::Coordinates asCoordinates(const ir::Operand &operand, int32_t rank,
226 ir::Layout frontend_layout, ir::Layout backend_layout)
228 std::set<uint32_t> axes = asSet(operand, rank, frontend_layout, backend_layout);
230 arm_compute::Coordinates reduce_axes;
231 for (const int32_t axis : axes)
233 reduce_axes.set(reduce_axes.num_dimensions(), axis);
239 std::set<uint32_t> asSet(const ir::Operand &operand, int32_t rank, ir::Layout frontend_layout,
240 ir::Layout backend_layout)
242 std::set<std::uint32_t> axes;
244 for (size_t i = 0; i < operand.shape().num_elements(); ++i)
247 switch (operand.typeInfo().type())
249 case ir::DataType::INT32:
250 axis = reinterpret_cast<const int32_t *>(operand.data()->base())[i];
252 case ir::DataType::INT64:
253 axis = reinterpret_cast<const int64_t *>(operand.data()->base())[i];
256 throw std::runtime_error("acl_common::asSet: Not supported data type");
260 axes.insert(ToARMComputeAxis(rank, axis, frontend_layout, backend_layout).value());
266 std::unique_ptr<AclFunction> asAclFunction(std::unique_ptr<::arm_compute::IFunction> &&layer)
268 return std::make_unique<AclFunction>(std::move(layer));
271 ir::Layout asRuntimeLayout(::arm_compute::DataLayout data_layout)
275 case ::arm_compute::DataLayout::NHWC:
276 return ir::Layout::NHWC;
277 case ::arm_compute::DataLayout::NCHW:
278 return ir::Layout::NCHW;
280 return ir::Layout::UNKNOWN;
284 ir::DataType asRuntimeDataType(::arm_compute::DataType data_type)
288 case ::arm_compute::DataType::F32:
289 return ir::DataType::FLOAT32;
290 case ::arm_compute::DataType::S32:
291 return ir::DataType::INT32;
292 case ::arm_compute::DataType::U32:
293 return ir::DataType::UINT32;
294 case ::arm_compute::DataType::QASYMM8:
295 return ir::DataType::QUANT_UINT8_ASYMM;
296 case ::arm_compute::DataType::U8:
297 return ir::DataType::UINT8;
298 case ::arm_compute::DataType::QSYMM8:
299 return ir::DataType::QUANT_INT8_SYMM;
300 case ::arm_compute::DataType::F16:
301 return ir::DataType::FLOAT16;
303 throw std::runtime_error{"Not supported, yet"};
308 arm_compute::PoolingType convertPoolType(ir::operation::Pool2D::PoolType pool_type_ir)
310 switch (pool_type_ir)
312 case ir::operation::Pool2D::PoolType::AVG:
313 return arm_compute::PoolingType::AVG;
314 case ir::operation::Pool2D::PoolType::L2:
315 return arm_compute::PoolingType::L2;
316 case ir::operation::Pool2D::PoolType::MAX:
317 return arm_compute::PoolingType::MAX;
319 throw std::runtime_error("convertPoolType: Not supported operation yet");
323 arm_compute::ReduceOperation convertReduceType(ir::operation::Reduce::ReduceType reduce_type_ir)
325 switch (reduce_type_ir)
327 case ir::operation::Reduce::ReduceType::MAX:
328 return arm_compute::ReduceOperation::MAX;
329 case ir::operation::Reduce::ReduceType::MIN:
330 return arm_compute::ReduceOperation::MIN;
331 case ir::operation::Reduce::ReduceType::SUM:
332 return arm_compute::ReduceOperation::SUM;
334 throw std::runtime_error("convertReduceType: Not supported operation yet");
338 } // namespace acl_common
339 } // namespace backend