4 * Copyright IBM, Corp. 2011
7 * Anthony Liguori <aliguori@us.ibm.com>
9 * This work is licensed under the terms of the GNU GPL, version 2 or later.
10 * See the COPYING file in the top-level directory.
14 #include "sysemu/qtest.h"
16 #include "sysemu/char.h"
17 #include "exec/ioport.h"
18 #include "exec/memory.h"
20 #include "sysemu/accel.h"
21 #include "sysemu/sysemu.h"
22 #include "sysemu/cpus.h"
23 #include "qemu/config-file.h"
24 #include "qemu/option.h"
25 #include "qemu/error-report.h"
31 static DeviceState *irq_intercept_dev;
32 static FILE *qtest_log_fp;
33 static CharDriverState *qtest_chr;
34 static GString *inbuf;
35 static int irq_levels[MAX_IRQ];
36 static qemu_timeval start_time;
37 static bool qtest_opened;
39 #define FMT_timeval "%ld.%06ld"
44 * Line based protocol, request/response based. Server can send async messages
45 * so clients should always handle many async messages before the response
52 * The qtest client is completely in charge of the QEMU_CLOCK_VIRTUAL. qtest commands
53 * let you adjust the value of the clock (monotonically). All the commands
54 * return the current value of the clock in nanoseconds.
59 * Advance the clock to the next deadline. Useful when waiting for
60 * asynchronous events.
65 * Advance the clock by NS nanoseconds.
70 * Advance the clock to NS nanoseconds (do nothing if it's already past).
72 * PIO and memory access:
101 * > writeq ADDR VALUE
119 * > write ADDR SIZE DATA
122 * > b64read ADDR SIZE
125 * > b64write ADDR SIZE B64_DATA
128 * ADDR, SIZE, VALUE are all integers parsed with strtoul() with a base of 0.
130 * DATA is an arbitrarily long hex number prefixed with '0x'. If it's smaller
131 * than the expected size, the value will be zero filled at the end of the data
134 * B64_DATA is an arbitrarily long base64 encoded string.
135 * If the sizes do not match, the data will be truncated.
139 * > irq_intercept_in QOM-PATH
142 * > irq_intercept_out QOM-PATH
145 * Attach to the gpio-in (resp. gpio-out) pins exported by the device at
146 * QOM-PATH. When the pin is triggered, one of the following async messages
147 * will be printed to the qtest stream:
152 * where NUM is an IRQ number. For the PC, interrupts can be intercepted
153 * simply with "irq_intercept_in ioapic" (note that IRQ0 comes out with
154 * NUM=0 even though it is remapped to GSI 2).
157 static int hex2nib(char ch)
159 if (ch >= '0' && ch <= '9') {
161 } else if (ch >= 'a' && ch <= 'f') {
162 return 10 + (ch - 'a');
163 } else if (ch >= 'A' && ch <= 'F') {
164 return 10 + (ch - 'A');
170 static void qtest_get_time(qemu_timeval *tv)
172 qemu_gettimeofday(tv);
173 tv->tv_sec -= start_time.tv_sec;
174 tv->tv_usec -= start_time.tv_usec;
175 if (tv->tv_usec < 0) {
176 tv->tv_usec += 1000000;
181 static void qtest_send_prefix(CharDriverState *chr)
185 if (!qtest_log_fp || !qtest_opened) {
190 fprintf(qtest_log_fp, "[S +" FMT_timeval "] ",
191 (long) tv.tv_sec, (long) tv.tv_usec);
194 static void GCC_FMT_ATTR(1, 2) qtest_log_send(const char *fmt, ...)
198 if (!qtest_log_fp || !qtest_opened) {
202 qtest_send_prefix(NULL);
205 vfprintf(qtest_log_fp, fmt, ap);
209 static void do_qtest_send(CharDriverState *chr, const char *str, size_t len)
211 qemu_chr_fe_write_all(chr, (uint8_t *)str, len);
212 if (qtest_log_fp && qtest_opened) {
213 fprintf(qtest_log_fp, "%s", str);
217 static void qtest_send(CharDriverState *chr, const char *str)
219 do_qtest_send(chr, str, strlen(str));
222 static void GCC_FMT_ATTR(2, 3) qtest_sendf(CharDriverState *chr,
223 const char *fmt, ...)
229 buffer = g_strdup_vprintf(fmt, ap);
230 qtest_send(chr, buffer);
234 static void qtest_irq_handler(void *opaque, int n, int level)
236 qemu_irq old_irq = *(qemu_irq *)opaque;
237 qemu_set_irq(old_irq, level);
239 if (irq_levels[n] != level) {
240 CharDriverState *chr = qtest_chr;
241 irq_levels[n] = level;
242 qtest_send_prefix(chr);
243 qtest_sendf(chr, "IRQ %s %d\n",
244 level ? "raise" : "lower", n);
248 static void qtest_process_command(CharDriverState *chr, gchar **words)
250 const gchar *command;
261 fprintf(qtest_log_fp, "[R +" FMT_timeval "]",
262 (long) tv.tv_sec, (long) tv.tv_usec);
263 for (i = 0; words[i]; i++) {
264 fprintf(qtest_log_fp, " %s", words[i]);
266 fprintf(qtest_log_fp, "\n");
270 if (strcmp(words[0], "irq_intercept_out") == 0
271 || strcmp(words[0], "irq_intercept_in") == 0) {
276 dev = DEVICE(object_resolve_path(words[1], NULL));
278 qtest_send_prefix(chr);
279 qtest_send(chr, "FAIL Unknown device\n");
283 if (irq_intercept_dev) {
284 qtest_send_prefix(chr);
285 if (irq_intercept_dev != dev) {
286 qtest_send(chr, "FAIL IRQ intercept already enabled\n");
288 qtest_send(chr, "OK\n");
293 QLIST_FOREACH(ngl, &dev->gpios, node) {
294 /* We don't support intercept of named GPIOs yet */
298 if (words[0][14] == 'o') {
300 for (i = 0; i < ngl->num_out; ++i) {
301 qemu_irq *disconnected = g_new0(qemu_irq, 1);
302 qemu_irq icpt = qemu_allocate_irq(qtest_irq_handler,
305 *disconnected = qdev_intercept_gpio_out(dev, icpt,
309 qemu_irq_intercept_in(ngl->in, qtest_irq_handler,
313 irq_intercept_dev = dev;
314 qtest_send_prefix(chr);
315 qtest_send(chr, "OK\n");
317 } else if (strcmp(words[0], "outb") == 0 ||
318 strcmp(words[0], "outw") == 0 ||
319 strcmp(words[0], "outl") == 0) {
323 g_assert(words[1] && words[2]);
324 addr = strtoul(words[1], NULL, 0);
325 value = strtoul(words[2], NULL, 0);
327 if (words[0][3] == 'b') {
328 cpu_outb(addr, value);
329 } else if (words[0][3] == 'w') {
330 cpu_outw(addr, value);
331 } else if (words[0][3] == 'l') {
332 cpu_outl(addr, value);
334 qtest_send_prefix(chr);
335 qtest_send(chr, "OK\n");
336 } else if (strcmp(words[0], "inb") == 0 ||
337 strcmp(words[0], "inw") == 0 ||
338 strcmp(words[0], "inl") == 0) {
340 uint32_t value = -1U;
343 addr = strtoul(words[1], NULL, 0);
345 if (words[0][2] == 'b') {
346 value = cpu_inb(addr);
347 } else if (words[0][2] == 'w') {
348 value = cpu_inw(addr);
349 } else if (words[0][2] == 'l') {
350 value = cpu_inl(addr);
352 qtest_send_prefix(chr);
353 qtest_sendf(chr, "OK 0x%04x\n", value);
354 } else if (strcmp(words[0], "writeb") == 0 ||
355 strcmp(words[0], "writew") == 0 ||
356 strcmp(words[0], "writel") == 0 ||
357 strcmp(words[0], "writeq") == 0) {
361 g_assert(words[1] && words[2]);
362 addr = strtoull(words[1], NULL, 0);
363 value = strtoull(words[2], NULL, 0);
365 if (words[0][5] == 'b') {
366 uint8_t data = value;
367 cpu_physical_memory_write(addr, &data, 1);
368 } else if (words[0][5] == 'w') {
369 uint16_t data = value;
371 cpu_physical_memory_write(addr, &data, 2);
372 } else if (words[0][5] == 'l') {
373 uint32_t data = value;
375 cpu_physical_memory_write(addr, &data, 4);
376 } else if (words[0][5] == 'q') {
377 uint64_t data = value;
379 cpu_physical_memory_write(addr, &data, 8);
381 qtest_send_prefix(chr);
382 qtest_send(chr, "OK\n");
383 } else if (strcmp(words[0], "readb") == 0 ||
384 strcmp(words[0], "readw") == 0 ||
385 strcmp(words[0], "readl") == 0 ||
386 strcmp(words[0], "readq") == 0) {
388 uint64_t value = UINT64_C(-1);
391 addr = strtoull(words[1], NULL, 0);
393 if (words[0][4] == 'b') {
395 cpu_physical_memory_read(addr, &data, 1);
397 } else if (words[0][4] == 'w') {
399 cpu_physical_memory_read(addr, &data, 2);
400 value = tswap16(data);
401 } else if (words[0][4] == 'l') {
403 cpu_physical_memory_read(addr, &data, 4);
404 value = tswap32(data);
405 } else if (words[0][4] == 'q') {
406 cpu_physical_memory_read(addr, &value, 8);
409 qtest_send_prefix(chr);
410 qtest_sendf(chr, "OK 0x%016" PRIx64 "\n", value);
411 } else if (strcmp(words[0], "read") == 0) {
412 uint64_t addr, len, i;
415 g_assert(words[1] && words[2]);
416 addr = strtoull(words[1], NULL, 0);
417 len = strtoull(words[2], NULL, 0);
419 data = g_malloc(len);
420 cpu_physical_memory_read(addr, data, len);
422 qtest_send_prefix(chr);
423 qtest_send(chr, "OK 0x");
424 for (i = 0; i < len; i++) {
425 qtest_sendf(chr, "%02x", data[i]);
427 qtest_send(chr, "\n");
430 } else if (strcmp(words[0], "b64read") == 0) {
435 g_assert(words[1] && words[2]);
436 addr = strtoull(words[1], NULL, 0);
437 len = strtoull(words[2], NULL, 0);
439 data = g_malloc(len);
440 cpu_physical_memory_read(addr, data, len);
441 b64_data = g_base64_encode(data, len);
442 qtest_send_prefix(chr);
443 qtest_sendf(chr, "OK %s\n", b64_data);
447 } else if (strcmp(words[0], "write") == 0) {
448 uint64_t addr, len, i;
452 g_assert(words[1] && words[2] && words[3]);
453 addr = strtoull(words[1], NULL, 0);
454 len = strtoull(words[2], NULL, 0);
456 data_len = strlen(words[3]);
458 qtest_send(chr, "ERR invalid argument size\n");
462 data = g_malloc(len);
463 for (i = 0; i < len; i++) {
464 if ((i * 2 + 4) <= data_len) {
465 data[i] = hex2nib(words[3][i * 2 + 2]) << 4;
466 data[i] |= hex2nib(words[3][i * 2 + 3]);
471 cpu_physical_memory_write(addr, data, len);
474 qtest_send_prefix(chr);
475 qtest_send(chr, "OK\n");
476 } else if (strcmp(words[0], "b64write") == 0) {
482 g_assert(words[1] && words[2] && words[3]);
483 addr = strtoull(words[1], NULL, 0);
484 len = strtoull(words[2], NULL, 0);
486 data_len = strlen(words[3]);
488 qtest_send(chr, "ERR invalid argument size\n");
492 data = g_base64_decode_inplace(words[3], &out_len);
493 if (out_len != len) {
494 qtest_log_send("b64write: data length mismatch (told %"PRIu64", "
497 out_len = MIN(out_len, len);
500 cpu_physical_memory_write(addr, data, out_len);
502 qtest_send_prefix(chr);
503 qtest_send(chr, "OK\n");
504 } else if (qtest_enabled() && strcmp(words[0], "clock_step") == 0) {
508 ns = strtoll(words[1], NULL, 0);
510 ns = qemu_clock_deadline_ns_all(QEMU_CLOCK_VIRTUAL);
512 qtest_clock_warp(qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL) + ns);
513 qtest_send_prefix(chr);
514 qtest_sendf(chr, "OK %"PRIi64"\n",
515 (int64_t)qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL));
516 } else if (qtest_enabled() && strcmp(words[0], "clock_set") == 0) {
520 ns = strtoll(words[1], NULL, 0);
521 qtest_clock_warp(ns);
522 qtest_send_prefix(chr);
523 qtest_sendf(chr, "OK %"PRIi64"\n",
524 (int64_t)qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL));
526 qtest_send_prefix(chr);
527 qtest_sendf(chr, "FAIL Unknown command '%s'\n", words[0]);
531 static void qtest_process_inbuf(CharDriverState *chr, GString *inbuf)
535 while ((end = strchr(inbuf->str, '\n')) != NULL) {
540 offset = end - inbuf->str;
542 cmd = g_string_new_len(inbuf->str, offset);
543 g_string_erase(inbuf, 0, offset + 1);
545 words = g_strsplit(cmd->str, " ", 0);
546 qtest_process_command(chr, words);
549 g_string_free(cmd, TRUE);
553 static void qtest_read(void *opaque, const uint8_t *buf, int size)
555 CharDriverState *chr = opaque;
557 g_string_append_len(inbuf, (const gchar *)buf, size);
558 qtest_process_inbuf(chr, inbuf);
561 static int qtest_can_read(void *opaque)
566 static void qtest_event(void *opaque, int event)
571 case CHR_EVENT_OPENED:
573 * We used to call qemu_system_reset() here, hoping we could
574 * use the same process for multiple tests that way. Never
575 * used. Injects an extra reset even when it's not used, and
576 * that can mess up tests, e.g. -boot once.
578 for (i = 0; i < ARRAY_SIZE(irq_levels); i++) {
581 qemu_gettimeofday(&start_time);
584 fprintf(qtest_log_fp, "[I " FMT_timeval "] OPENED\n",
585 (long) start_time.tv_sec, (long) start_time.tv_usec);
588 case CHR_EVENT_CLOSED:
589 qtest_opened = false;
593 fprintf(qtest_log_fp, "[I +" FMT_timeval "] CLOSED\n",
594 (long) tv.tv_sec, (long) tv.tv_usec);
602 static int qtest_init_accel(MachineState *ms)
604 QemuOpts *opts = qemu_opts_create(qemu_find_opts("icount"), NULL, 0,
606 qemu_opt_set(opts, "shift", "0", &error_abort);
607 configure_icount(opts, &error_abort);
612 void qtest_init(const char *qtest_chrdev, const char *qtest_log, Error **errp)
614 CharDriverState *chr;
616 chr = qemu_chr_new("qtest", qtest_chrdev, NULL);
619 error_setg(errp, "Failed to initialize device for qtest: \"%s\"",
625 if (strcmp(qtest_log, "none") != 0) {
626 qtest_log_fp = fopen(qtest_log, "w+");
629 qtest_log_fp = stderr;
632 qemu_chr_add_handlers(chr, qtest_can_read, qtest_read, qtest_event, chr);
633 qemu_chr_fe_set_echo(chr, true);
635 inbuf = g_string_new("");
639 bool qtest_driver(void)
644 static void qtest_accel_class_init(ObjectClass *oc, void *data)
646 AccelClass *ac = ACCEL_CLASS(oc);
648 ac->available = qtest_available;
649 ac->init_machine = qtest_init_accel;
650 ac->allowed = &qtest_allowed;
653 #define TYPE_QTEST_ACCEL ACCEL_CLASS_NAME("qtest")
655 static const TypeInfo qtest_accel_type = {
656 .name = TYPE_QTEST_ACCEL,
657 .parent = TYPE_ACCEL,
658 .class_init = qtest_accel_class_init,
661 static void qtest_type_init(void)
663 type_register_static(&qtest_accel_type);
666 type_init(qtest_type_init);