1 /**********************************************************************
2 Copyright (c) Imagination Technologies Ltd.
4 Permission is hereby granted, free of charge, to any person obtaining a copy
5 of this software and associated documentation files (the "Software"), to deal
6 in the Software without restriction, including without limitation the rights
7 to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
8 copies of the Software, and to permit persons to whom the Software is
9 furnished to do so, subject to the following conditions:
11 The above copyright notice and this permission notice shall be included in
12 all copies or substantial portions of the Software.
14 THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15 IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16 FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
17 AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
18 LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
19 OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
21 ******************************************************************************/
23 #if defined(DEBUG) || defined (INTERNAL_TEST)
24 #define DEBUG_SET_OFFSET OPTIONS_BIT0
25 #define OPTIONS_BIT0 0x1
27 #define OPTIONS_BIT0 0x0
30 #if defined(PDUMP) || defined (INTERNAL_TEST)
31 #define PDUMP_SET_OFFSET OPTIONS_BIT1
32 #define OPTIONS_BIT1 (0x1 << 1)
34 #define OPTIONS_BIT1 0x0
37 #if defined(PVRSRV_USSE_EDM_STATUS_DEBUG) || defined (INTERNAL_TEST)
38 #define PVRSRV_USSE_EDM_STATUS_DEBUG_SET_OFFSET OPTIONS_BIT2
39 #define OPTIONS_BIT2 (0x1 << 2)
41 #define OPTIONS_BIT2 0x0
44 #if defined(SUPPORT_HW_RECOVERY) || defined (INTERNAL_TEST)
45 #define SUPPORT_HW_RECOVERY_SET_OFFSET OPTIONS_BIT3
46 #define OPTIONS_BIT3 (0x1 << 3)
48 #define OPTIONS_BIT3 0x0
53 #if defined(PVR_SECURE_HANDLES) || defined (INTERNAL_TEST)
54 #define PVR_SECURE_HANDLES_SET_OFFSET OPTIONS_BIT4
55 #define OPTIONS_BIT4 (0x1 << 4)
57 #define OPTIONS_BIT4 0x0
60 #if defined(SGX_BYPASS_SYSTEM_CACHE) || defined (INTERNAL_TEST)
61 #define SGX_BYPASS_SYSTEM_CACHE_SET_OFFSET OPTIONS_BIT5
62 #define OPTIONS_BIT5 (0x1 << 5)
64 #define OPTIONS_BIT5 0x0
67 #if defined(SGX_DMS_AGE_ENABLE) || defined (INTERNAL_TEST)
68 #define SGX_DMS_AGE_ENABLE_SET_OFFSET OPTIONS_BIT6
69 #define OPTIONS_BIT6 (0x1 << 6)
71 #define OPTIONS_BIT6 0x0
74 #if defined(SGX_FAST_DPM_INIT) || defined (INTERNAL_TEST)
75 #define SGX_FAST_DPM_INIT_SET_OFFSET OPTIONS_BIT8
76 #define OPTIONS_BIT8 (0x1 << 8)
78 #define OPTIONS_BIT8 0x0
81 #if defined(SGX_FEATURE_DCU) || defined (INTERNAL_TEST)
82 #define SGX_FEATURE_DCU_SET_OFFSET OPTIONS_BIT9
83 #define OPTIONS_BIT9 (0x1 << 9)
85 #define OPTIONS_BIT9 0x0
88 #if defined(SGX_FEATURE_MP) || defined (INTERNAL_TEST)
89 #define SGX_FEATURE_MP_SET_OFFSET OPTIONS_BIT10
90 #define OPTIONS_BIT10 (0x1 << 10)
92 #define OPTIONS_BIT10 0x0
95 #if defined(SGX_FEATURE_MULTITHREADED_UKERNEL) || defined (INTERNAL_TEST)
96 #define SGX_FEATURE_MULTITHREADED_UKERNEL_SET_OFFSET OPTIONS_BIT11
97 #define OPTIONS_BIT11 (0x1 << 11)
99 #define OPTIONS_BIT11 0x0
104 #if defined(SGX_FEATURE_OVERLAPPED_SPM) || defined (INTERNAL_TEST)
105 #define SGX_FEATURE_OVERLAPPED_SPM_SET_OFFSET OPTIONS_BIT12
106 #define OPTIONS_BIT12 (0x1 << 12)
108 #define OPTIONS_BIT12 0x0
112 #if defined(SGX_FEATURE_SYSTEM_CACHE) || defined (INTERNAL_TEST)
113 #define SGX_FEATURE_SYSTEM_CACHE_SET_OFFSET OPTIONS_BIT13
114 #define OPTIONS_BIT13 (0x1 << 13)
116 #define OPTIONS_BIT13 0x0
119 #if defined(SGX_SUPPORT_HWPROFILING) || defined (INTERNAL_TEST)
120 #define SGX_SUPPORT_HWPROFILING_SET_OFFSET OPTIONS_BIT14
121 #define OPTIONS_BIT14 (0x1 << 14)
123 #define OPTIONS_BIT14 0x0
128 #if defined(SUPPORT_ACTIVE_POWER_MANAGEMENT) || defined (INTERNAL_TEST)
129 #define SUPPORT_ACTIVE_POWER_MANAGEMENT_SET_OFFSET OPTIONS_BIT15
130 #define OPTIONS_BIT15 (0x1 << 15)
132 #define OPTIONS_BIT15 0x0
135 #if defined(SUPPORT_DISPLAYCONTROLLER_TILING) || defined (INTERNAL_TEST)
136 #define SUPPORT_DISPLAYCONTROLLER_TILING_SET_OFFSET OPTIONS_BIT16
137 #define OPTIONS_BIT16 (0x1 << 16)
139 #define OPTIONS_BIT16 0x0
142 #if defined(SUPPORT_PERCONTEXT_PB) || defined (INTERNAL_TEST)
143 #define SUPPORT_PERCONTEXT_PB_SET_OFFSET OPTIONS_BIT17
144 #define OPTIONS_BIT17 (0x1 << 17)
146 #define OPTIONS_BIT17 0x0
149 #if defined(SUPPORT_SGX_HWPERF) || defined (INTERNAL_TEST)
150 #define SUPPORT_SGX_HWPERF_SET_OFFSET OPTIONS_BIT18
151 #define OPTIONS_BIT18 (0x1 << 18)
153 #define OPTIONS_BIT18 0x0
158 #if defined(SUPPORT_SGX_MMU_DUMMY_PAGE) || defined (INTERNAL_TEST)
159 #define SUPPORT_SGX_MMU_DUMMY_PAGE_SET_OFFSET OPTIONS_BIT19
160 #define OPTIONS_BIT19 (0x1 << 19)
162 #define OPTIONS_BIT19 0x0
165 #if defined(SUPPORT_SGX_PRIORITY_SCHEDULING) || defined (INTERNAL_TEST)
166 #define SUPPORT_SGX_PRIORITY_SCHEDULING_SET_OFFSET OPTIONS_BIT20
167 #define OPTIONS_BIT20 (0x1 << 20)
169 #define OPTIONS_BIT20 0x0
172 #if defined(SGX_LOW_LATENCY_SCHEDULING) || defined (INTERNAL_TEST)
173 #define SUPPORT_SGX_LOW_LATENCY_SCHEDULING_SET_OFFSET OPTIONS_BIT21
174 #define OPTIONS_BIT21 (0x1 << 21)
176 #define OPTIONS_BIT21 0x0
179 #if defined(USE_SUPPORT_NO_TA3D_OVERLAP) || defined (INTERNAL_TEST)
180 #define USE_SUPPORT_NO_TA3D_OVERLAP_SET_OFFSET OPTIONS_BIT22
181 #define OPTIONS_BIT22 (0x1 << 22)
183 #define OPTIONS_BIT22 0x0
187 #if defined(SGX_FEATURE_MP) || defined (INTERNAL_TEST)
188 #define OPTIONS_HIGHBYTE ((SGX_FEATURE_MP_CORE_COUNT-1) << SGX_FEATURE_MP_CORE_COUNT_SET_OFFSET)
189 #define SGX_FEATURE_MP_CORE_COUNT_SET_OFFSET 28UL
190 #define SGX_FEATURE_MP_CORE_COUNT_SET_MASK 0xFF
192 #define OPTIONS_HIGHBYTE 0x0
197 #define SGX_BUILD_OPTIONS \