3 #include <asm/arch/sci_types.h>
4 #include <asm/arch/ldo.h>
5 //#include <asm/arch/chip_x35/sprd_reg_ap_apb.h>
7 /******************************************************************************
9 ******************************************************************************/
10 #define ADI_CLK_DIV (0X40030000 + 0x0000) //(0x82000000 + 0x0000)
11 #define ADI_CTL_REG (0x40030000 + 0x0004) //(0x82000000 + 0x0004)
12 #define ADI_CHANNEL_PRI (0x40030000 + 0x0008) //(0x82000000 + 0x0008)
13 #define ADI_INT_EN (0x40030000 + 0x000C)
14 #define ADI_INT_RAW_STS (0x40030000 + 0x0010)
15 #define ADI_INT_MASK_STS (0x40030000 + 0x0014)
16 #define ADI_INT_CLR (0x40030000 + 0x0018)
17 #define ADI_ARM_RD_CMD (0x40030000 + 0x0024)
18 #define ADI_RD_DATA (0x40030000 + 0x0028)
19 #define ADI_FIFO_STS (0x40030000 + 0x002C)
20 #define ADI_STS (0x40030000 + 0x0030)
21 #define ADI_REQ_STS (0x40030000 + 0x0034)
23 #define GR_GEN0 (0x4B000000+ 0x0008) //(0x8B000000 + 0x0008)
24 #define GR_SOFT_RST (0x4B000000+ 0x004C) //(0x8B000000 + 0x004C)
25 #define GR_CLK_GEN5 (0x4B000000 + 0x007C) //(0x8B000000 + 0x007C)
27 /* TODO : temp work , need to rearrange */
28 #if defined(CONFIG_SC9630)
29 #define AHB_CTRL0 (0x20E00000)
30 #define AHB_SOFT_RST (0x20E00004)
31 #define USB_PHY_CTRL (0x20E0+0x3020)
33 #define AHB_CTRL0 (0x20D00000)
34 #define AHB_SOFT_RST (0x20D00004)
35 #define USB_PHY_CTRL (0x71300000+0x3000)
36 //#define USB_PHY_CTRL (AHB_REG_BASE + 0xA0)
38 #define AHB_CONTROL_REG3 (0x2090020c)
39 #define LDO_PD_CTRL (0x82000000 + 0x0610)
40 #define APB_POWER_CONTROL (0x402E0000 +0x60)
41 #define ADI_EB (0x00000040)
42 #define CLK_USB_REF_EN (0x00000040)
43 #define CLK_USB_REF_SEL (0x00000002)
44 #define USB_M_HBIGENDIAN (0x00000004)
45 #define USBPHY_SOFT_RST (0x00000080)
46 #define USBD_EN (0x00000020)
47 #define LDO_BPUSBH (0x00000001)
48 #define LDO_BPUSBH_RST (0x00000002)
49 #define ADI_SOFT_RST (0x00400000)
50 #define ARM_SERCLK_EN (0x00000002)
52 #define mdelay(_ms) udelay(_ms*1000)
55 static void ADIConfig(void)
57 *(volatile uint32 *)GR_GEN0 |= ADI_EB;
58 *(volatile uint32 *)GR_SOFT_RST |= ADI_SOFT_RST;
61 for(wait=0;wait<50;wait++);
63 *(volatile uint32 *)GR_SOFT_RST &= ~ADI_SOFT_RST;
64 *(volatile uint32 *)ADI_CTL_REG &= ~ARM_SERCLK_EN;
65 *(volatile uint32 *)ADI_CHANNEL_PRI &=(0x00005555);
68 static unsigned int ADIAnalogdieRegRead(unsigned long addr)
74 *(uint32 *) ADI_ARM_RD_CMD = addr;
77 adi_rd_data = *(uint32 *) ADI_RD_DATA;
82 }while(adi_rd_data & 0x80000000);
83 return((uint16) (adi_rd_data & 0xFFFF));
85 static unsigned int ADIAnalogdieRegWrite(unsigned long addr,uint16 data)
92 status = *(uint32 *) ADI_FIFO_STS;
102 *(uint32 *) addr = data;
107 static void USBLdoEnable(unsigned char is_usb_lod_enabled)
111 if(is_usb_lod_enabled) {
112 ret = LDO_TurnOnLDO(LDO_LDO_USB);
113 printf("%s: sabin Enable, LDO_LDO_USB no is %d, ret = %d \n", __func__, LDO_LDO_USB, ret);
115 ret = LDO_TurnOffLDO(LDO_LDO_USB);
116 printf("%s: sabin Disable, LDO_LDO_USB, no is %d ret = %d \n", __func__, LDO_LDO_USB, ret);
120 static void usb_enable_module(int en)
123 *(uint32 *) APB_POWER_CONTROL &= 0xFFFFFFFE;
124 *(uint32 *) AHB_CTRL0 |= BIT_4;
126 *(uint32 *) APB_POWER_CONTROL |= 0x01;
127 *(uint32 *) AHB_CTRL0 &= ~BIT_4;
131 void usb_power_on(void)
133 printf("%s : enter\n", __func__);
135 *(volatile uint32 *) USB_PHY_CTRL = 0x4407ae33;
137 usb_enable_module(1); //SEL_INDIA_pankaj.s4
138 mdelay(10); //SEL_INDIA_pankaj.s4
140 USBLdoEnable(0); //USB LDO turn on //SEL_INDIA_pankaj.s4
142 USBLdoEnable(1); //USB LDO turn on //SEL_INDIA_pankaj.s4
144 *(volatile uint32 *) AHB_CTRL0 |= BIT_4; //SEL_INDIA_pankaj.s4
145 *(uint32 *) AHB_SOFT_RST |= (BIT_5|BIT_6|BIT_7); //SEL_INDIA_pankaj.s4
146 mdelay(10); //SEL_INDIA_pankaj.s4
147 *(uint32 *) AHB_SOFT_RST &= ~(BIT_5|BIT_6|BIT_7); //SEL_INDIA_pankaj.s4
148 *(uint32 *) AHB_CTRL0 |= BIT_4; //SEL_INDIA_pankaj.s4
151 printf("End of usb_power_on \n");
155 void usb_power_off(void)
157 usb_enable_module(0);