1 #include "normal_mode.h"
2 #include "calibration_detect.h"
5 #include <asm/arch/sprd_reg.h>
6 #ifdef CONFIG_ARCH_SCX35L //only for sharkL branch modem boot process
7 #include <asm/arch/cp_boot.h>
9 #if defined(CONFIG_OF_LIBFDT)
11 #include <fdt_support.h>
15 #include "tizen_misc.h"
19 DECLARE_GLOBAL_DATA_PTR;
21 //#define SPRD_BM_UBOOT_SET
22 #define FACTORY_PART "prodnv"
23 #define CMDLINE_BUF_SIZE (1024)
25 unsigned spl_data_buf[0x2000] __attribute__ ((align(4))) = {
28 unsigned harsh_data_buf[8] __attribute__ ((align(4))) = {
31 void *spl_data = spl_data_buf;
32 void *harsh_data = harsh_data_buf;
33 unsigned char raw_header[8192];
34 const int SP09_MAX_PHASE_BUFF_SIZE = sizeof(SP09_PHASE_CHECK_T);
35 unsigned int g_charger_mode = 0;
36 unsigned int g_recovery_mode = 0;
37 char serial_number_to_transfer[SP09_MAX_SN_LEN];
39 extern int charger_connected(void);
41 extern void *lcd_base;
42 #ifdef CONFIG_OF_LIBFDT
43 static char boot_cmd[64];
46 #ifdef SPRD_BM_UBOOT_SET
48 * sprd_bm_set_uboot_reg - set uboot bus monitor reg
49 * How to use this interface.:
50 * 1. set the channel config you want to monitor the mem, e.g, channel 0-9, bm_cnt=0, bm_cnt<10.
51 * 2. set the addr range, e.g 80000000-90000000,
52 * 0x30040008 + bm_cnt * 0x10000) = 0x80000000;
53 * 0x3004000C + bm_cnt * 0x10000) = 0x90000000;
54 * 3. if you want mask the addr, just like the following code.
55 * 4. please do not change others reg.
56 * 5. if you make this config active, you must disable the bus monitor in kernel side.
58 static void sprd_bm_set_uboot_reg(void)
61 for (bm_cnt = 0; bm_cnt < 10; bm_cnt++) {
62 //if((bm_cnt == 5)||(bm_cnt == 6))//||(bm_cnt == 0)||(bm_cnt == 1)||(bm_cnt == 3))
64 *(volatile u32 *)(0x30040000 + bm_cnt * 0x10000) = 0x20000001;
65 *(volatile u32 *)(0x30040000 + bm_cnt * 0x10000) = 0x10000001;
66 *(volatile u32 *)(0x30040004 + bm_cnt * 0x10000) = 0x00000003;
67 *(volatile u32 *)(0x30040008 + bm_cnt * 0x10000) = 0x00620000;
68 *(volatile u32 *)(0x3004000c + bm_cnt * 0x10000) = 0x077ffffc;
69 *(volatile u32 *)(0x30040010 + bm_cnt * 0x10000) = 0xC0000000;
70 *(volatile u32 *)(0x30040014 + bm_cnt * 0x10000) = 0x0FFFFFFF;
71 *(volatile u32 *)(0x30040018 + bm_cnt * 0x10000) = 0x0FFFFFFF;
72 *(volatile u32 *)(0x3004001c + bm_cnt * 0x10000) = 0x00000000;
73 *(volatile u32 *)(0x30040020 + bm_cnt * 0x10000) = 0x00000000;
74 *(volatile u32 *)(0x30040024 + bm_cnt * 0x10000) = 0x00000000;
75 *(volatile u32 *)(0x30040028 + bm_cnt * 0x10000) = 0x00000000;
76 *(volatile u32 *)(0x3004002c + bm_cnt * 0x10000) = 0x00000000;
77 *(volatile u32 *)(0x30040030 + bm_cnt * 0x10000) = 0x00000000;
78 *(volatile u32 *)(0x30040034 + bm_cnt * 0x10000) = 0x00000000;
79 *(volatile u32 *)(0x30040038 + bm_cnt * 0x10000) = 0x00000000;
80 *(volatile u32 *)(0x3004003c + bm_cnt * 0x10000) = 0x00000000;
81 *(volatile u32 *)(0x30040040 + bm_cnt * 0x10000) = 0x00000000;
86 unsigned short calc_checksum(unsigned char *dat, unsigned long len)
88 unsigned short num = 0;
89 unsigned long chkSum = 0;
91 num = (unsigned short)(*dat);
93 num |= (((unsigned short)(*dat)) << 8);
95 chkSum += (unsigned long)num;
101 chkSum = (chkSum >> 16) + (chkSum & 0xffff);
102 chkSum += (chkSum >> 16);
106 unsigned char _chkNVEcc(uint8_t * buf, uint32_t size, uint32_t checksum)
110 crc = calc_checksum(buf, size);
111 debugf("_chkNVEcc calcout 0x%lx, org 0x%llx\n", crc, checksum);
112 return (crc == (uint16_t) checksum);
115 #ifdef CONFIG_SECURE_BOOT
116 //#define PRIMPUKPATH "/dev/block/mmcblk0boot0"
117 //#define PRIMPUKSTART 512
118 //#define PRIMPUKLEN 260
119 void fdt_secureboot_param(fdt_blob)
124 buf = malloc(CMDLINE_BUF_SIZE);
125 memset(buf, 0, CMDLINE_BUF_SIZE);
128 str_len = strlen(buf);
129 sprintf(&buf[str_len], " primpukpath=%s", PRIMPUKPATH); //"/dev/block/mmcblk0boot0");
130 str_len = strlen(buf);
134 str_len = strlen(buf);
135 sprintf(&buf[str_len], " primpukstart=%d", PRIMPUKSTART); //512);
136 str_len = strlen(buf);
140 str_len = strlen(buf);
141 sprintf(&buf[str_len], " primpuklen=%d", PRIMPUKLEN); //260);
142 str_len = strlen(buf);
145 /*hash write by pc tool,but the hash value calculated by u-boot */
146 /*if rom secure enable,do not need cal spl hash and pass to kernel */
147 if (!secureboot_enabled()) {
149 int ret = get_spl_hash(harsh_data);
151 str_len = strlen(buf);
152 sprintf(&buf[str_len], " securesha1=%08x%08x%08x%08x%08x", *(uint32_t *) harsh_data, *(uint32_t *) (harsh_data + 4),
153 *(uint32_t *) (harsh_data + 8), *(uint32_t *) (harsh_data + 12), *(uint32_t *) (harsh_data + 16));
154 str_len = strlen(buf);
158 fdt_chosen_bootargs_append(fdt_blob, buf, 1);
163 int fdt_fixup_for_tizen(void *fdt)
166 unsigned char uid[16];
167 int ret, nodeoffset, str_len;
173 /* Tizen default cmdline: mem */
174 ptr += sprintf(ptr, CMDLINE_DEFAULT_TIZEN);
176 #ifdef CONFIG_RAMDISK_BOOT
178 ptr += sprintf(ptr, " bootmode=recovery");
180 ptr += sprintf(ptr, " root=/dev/ram0 rw initrd=0x%x,%dM",
181 RAMDISK_ADR, RAMDISK_SIZE_MB);
183 val = tizen_get_part_num(PARTS_ROOTFS);
184 ptr += sprintf(ptr, " root=/dev/mmcblk0p%d ro rootfstype=ext4 rootwait", val);
185 ptr += sprintf(ptr, " initrd=0x%x,0x%x", RAMDISK_ADR, 0);
188 ptr += sprintf(ptr, " lcd_id=ID%06x", load_lcd_id_to_kernel());
189 ptr += sprintf(ptr, " lcd_base=%x", CONFIG_FB_RAM_BASE);
191 ptr += sprintf(ptr, " mtp_offset=%s", load_mtp_offset_to_kernel());
192 ptr += sprintf(ptr, " elvss_offset=0x%x", load_elvss_offset_to_kernel());
193 ptr += sprintf(ptr, " hbm_offset=%s", load_hbm_offset_to_kernel());
195 ptr += sprintf(ptr, " wfixnv=0x%x,0x%x", WFIXNV_ADR, FIXNV_SIZE);
196 ptr += sprintf(ptr, " wruntimenv=0x%x,0x%x", WRUNTIMENV_ADR, RUNTIMENV_SIZE);
198 switch (check_pm_status()) {
200 ptr += sprintf(ptr, " systemd.unit=charging-mode.target");
201 /* Write Charger state */
202 *(volatile unsigned int *)0xFC8 = 0x03;
203 sprdchg_start_charge();
205 case PM_STATE_NORMAL:
207 if (!g_recovery_mode) {
208 #ifdef CONFIG_RAMDISK_BOOT
209 ptr += sprintf(ptr, " bootmode=ramdisk");
211 ptr += sprintf(ptr, " bootmode=normal");
215 thor_save_env("normal");
217 s = getenv("hw_revision");
219 val = (u32) simple_strtoul(s, NULL, 10);
222 ptr += sprintf(ptr, " hw_revision=%d", val);
224 s = getenv("muic_rustproof");
226 val = (u32) simple_strtoul(s, NULL, 10);
229 ptr += sprintf(ptr, " muic_rustproof=%d", val);
231 s = getenv("dbg_level");
232 if (s && (*s == 'a')) {
233 ptr += sprintf(ptr, " sec_debug.enable=1");
234 ptr += sprintf(ptr, " sec_debug.enable_user=0");
235 } else if (s && (*s == 'h')) {
236 ptr += sprintf(ptr, " sec_debug.enable=1");
237 ptr += sprintf(ptr, " sec_debug.enable_user=1");
238 } else if (s && (*s == 'm')) {
239 ptr += sprintf(ptr, " sec_debug.enable=1");
240 ptr += sprintf(ptr, " sec_debug.enable_user=0");
242 ptr += sprintf(ptr, " sec_debug.enable=0");
243 ptr += sprintf(ptr, " sec_debug.enable_user=0");
246 if (tizen_get_jig_state() == 2) {
247 s = getenv("console");
248 if (s && (*s == 'o'))
249 ptr += sprintf(ptr, " console=ttyS1,115200n8 loglevel=7");
251 ptr += sprintf(ptr, " console=ram loglevel=0");
253 ptr += sprintf(ptr, " console=ram loglevel=0");
256 s = getenv("sec_log");
257 if (s && (*s == 'o')) {
258 if (s = getenv("sec_log_addr")) {
259 val = (u32) simple_strtoul(s, NULL, 16);
260 ptr += sprintf(ptr, " sec_log=0x%x@0x%x", SEC_LOG_LENGTH, val);
264 ptr += sprintf(ptr, " bootloader.ver=%s", CONFIG_BOOTLOADER_VER);
266 s = getenv("emmc_checksum");
268 val = (u32) simple_strtoul(s, NULL, 10);
272 ptr += sprintf(ptr, " tizenboot.emmc_checksum=%d", val);
274 ptr += sprintf(ptr, " mem_cs=%d, mem_cs0_sz=%08x",get_dram_cs_number(), get_dram_cs0_size());
276 /* TODO: connie, cordon */
278 /* toss ddi value for sysscope */
279 // set_system_info(CONFIG_MODEL_NAME, CONFIG_OPERATOR, CONFIG_REGION, VT_SPRD, 16);
280 // ptr += sprintf(ptr, " connie=%s", get_conniecmdline_value());
281 // ptr += sprintf(ptr, " cordon=%s", get_ddicmdline_value());
283 tizen_get_emmc_serial_number((unsigned int *)uid);
284 ptr += sprintf(ptr, " tizenboot.serialno=%x%08x",
285 *(unsigned int *)(uid + 8), *(unsigned int *)(uid + 12));
287 /* if is uart calibraton, remove ttys1 console */
288 if (is_calibration_by_uart())
293 ptr += sprintf(ptr, " calmode=%d", is_calibration_by_uart());
294 ptr += sprintf(ptr, " fgu_init=%d,%d", get_fgu_vol(), get_fgu_cur());
296 str_len = strlen(buf);
299 nodeoffset = fdt_path_offset (fdt, "/chosen");
300 ret = fdt_setprop_string(fdt, nodeoffset, "bootargs", buf);
305 /*FDT_ADD_SIZE used to describe the size of the new bootargs items*/
306 /*include lcd id, lcd base, etc*/
307 #define FDT_ADD_SIZE (1024)
308 static int start_linux()
310 void (*theKernel) (int zero, int arch, u32 params);
311 u32 exec_at = (u32) - 1;
312 u32 parm_at = (u32) - 1;
316 boot_img_hdr *hdr = raw_header;
319 machine_type = machine_arch_type; /* get machine type */
320 machine_type = 2014; /* get machine type */
321 theKernel = (void (*)(int, int, u32))KERNEL_ADR; /* set the kernel address */
322 #if !(defined(CONFIG_SC8830) || defined(CONFIG_SC9630))
323 *(volatile u32 *)0x84001000 = 'j';
324 *(volatile u32 *)0x84001000 = 'm';
325 *(volatile u32 *)0x84001000 = 'p';
328 #ifdef CONFIG_OF_LIBFDT
329 fdt_blob = (u8 *) DT_ADR;
330 if (fdt_check_header(fdt_blob) != 0) {
331 printk("image is not a fdt\n");
333 fdt_size = fdt_totalsize(fdt_blob);
335 err = fdt_open_into(fdt_blob, fdt_blob, fdt_size + FDT_ADD_SIZE);
337 printf("libfdt fdt_open_into(): %s\n", fdt_strerror(err));
348 fdt_fixup_for_tizen(fdt_blob);
349 #ifdef CONFIG_EMMC_BOOT
353 theKernel(0, machine_type, (unsigned long)fdt_blob);
355 #endif /* CONFIG_TIZEN */
358 // fdt_initrd_norsvmem(fdt_blob, RAMDISK_ADR, RAMDISK_ADR + hdr->ramdisk_size, 1);
359 fdt_fixup_lcdid(fdt_blob);
360 fdt_fixup_lcdbase(fdt_blob);
361 fdt_fixup_calibration_parameter(fdt_blob);
362 fdt_fixup_serialno(fdt_blob);
363 fdt_fixup_adc_calibration_data(fdt_blob);
364 fdt_fixup_dram_training(fdt_blob);
365 fdt_fixup_ddr_size(fdt_blob);
366 #ifdef CONFIG_SECURE_BOOT
367 fdt_secureboot_param(fdt_blob);
369 #ifndef CONFIG_EMMC_BOOT
370 fdt_fixup_mtd(fdt_blob);
372 debugf("start_linux boot_cmd: %s\n", boot_cmd);
373 fdt_fixup_boot_mode(fdt_blob, boot_cmd);
374 fdt_fixup_boot_ram_log(fdt_blob);
375 fdt_fixup_chosen_bootargs_board_private(fdt_blob, boot_cmd);
376 #ifdef SPRD_BM_UBOOT_SET
377 sprd_bm_set_uboot_reg();
381 #ifdef CONFIG_EMMC_BOOT
384 theKernel(0, machine_type, (unsigned long)fdt_blob);
385 #else /* CONFIG_OF_LIBFDT */
388 #ifdef CONFIG_EMMC_BOOT
391 theKernel(0, machine_type, DT_ADR); /* jump to kernel with register set */
398 void set_recovery_mode(unsigned int recovery_mode)
400 g_recovery_mode = recovery_mode;
403 void lcd_display_logo(int backlight_set, ulong bmp_img, size_t size)
405 #define mdelay(t) ({unsigned long msec=(t); while (msec--) { udelay(1000);}}) //LiWei add
406 #ifdef CONFIG_SPLASH_SCREEN
407 extern int lcd_display_bitmap(ulong bmp_image, int x, int y);
408 extern void lcd_display(void);
409 extern void *lcd_base;
410 extern void Dcache_CleanRegion(unsigned int addr, unsigned int length);
411 extern void set_backlight(uint32_t value);
412 if (backlight_set == BACKLIGHT_ON) {
413 lcd_display_bitmap((ulong) bmp_img, 0, 0);
414 #if defined(CONFIG_SC8810) || defined(CONFIG_SC8825) || defined(CONFIG_SC8830) || defined(CONFIG_SC9630)
415 Dcache_CleanRegion((unsigned int)(lcd_base), size << 1); //Size is to large.
418 #ifdef CONFIG_SC8830_LVDS
419 mdelay(50); //LiWei add
424 memset((unsigned int)lcd_base, 0, size);
425 #if defined(CONFIG_SC8810) || defined(CONFIG_SC8825) || defined(CONFIG_SC8830) || defined(CONFIG_SC9630)
426 Dcache_CleanRegion((unsigned int)(lcd_base), size << 1); //Size is to large.
435 char factorymode_falg[8] = { 0 };
438 if (do_fs_file_read(FACTORY_PART, "/factorymode.file", factorymode_falg, 8))
440 debugf("Checking factorymode : factorymode_falg = %s \n", factorymode_falg);
441 if (!strcmp(factorymode_falg, "1"))
445 debugf("Checking factorymode : ret = %d \n", ret);
449 char *get_product_sn(void)
451 SP09_PHASE_CHECK_T phase_check;
453 memset(serial_number_to_transfer, 0x0, SP09_MAX_SN_LEN);
455 strcpy(serial_number_to_transfer, "0123456789ABCDEF");
456 if (do_raw_data_read(PRODUCTINFO_FILE_PATITION, sizeof(phase_check), 0, (char *)&phase_check)) {
457 debugf("%s: read miscdata error.\n", __func__);
458 return serial_number_to_transfer;
461 if ((phase_check.Magic == SP09_SPPH_MAGIC_NUMBER) && strlen(phase_check.SN1)) {
462 memcpy(serial_number_to_transfer, phase_check.SN1, SP09_MAX_SN_LEN);
465 return serial_number_to_transfer;
468 #ifdef CONFIG_OF_LIBFDT
469 static char *set_boot_mode(char *cmdline)
471 char *boot_mode_p = NULL;
473 memset(boot_cmd, 0, 64);
474 boot_mode_p = strstr(cmdline, "androidboot");
476 if (strlen(boot_mode_p) > 64) {
477 debugf("boot mode too long\n");
480 strcpy(boot_cmd, boot_mode_p);
482 debugf("CONFIG_OF_LIBFDT cmdline %s boot_cmd %s\n", cmdline, boot_cmd);
486 int cmdline_lte_mode(char *buf, int str_len)
488 int offset = str_len;
489 #ifdef CONFIG_SUPPORT_TDLTE
490 offset += sprintf(buf + offset, " ltemode=tcsfb");
491 #elif defined CONFIG_SUPPORT_WLTE
492 offset += sprintf(buf + offset, " ltemode=fcsfb");
493 #elif defined CONFIG_SUPPORT_LTE
494 offset += sprintf(buf + offset, " ltemode=lcsfb");
502 int cmdline_fixup_lcd(char *buf, int str_len)
504 extern uint32_t load_lcd_id_to_kernel();
509 lcd_id = load_lcd_id_to_kernel();
512 offset += sprintf(buf + offset, " lcd_id=ID");
513 offset += sprintf(buf + offset, "%x", lcd_id);
515 if (lcd_base != NULL) {
516 //add lcd frame buffer base, length should be lcd w*h*2(RGB565)
517 offset += sprintf(buf + offset, " lcd_base=");
518 offset += sprintf(buf + offset, "%x", lcd_base);
525 #ifdef USB_PHY_TUNE_VALUE
526 int cmdline_fixup_usb_phy_tune(char *buf, int str_len)
528 /*transfer this value to kernel usb_hw.c */
529 int offset = str_len;
531 offset += sprintf(buf + offset, " usb_phy_tune=");
532 offset += sprintf(buf + offset, "%x", USB_PHY_TUNE_VALUE);
533 //buf[offset] = '\0';
538 int cmdline_fixup_factorymode(char *buf, int str_len)
540 int offset = str_len;
542 if (1 == is_factorymode()) {
543 offset += sprintf(buf + offset, " factory=1");
549 #if defined( CONFIG_AP_ADC_CALIBRATION)||defined(CONFIG_SC8830)||defined(CONFIG_SC9630)||(defined(CONFIG_SC8825) && (!(BOOT_NATIVE_LINUX)))
550 int cmdline_fixup_adc_data(char *buf, int str_len)
552 extern int read_adc_calibration_data(char *buffer, int size);
553 extern void CHG_SetADCCalTbl(unsigned int *adc_data);
554 int offset = str_len;
555 unsigned int *adc_data;
557 adc_data = malloc(64);
559 memset(adc_data, 0, 64);
560 if (0 < read_adc_calibration_data(adc_data, 48)) {
561 if (((adc_data[2] & 0xffff) < 4500) && ((adc_data[2] & 0xffff) > 3000) &&
562 ((adc_data[3] & 0xffff) < 4500) && ((adc_data[3] & 0xffff) > 3000)) {
563 offset += sprintf(buf + offset, " adc_cal=%d,%d", adc_data[2], adc_data[3]);
565 /*just after fgu adc calibration,and no aux adc calibration,need save fgu adc parameters */
566 if ((0x00000002 == adc_data[10]) && (0x00000002 & adc_data[11])) {
567 offset += sprintf(buf + offset, " fgu_cal=%d,%d,%d", adc_data[4], adc_data[5], adc_data[6]);
569 #if (defined(CONFIG_SC8825) && (!(BOOT_NATIVE_LINUX)))
570 CHG_SetADCCalTbl(adc_data);
581 int cmdline_fixup_harsh_data(char *buf, int str_len)
583 int offset = str_len;
585 if (0 != read_spldata()) {
586 debugf("read_spldata failed\n");
590 if (harsh_data == NULL) {
591 debugf("harsh_data malloc failed\n");
595 debugf("spl_data adr 0x%x harsh_data adr 0x%x\n", spl_data, harsh_data);
596 if (cal_md5(spl_data, CONFIG_SPL_LOAD_LEN, harsh_data)) {
597 offset += sprintf(buf + offset, " securemd5=%08x%08x%08x%08x", *(uint32_t *) harsh_data, *(uint32_t *) (harsh_data + 4),
598 *(uint32_t *) (harsh_data + 8), *(uint32_t *) (harsh_data + 12));
603 int cmdline_fixup_serialno(char *buf, int str_len)
606 char *sn = get_product_sn();
609 offset += sprintf(buf + offset, " androidboot.serialno=%s", sn ? sn : "0123456789ABCDEF");
614 #if defined(CONFIG_SC8830) || (defined CONFIG_SC9630)
615 int cmdline_fixup_fgu(char *buf, int str_len)
617 extern unsigned int fgu_cur;
618 extern unsigned int fgu_vol;
622 offset += sprintf(buf + offset, " fgu_init=%d,%d", fgu_vol, fgu_cur);
628 int cmdline_fixup_apct_param(char *buf, int str_len)
630 extern long long lcd_init_time;
631 extern long long load_image_time;
635 offset += sprintf(buf + offset, " lcd_init=%lld", lcd_init_time);
636 offset += sprintf(buf + offset, " load_image=%lld", load_image_time);
637 offset += sprintf(buf + offset, " pl_t=%lld", get_ticks());
643 void cmdline_set_cp_cmdline(char *buf, int str_len)
646 #ifdef CONFIG_SUPPORT_TD
647 nv_info = (char *)(((volatile u32 *)CALIBRATION_FLAG));
648 sprintf(nv_info, buf);
649 nv_info[str_len] = '\0';
650 debugf("nv_info:[%08x]%s \n", nv_info, nv_info);
652 #ifdef CONFIG_SUPPORT_W
653 nv_info = (char *)((volatile u32 *)CALIBRATION_FLAG_WCDMA);
654 sprintf(nv_info, buf);
655 nv_info[str_len] = '\0';
656 debugf("nv_info:[%08x]%s \n", nv_info, nv_info);
659 #ifdef CONFIG_CP0_ARM0_BOOT
660 nv_info = (char *)(((volatile u32 *)CALIBRATION_FLAG_CP0));
661 sprintf(nv_info, buf);
662 nv_info[str_len] = '\0';
663 debugf("nv_info:[%08x]%s \n", nv_info, nv_info);
665 nv_info = (char *)(((volatile u32 *)CALIBRATION_FLAG_CP1));
666 sprintf(nv_info, buf);
667 nv_info[str_len] = '\0';
668 debugf("nv_info:[%08x]%s \n", nv_info, nv_info);
672 int creat_cmdline(char *cmdline, boot_img_hdr * hdr)
678 if (cmdline == NULL) {
681 buf = malloc(CMDLINE_BUF_SIZE);
682 memset(buf, 0, CMDLINE_BUF_SIZE);
684 #ifdef CONFIG_OF_LIBFDT
685 if (set_boot_mode(cmdline)) {
686 if (cmdline && cmdline[0]) {
687 offset += sprintf(buf, " %s", cmdline);
689 #ifdef CONFIG_AP_VERSION
690 offset += sprintf(buf + offset, " apv=\"%s\"", CONFIG_AP_VERSION);
692 offset = cmdline_lte_mode(buf, offset);
693 cmdline_set_cp_cmdline(buf, offset);
707 // offset += sprintf(buf, "initrd=0x%x,0x%x", RAMDISK_ADR, hdr->ramdisk_size);
709 /* preset loop_per_jiffy */
710 #ifdef CONFIG_LOOP_PER_JIFFY
711 offset += sprintf(buf + offset, " lpj=%d", CONFIG_LOOP_PER_JIFFY);
713 #ifdef CONFIG_AP_VERSION
714 offset += sprintf(buf + offset, " apv=\"%s\"", CONFIG_AP_VERSION);
716 if (cmdline && cmdline[0]) {
717 offset += sprintf(buf + offset, " %s", cmdline);
720 offset = cmdline_fixup_lcd(buf, offset);
722 #ifdef USB_PHY_TUNE_VALUE
723 offset = cmdline_fixup_usb_phy_tune(buf, offset);
725 offset = cmdline_fixup_factorymode(buf, offset);
726 offset += sprintf(buf + offset, " no_console_suspend");
727 #ifdef CONFIG_RAM_CONSOLE
728 /* Fill ram log base address and size to cmdline.
729 It will be used when assigning reserve memory in kernel and dump ram log*/
730 offset += sprintf(buf + offset, " boot_ram_log=%#010x,%#x", CONFIG_RAM_CONSOLE_START, CONFIG_RAM_CONSOLE_SIZE);
732 offset = cmdline_fixup_serialno(buf, offset);
733 ret = cmdline_fixup_harsh_data(buf, offset);
739 #if defined(CONFIG_AP_ADC_CALIBRATION)||defined(CONFIG_SC8830) || defined(CONFIG_SC9630) || (defined(CONFIG_SC8825) && (!(BOOT_NATIVE_LINUX)))
740 offset = cmdline_fixup_adc_data(buf, offset);
741 #if defined(CONFIG_SC8830)
742 offset = cmdline_fixup_fgu(buf, offset);
744 offset = cmdline_fixup_apct_param(buf, offset);
746 cmdline_set_cp_cmdline(buf, offset);
748 debugf("cmdline_len = %d \n pass cmdline: %s \n", strlen(buf), buf);
749 creat_atags(VLX_TAG_ADDR, buf, NULL, 0);
760 /*down the device if charger disconnect during calibration detect. */
761 if (g_charger_mode && !charger_connected()) {
763 power_down_devices();
766 #if !(defined CONFIG_SC8810 || defined CONFIG_TIGER || defined CONFIG_SC8830) || (defined CONFIG_SC9630)
767 MMU_InvalideICACHEALL();
770 #if (defined CONFIG_SC8810) || (defined CONFIG_SC8825) || (defined CONFIG_SC8830) || (defined CONFIG_SC9630)
774 #ifdef REBOOT_FUNCTION_INUBOOT
778 #if BOOT_NATIVE_LINUX
781 void (*entry) (void) = (void *)VMJALUNA_ADR;
786 void normal_mode(void)
788 #if defined (CONFIG_SC8810) || defined (CONFIG_SC8825) || defined (CONFIG_SC8830) || (defined CONFIG_SC9630)
789 //MMU_Init(CONFIG_MMU_TABLE_ADDR);
794 #ifndef UART_CONSOLE_SUPPORT
795 #ifdef CONFIG_SC7710G2
796 extern int serial1_SwitchToModem(void);
797 serial1_SwitchToModem();
801 #if BOOT_NATIVE_LINUX
802 vlx_nand_boot(BOOT_PART, CONFIG_BOOTARGS, BACKLIGHT_ON);
804 vlx_nand_boot(BOOT_PART, NULL, BACKLIGHT_ON);
808 void calibration_mode(void)
810 debugf("calibration_mode\n");
811 #if defined(BOOT_NATIVE_LINUX_MODEM)
812 vlx_nand_boot(RECOVERY_PART,calibration_cmd_buf, BACKLIGHT_OFF);
814 vlx_nand_boot(BOOT_PART, calibration_cmd_buf, BACKLIGHT_OFF);
817 void autotest_mode(void)
819 debugf("autotest_mode\n");
820 vlx_nand_boot(BOOT_PART, calibration_cmd_buf, BACKLIGHT_OFF);
823 void special_mode(void)
825 debugf("special_mode\n");
826 #if BOOT_NATIVE_LINUX
827 vlx_nand_boot(BOOT_PART, CONFIG_BOOTARGS " androidboot.mode=special", BACKLIGHT_OFF);
829 vlx_nand_boot(BOOT_PART, "androidboot.mode=special", BACKLIGHT_OFF);
837 #if BOOT_NATIVE_LINUX
838 vlx_nand_boot(BOOT_PART, CONFIG_BOOTARGS " androidboot.mode=iq", BACKLIGHT_OFF);
840 vlx_nand_boot(BOOT_PART, " androidboot.mode=iq", BACKLIGHT_OFF);
845 #ifdef CONFIG_GENERIC_MMC
846 #define MODEM_MEMORY_NAME "modem_memory.log"
847 #define MODEM_MEMORY_SIZE (22 * 1024 * 1024)
849 #define MODEM_MEMORY_ADDR 0
850 #elif defined (CONFIG_SC8825) || defined (CONFIG_TIGER) || defined(CONFIG_SC8830) || (defined CONFIG_SC9630)
851 #define MODEM_MEMORY_ADDR 0x80000000
854 void watchdog_mode(void)
856 debugf("watchdog_mode\n");
857 #if BOOT_NATIVE_LINUX
858 vlx_nand_boot(BOOT_PART, CONFIG_BOOTARGS " androidboot.mode=wdgreboot", BACKLIGHT_OFF);
860 vlx_nand_boot(BOOT_PART, "androidboot.mode=wdgreboot", BACKLIGHT_OFF);
864 void unknow_reboot_mode(void)
866 debugf("unknow_reboot_mode\n");
867 #if BOOT_NATIVE_LINUX
868 vlx_nand_boot(BOOT_PART, CONFIG_BOOTARGS " androidboot.mode=unknowreboot", BACKLIGHT_OFF);
870 vlx_nand_boot(BOOT_PART, "androidboot.mode=unknowreboot", BACKLIGHT_OFF);
874 void panic_reboot_mode(void)
876 debugf("%s\n", __func__);
877 #if BOOT_NATIVE_LINUX
878 vlx_nand_boot(BOOT_PART, CONFIG_BOOTARGS " androidboot.mode=panic", BACKLIGHT_OFF);
880 vlx_nand_boot(BOOT_PART, "androidboot.mode=panic", BACKLIGHT_OFF);
884 #if BOOT_NATIVE_LINUX_MODEM
886 void sipc_addr_reset()
889 memset((void *)SIPC_APCP_START_ADDR, 0x0, SIPC_APCP_RESET_ADDR_SIZE);
890 #elif defined (CONFIG_SC8830)
891 #if defined(CONFIG_SUPPORT_TD) || defined(CONFIG_SC9620OPENPHONE) || defined(CONFIG_SC9620FPGA)
892 memset((void *)SIPC_TD_APCP_START_ADDR, 0x0, SIPC_APCP_RESET_ADDR_SIZE);
894 #elif defined(CONFIG_SUPPORT_W)
896 memset((void *)SIPC_WCDMA_APCP_START_ADDR, 0x0, SIPC_APCP_RESET_ADDR_SIZE);
898 #ifndef CONFIG_NOT_BOOT_TD_MODEM
899 memset((void *)SIPC_TD_APCP_START_ADDR, 0x0, SIPC_APCP_RESET_ADDR_SIZE);
901 #ifndef CONFIG_NOT_BOOT_W_MODEM
902 memset((void *)SIPC_WCDMA_APCP_START_ADDR, 0x0, SIPC_APCP_RESET_ADDR_SIZE);
905 #ifdef CONFIG_SP8830WCN
906 memset((void *)SIPC_WCN_APCP_START_ADDR, 0x0, SIPC_APCP_RESET_ADDR_SIZE);
911 #ifdef CONFIG_CP0_ARM0_BOOT
912 memset((void *)SIPC_GGE_APCP_START_ADDR, 0x0, SIPC_APCP_RESET_ADDR_SIZE);
914 memset((void *)SIPC_LTE_APCP_START_ADDR, 0x0, SIPC_APCP_RESET_ADDR_SIZE);
915 memset((void *)SIPC_PMIC_APCP_START_ADDR, 0x0, SIPC_APCP_RESET_ADDR_SIZE);