1 // SPDX-License-Identifier: GPL-2.0+
4 * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
9 #include <asm/global_data.h>
13 * General observations:
14 * o The recommended test sequence is to test the data lines: if they are
15 * broken, nothing else will work properly. Then test the address
16 * lines. Finally, test the cells in the memory now that the test
17 * program knows that the address and data lines work properly.
18 * This sequence also helps isolate and identify what is faulty.
20 * o For the address line test, it is a good idea to use the base
21 * address of the lowest memory location, which causes a '1' bit to
22 * walk through a field of zeros on the address lines and the highest
23 * memory location, which causes a '0' bit to walk through a field of
24 * '1's on the address line.
26 * o Floating buses can fool memory tests if the test routine writes
27 * a value and then reads it back immediately. The problem is, the
28 * write will charge the residual capacitance on the data bus so the
29 * bus retains its state briefely. When the test program reads the
30 * value back immediately, the capacitance of the bus can allow it
31 * to read back what was written, even though the memory circuitry
32 * is broken. To avoid this, the test program should write a test
33 * pattern to the target location, write a different pattern elsewhere
34 * to charge the residual capacitance in a differnt manner, then read
35 * the target location back.
37 * o Always read the target location EXACTLY ONCE and save it in a local
38 * variable. The problem with reading the target location more than
39 * once is that the second and subsequent reads may work properly,
40 * resulting in a failed test that tells the poor technician that
41 * "Memory error at 00000000, wrote aaaaaaaa, read aaaaaaaa" which
42 * doesn't help him one bit and causes puzzled phone calls. Been there,
47 * This tests data lines for shorts and opens by forcing adjacent data
48 * to opposite states. Because the data lines could be routed in an
49 * arbitrary manner the must ensure test patterns ensure that every case
50 * is tested. By using the following series of binary patterns every
51 * combination of adjacent bits is test regardless of routing.
53 * ...101010101010101010101010
54 * ...110011001100110011001100
55 * ...111100001111000011110000
56 * ...111111110000000011111111
58 * Carrying this out, gives us six hex patterns as follows:
67 * To test for short and opens to other signals on our boards, we
68 * simply test with the 1's complemnt of the paterns as well, resulting
69 * in twelve patterns total.
71 * After writing a test pattern. a special pattern 0x0123456789ABCDEF is
72 * written to a different address in case the data lines are floating.
73 * Thus, if a byte lane fails, you will see part of the special
74 * pattern in that byte lane when the test runs. For example, if the
75 * xx__xxxxxxxxxxxx byte line fails, you will see aa23aaaaaaaaaaaa
76 * (for the 'a' test pattern).
80 * This function performs a test to verify that all the address lines
81 * hooked up to the RAM work properly. If there is an address line
82 * fault, it usually shows up as two different locations in the address
83 * map (related by the faulty address line) mapping to one physical
84 * memory storage location. The artifact that shows up is writing to
85 * the first location "changes" the second location.
87 * To test all address lines, we start with the given base address and
88 * xor the address with a '1' bit to flip one address line. For each
89 * test, we shift the '1' bit left to test the next address line.
91 * In the actual code, we start with address sizeof(ulong) since our
92 * test pattern we use is a ulong and thus, if we tried to test lower
93 * order address bits, it wouldn't work because our pattern would
96 * Example for a 4 bit address space with the base at 0000:
102 * Example for a 4 bit address space with the base at 0010:
105 * 0000 <- (below the base address, skipped)
109 * The test locations are successively tested to make sure that they are
110 * not "mirrored" onto the base address due to a faulty address line.
111 * Note that the base and each test location are related by one address
112 * line flipped. Note that the base address need not be all zeros.
116 * These tests verify RAM using sequential writes and reads
117 * to/from RAM. There are several test cases that use different patterns to
118 * verify RAM. Each test case fills a region of RAM with one pattern and
119 * then reads the region back and compares its contents with the pattern.
120 * The following patterns are used:
122 * 1a) zero pattern (0x00000000)
123 * 1b) negative pattern (0xffffffff)
124 * 1c) checkerboard pattern (0x55555555)
125 * 1d) checkerboard pattern (0xaaaaaaaa)
126 * 2) bit-flip pattern ((1 << (offset % 32))
127 * 3) address pattern (offset)
128 * 4) address pattern (~offset)
130 * Being run in normal mode, the test verifies only small 4Kb
131 * regions of RAM around each 1Mb boundary. For example, for 64Mb
132 * RAM the following areas are verified: 0x00000000-0x00000800,
133 * 0x000ff800-0x00100800, 0x001ff800-0x00200800, ..., 0x03fff800-
134 * 0x04000000. If the test is run in slow-test mode, it verifies
139 #include <watchdog.h>
141 #if CONFIG_POST & (CONFIG_SYS_POST_MEMORY | CONFIG_SYS_POST_MEM_REGIONS)
143 DECLARE_GLOBAL_DATA_PTR;
146 * Define INJECT_*_ERRORS for testing error detection in the presence of
149 #undef INJECT_DATA_ERRORS
150 #undef INJECT_ADDRESS_ERRORS
152 #ifdef INJECT_DATA_ERRORS
153 #warning "Injecting data line errors for testing purposes"
156 #ifdef INJECT_ADDRESS_ERRORS
157 #warning "Injecting address line errors for testing purposes"
162 * This function performs a double word move from the data at
163 * the source pointer to the location at the destination pointer.
164 * This is helpful for testing memory on processors which have a 64 bit
167 * On those PowerPC with FPU, use assembly and a floating point move:
168 * this does a 64 bit move.
170 * For other processors, let the compiler generate the best code it can.
172 static void move64(const unsigned long long *src, unsigned long long *dest)
178 * This is 64 bit wide test patterns. Note that they reside in ROM
179 * (which presumably works) and the tests write them to RAM which may
182 * The "otherpattern" is written to drive the data bus to values other
183 * than the test pattern. This is for detecting floating bus lines.
186 const static unsigned long long pattern[] = {
187 0xaaaaaaaaaaaaaaaaULL,
188 0xccccccccccccccccULL,
189 0xf0f0f0f0f0f0f0f0ULL,
190 0xff00ff00ff00ff00ULL,
191 0xffff0000ffff0000ULL,
192 0xffffffff00000000ULL,
193 0x00000000ffffffffULL,
194 0x0000ffff0000ffffULL,
195 0x00ff00ff00ff00ffULL,
196 0x0f0f0f0f0f0f0f0fULL,
197 0x3333333333333333ULL,
198 0x5555555555555555ULL
200 const unsigned long long otherpattern = 0x0123456789abcdefULL;
203 static int memory_post_dataline(unsigned long long * pmem)
205 unsigned long long temp64 = 0;
206 int num_patterns = ARRAY_SIZE(pattern);
208 unsigned int hi, lo, pathi, patlo;
211 for ( i = 0; i < num_patterns; i++) {
212 move64(&(pattern[i]), pmem++);
214 * Put a different pattern on the data lines: otherwise they
215 * may float long enough to read back what we wrote.
217 move64(&otherpattern, pmem--);
218 move64(pmem, &temp64);
220 #ifdef INJECT_DATA_ERRORS
221 temp64 ^= 0x00008000;
224 if (temp64 != pattern[i]){
225 pathi = (pattern[i]>>32) & 0xffffffff;
226 patlo = pattern[i] & 0xffffffff;
228 hi = (temp64>>32) & 0xffffffff;
229 lo = temp64 & 0xffffffff;
231 post_log("Memory (data line) error at %08x, "
232 "wrote %08x%08x, read %08x%08x !\n",
233 pmem, pathi, patlo, hi, lo);
240 static int memory_post_addrline(ulong *testaddr, ulong *base, ulong size)
248 end = (ulong *)((ulong)base + size); /* pointer arith! */
250 for(xor = sizeof(ulong); xor > 0; xor <<= 1) {
251 target = (ulong *)((ulong)testaddr ^ xor);
252 if((target >= base) && (target < end)) {
253 *testaddr = ~*target;
256 #ifdef INJECT_ADDRESS_ERRORS
257 if(xor == 0x00008000) {
258 readback = *testaddr;
261 if(readback == *testaddr) {
262 post_log("Memory (address line) error at %08x<->%08x, "
263 "XOR value %08x !\n",
264 testaddr, target, xor);
272 static int memory_post_test1(unsigned long start,
277 ulong *mem = (ulong *) start;
281 for (i = 0; i < size / sizeof (ulong); i++) {
287 for (i = 0; i < size / sizeof (ulong) && !ret; i++) {
289 if (readback != val) {
290 post_log("Memory error at %08x, "
291 "wrote %08x, read %08x !\n",
292 mem + i, val, readback);
304 static int memory_post_test2(unsigned long start, unsigned long size)
307 ulong *mem = (ulong *) start;
311 for (i = 0; i < size / sizeof (ulong); i++) {
312 mem[i] = 1 << (i % 32);
317 for (i = 0; i < size / sizeof (ulong) && !ret; i++) {
319 if (readback != (1 << (i % 32))) {
320 post_log("Memory error at %08x, "
321 "wrote %08x, read %08x !\n",
322 mem + i, 1 << (i % 32), readback);
334 static int memory_post_test3(unsigned long start, unsigned long size)
337 ulong *mem = (ulong *) start;
341 for (i = 0; i < size / sizeof (ulong); i++) {
347 for (i = 0; i < size / sizeof (ulong) && !ret; i++) {
350 post_log("Memory error at %08x, "
351 "wrote %08x, read %08x !\n",
352 mem + i, i, readback);
364 static int memory_post_test4(unsigned long start, unsigned long size)
367 ulong *mem = (ulong *) start;
371 for (i = 0; i < size / sizeof (ulong); i++) {
377 for (i = 0; i < size / sizeof (ulong) && !ret; i++) {
379 if (readback != ~i) {
380 post_log("Memory error at %08x, "
381 "wrote %08x, read %08x !\n",
382 mem + i, ~i, readback);
394 static int memory_post_test_lines(unsigned long start, unsigned long size)
398 ret = memory_post_dataline((unsigned long long *)start);
401 ret = memory_post_addrline((ulong *)start, (ulong *)start,
405 ret = memory_post_addrline((ulong *)(start+size-8),
406 (ulong *)start, size);
412 static int memory_post_test_patterns(unsigned long start, unsigned long size)
416 ret = memory_post_test1(start, size, 0x00000000);
419 ret = memory_post_test1(start, size, 0xffffffff);
422 ret = memory_post_test1(start, size, 0x55555555);
425 ret = memory_post_test1(start, size, 0xaaaaaaaa);
428 ret = memory_post_test2(start, size);
431 ret = memory_post_test3(start, size);
434 ret = memory_post_test4(start, size);
440 static int memory_post_test_regions(unsigned long start, unsigned long size)
445 for (i = 0; i < (size >> 20) && (!ret); i++) {
447 ret = memory_post_test_patterns(start + (i << 20),
450 ret = memory_post_test_patterns(start + (i << 20) +
457 static int memory_post_tests(unsigned long start, unsigned long size)
461 ret = memory_post_test_lines(start, size);
463 ret = memory_post_test_patterns(start, size);
469 * !! this is only valid, if you have contiguous memory banks !!
471 __attribute__((weak))
472 int arch_memory_test_prepare(u32 *vstart, u32 *size, phys_addr_t *phys_offset)
474 struct bd_info *bd = gd->bd;
476 *vstart = CONFIG_SYS_SDRAM_BASE;
477 *size = (gd->ram_size >= 256 << 20 ?
478 256 << 20 : gd->ram_size) - (1 << 20);
480 /* Limit area to be tested with the board info struct */
481 if ((*vstart) + (*size) > (ulong)bd)
482 *size = (ulong)bd - *vstart;
487 __attribute__((weak))
488 int arch_memory_test_advance(u32 *vstart, u32 *size, phys_addr_t *phys_offset)
493 __attribute__((weak))
494 int arch_memory_test_cleanup(u32 *vstart, u32 *size, phys_addr_t *phys_offset)
499 __attribute__((weak))
500 void arch_memory_failure_handle(void)
505 int memory_regions_post_test(int flags)
508 phys_addr_t phys_offset = 0;
511 arch_memory_test_prepare(&vstart, &memsize, &phys_offset);
513 ret = memory_post_test_lines(vstart, memsize);
515 ret = memory_post_test_regions(vstart, memsize);
520 int memory_post_test(int flags)
523 phys_addr_t phys_offset = 0;
526 arch_memory_test_prepare(&vstart, &memsize, &phys_offset);
529 if (flags & POST_SLOWTEST) {
530 ret = memory_post_tests(vstart, memsize);
531 } else { /* POST_NORMAL */
532 ret = memory_post_test_regions(vstart, memsize);
535 !arch_memory_test_advance(&vstart, &memsize, &phys_offset));
537 arch_memory_test_cleanup(&vstart, &memsize, &phys_offset);
539 arch_memory_failure_handle();
544 #endif /* CONFIG_POST&(CONFIG_SYS_POST_MEMORY|CONFIG_SYS_POST_MEM_REGIONS) */