3 * MIPS Technologies, Inc., California.
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6 * modification, are permitted provided that the following conditions
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9 * notice, this list of conditions and the following disclaimer.
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13 * 3. Neither the name of the MIPS Technologies, Inc., nor the names of its
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15 * this software without specific prior written permission.
17 * THIS SOFTWARE IS PROVIDED BY THE MIPS TECHNOLOGIES, INC. ``AS IS'' AND
18 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
19 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
20 * ARE DISCLAIMED. IN NO EVENT SHALL THE MIPS TECHNOLOGIES, INC. BE LIABLE
21 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
22 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
23 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
24 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
25 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
26 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
29 * Author: Nemanja Lukic (nlukic@mips.com)
32 #ifndef PIXMAN_MIPS_DSPR2_ASM_H
33 #define PIXMAN_MIPS_DSPR2_ASM_H
70 * LEAF_MIPS32R2 - declare leaf routine for MIPS32r2
72 #define LEAF_MIPS32R2(symbol) \
75 .type symbol, @function; \
77 symbol: .frame sp, 0, ra; \
84 * LEAF_MIPS32R2 - declare leaf routine for MIPS DSPr2
86 #define LEAF_MIPS_DSPR2(symbol) \
87 LEAF_MIPS32R2(symbol) \
91 * END - mark end of function
93 #define END(function) \
96 .size function,.-function
99 * Checks if stack offset is big enough for storing/restoring regs_num
100 * number of register to/from stack. Stack offset must be greater than
101 * or equal to the number of bytes needed for storing registers (regs_num*4).
102 * Since MIPS ABI allows usage of first 16 bytes of stack frame (this is
103 * preserved for input arguments of the functions, already stored in a0-a3),
104 * stack size can be further optimized by utilizing this space.
106 .macro CHECK_STACK_OFFSET regs_num, stack_offset
107 .if \stack_offset < \regs_num * 4 - 16
108 .error "Stack offset too small."
113 * Saves set of registers on stack. Maximum number of registers that
114 * can be saved on stack is limitted to 14 (a0-a3, v0-v1 and s0-s7).
115 * Stack offset is number of bytes that are added to stack pointer (sp)
116 * before registers are pushed in order to provide enough space on stack
117 * (offset must be multiple of 4, and must be big enough, as described by
118 * CHECK_STACK_OFFSET macro). This macro is intended to be used in
119 * combination with RESTORE_REGS_FROM_STACK macro. Example:
120 * SAVE_REGS_ON_STACK 4, v0, v1, s0, s1
121 * RESTORE_REGS_FROM_STACK 4, v0, v1, s0, s1
123 .macro SAVE_REGS_ON_STACK stack_offset = 0, r1, \
124 r2 = 0, r3 = 0, r4 = 0, \
125 r5 = 0, r6 = 0, r7 = 0, \
126 r8 = 0, r9 = 0, r10 = 0, \
127 r11 = 0, r12 = 0, r13 = 0, \
129 .if (\stack_offset < 0) || (\stack_offset - (\stack_offset / 4) * 4)
130 .error "Stack offset must be pozitive and multiple of 4."
132 .if \stack_offset != 0
133 addiu sp, sp, -\stack_offset
146 CHECK_STACK_OFFSET 5, \stack_offset
150 CHECK_STACK_OFFSET 6, \stack_offset
154 CHECK_STACK_OFFSET 7, \stack_offset
158 CHECK_STACK_OFFSET 8, \stack_offset
162 CHECK_STACK_OFFSET 9, \stack_offset
166 CHECK_STACK_OFFSET 10, \stack_offset
170 CHECK_STACK_OFFSET 11, \stack_offset
174 CHECK_STACK_OFFSET 12, \stack_offset
178 CHECK_STACK_OFFSET 13, \stack_offset
182 CHECK_STACK_OFFSET 14, \stack_offset
188 * Restores set of registers from stack. Maximum number of registers that
189 * can be restored from stack is limitted to 14 (a0-a3, v0-v1 and s0-s7).
190 * Stack offset is number of bytes that are added to stack pointer (sp)
191 * after registers are restored (offset must be multiple of 4, and must
192 * be big enough, as described by CHECK_STACK_OFFSET macro). This macro is
193 * intended to be used in combination with RESTORE_REGS_FROM_STACK macro.
195 * SAVE_REGS_ON_STACK 4, v0, v1, s0, s1
196 * RESTORE_REGS_FROM_STACK 4, v0, v1, s0, s1
198 .macro RESTORE_REGS_FROM_STACK stack_offset = 0, r1, \
199 r2 = 0, r3 = 0, r4 = 0, \
200 r5 = 0, r6 = 0, r7 = 0, \
201 r8 = 0, r9 = 0, r10 = 0, \
202 r11 = 0, r12 = 0, r13 = 0, \
204 .if (\stack_offset < 0) || (\stack_offset - (\stack_offset/4)*4)
205 .error "Stack offset must be pozitive and multiple of 4."
218 CHECK_STACK_OFFSET 5, \stack_offset
222 CHECK_STACK_OFFSET 6, \stack_offset
226 CHECK_STACK_OFFSET 7, \stack_offset
230 CHECK_STACK_OFFSET 8, \stack_offset
234 CHECK_STACK_OFFSET 9, \stack_offset
238 CHECK_STACK_OFFSET 10, \stack_offset
242 CHECK_STACK_OFFSET 11, \stack_offset
246 CHECK_STACK_OFFSET 12, \stack_offset
250 CHECK_STACK_OFFSET 13, \stack_offset
254 CHECK_STACK_OFFSET 14, \stack_offset
257 .if \stack_offset != 0
258 addiu sp, sp, \stack_offset
263 * Conversion of single r5g6b5 pixel (in_565) to single a8r8g8b8 pixel
264 * returned in (out_8888) register. Requires two temporary registers
265 * (scratch1 and scratch2).
267 .macro CONVERT_1x0565_TO_1x8888 in_565, \
270 lui \out_8888, 0xff00
271 sll \scratch1, \in_565, 0x3
272 andi \scratch2, \scratch1, 0xff
273 ext \scratch1, \in_565, 0x2, 0x3
274 or \scratch1, \scratch2, \scratch1
275 or \out_8888, \out_8888, \scratch1
277 sll \scratch1, \in_565, 0x5
278 andi \scratch1, \scratch1, 0xfc00
279 srl \scratch2, \in_565, 0x1
280 andi \scratch2, \scratch2, 0x300
281 or \scratch2, \scratch1, \scratch2
282 or \out_8888, \out_8888, \scratch2
284 andi \scratch1, \in_565, 0xf800
285 srl \scratch2, \scratch1, 0x5
286 andi \scratch2, \scratch2, 0xff00
287 or \scratch1, \scratch1, \scratch2
288 sll \scratch1, \scratch1, 0x8
289 or \out_8888, \out_8888, \scratch1
293 * Conversion of two r5g6b5 pixels (in1_565 and in2_565) to two a8r8g8b8 pixels
294 * returned in (out1_8888 and out2_8888) registers. Requires four scratch
295 * registers (scratch1 ... scratch4). It also requires maskG and maskB for
296 * color component extractions. These masks must have following values:
297 * li maskG, 0x07e007e0
298 * li maskB, 0x001F001F
300 .macro CONVERT_2x0565_TO_2x8888 in1_565, in2_565, \
301 out1_8888, out2_8888, \
303 scratch1, scratch2, scratch3, scratch4
304 sll \scratch1, \in1_565, 16
305 or \scratch1, \scratch1, \in2_565
306 lui \out2_8888, 0xff00
307 ori \out2_8888, \out2_8888, 0xff00
308 shrl.ph \scratch2, \scratch1, 11
309 and \scratch3, \scratch1, \maskG
310 shra.ph \scratch4, \scratch2, 2
311 shll.ph \scratch2, \scratch2, 3
312 shll.ph \scratch3, \scratch3, 5
313 or \scratch2, \scratch2, \scratch4
314 shrl.qb \scratch4, \scratch3, 6
315 or \out2_8888, \out2_8888, \scratch2
316 or \scratch3, \scratch3, \scratch4
317 and \scratch1, \scratch1, \maskB
318 shll.ph \scratch2, \scratch1, 3
319 shra.ph \scratch4, \scratch1, 2
320 or \scratch2, \scratch2, \scratch4
321 or \scratch3, \scratch2, \scratch3
322 precrq.ph.w \out1_8888, \out2_8888, \scratch3
323 precr_sra.ph.w \out2_8888, \scratch3, 0
327 * Conversion of single a8r8g8b8 pixel (in_8888) to single r5g6b5 pixel
328 * returned in (out_565) register. Requires two temporary registers
329 * (scratch1 and scratch2).
331 .macro CONVERT_1x8888_TO_1x0565 in_8888, \
334 ext \out_565, \in_8888, 0x3, 0x5
335 srl \scratch1, \in_8888, 0x5
336 andi \scratch1, \scratch1, 0x07e0
337 srl \scratch2, \in_8888, 0x8
338 andi \scratch2, \scratch2, 0xf800
339 or \out_565, \out_565, \scratch1
340 or \out_565, \out_565, \scratch2
344 * Conversion of two a8r8g8b8 pixels (in1_8888 and in2_8888) to two r5g6b5
345 * pixels returned in (out1_565 and out2_565) registers. Requires two temporary
346 * registers (scratch1 and scratch2). It also requires maskR, maskG and maskB
347 * for color component extractions. These masks must have following values:
348 * li maskR, 0xf800f800
349 * li maskG, 0x07e007e0
350 * li maskB, 0x001F001F
351 * Value of input register in2_8888 is lost.
353 .macro CONVERT_2x8888_TO_2x0565 in1_8888, in2_8888, \
354 out1_565, out2_565, \
355 maskR, maskG, maskB, \
357 precrq.ph.w \scratch1, \in2_8888, \in1_8888
358 precr_sra.ph.w \in2_8888, \in1_8888, 0
359 shll.ph \scratch1, \scratch1, 8
360 srl \in2_8888, \in2_8888, 3
361 and \scratch2, \in2_8888, \maskB
362 and \scratch1, \scratch1, \maskR
363 srl \in2_8888, \in2_8888, 2
364 and \out2_565, \in2_8888, \maskG
365 or \out2_565, \out2_565, \scratch2
366 or \out1_565, \out2_565, \scratch1
367 srl \out2_565, \out1_565, 16
371 * Multiply pixel (a8) with single pixel (a8r8g8b8). It requires maskLSR needed
372 * for rounding process. maskLSR must have following value:
373 * li maskLSR, 0x00ff00ff
375 .macro MIPS_UN8x4_MUL_UN8 s_8888, \
379 scratch1, scratch2, scratch3
380 replv.ph \m_8, \m_8 /* 0 | M | 0 | M */
381 muleu_s.ph.qbl \scratch1, \s_8888, \m_8 /* A*M | R*M */
382 muleu_s.ph.qbr \scratch2, \s_8888, \m_8 /* G*M | B*M */
383 shra_r.ph \scratch3, \scratch1, 8
384 shra_r.ph \d_8888, \scratch2, 8
385 and \scratch3, \scratch3, \maskLSR /* 0 |A*M| 0 |R*M */
386 and \d_8888, \d_8888, \maskLSR /* 0 |G*M| 0 |B*M */
387 addq.ph \scratch1, \scratch1, \scratch3 /* A*M+A*M | R*M+R*M */
388 addq.ph \scratch2, \scratch2, \d_8888 /* G*M+G*M | B*M+B*M */
389 shra_r.ph \scratch1, \scratch1, 8
390 shra_r.ph \scratch2, \scratch2, 8
391 precr.qb.ph \d_8888, \scratch1, \scratch2
395 * Multiply two pixels (a8) with two pixels (a8r8g8b8). It requires maskLSR
396 * needed for rounding process. maskLSR must have following value:
397 * li maskLSR, 0x00ff00ff
399 .macro MIPS_2xUN8x4_MUL_2xUN8 s1_8888, \
406 scratch1, scratch2, scratch3, \
407 scratch4, scratch5, scratch6
408 replv.ph \m1_8, \m1_8 /* 0 | M1 | 0 | M1 */
409 replv.ph \m2_8, \m2_8 /* 0 | M2 | 0 | M2 */
410 muleu_s.ph.qbl \scratch1, \s1_8888, \m1_8 /* A1*M1 | R1*M1 */
411 muleu_s.ph.qbr \scratch2, \s1_8888, \m1_8 /* G1*M1 | B1*M1 */
412 muleu_s.ph.qbl \scratch3, \s2_8888, \m2_8 /* A2*M2 | R2*M2 */
413 muleu_s.ph.qbr \scratch4, \s2_8888, \m2_8 /* G2*M2 | B2*M2 */
414 shra_r.ph \scratch5, \scratch1, 8
415 shra_r.ph \d1_8888, \scratch2, 8
416 shra_r.ph \scratch6, \scratch3, 8
417 shra_r.ph \d2_8888, \scratch4, 8
418 and \scratch5, \scratch5, \maskLSR /* 0 |A1*M1| 0 |R1*M1 */
419 and \d1_8888, \d1_8888, \maskLSR /* 0 |G1*M1| 0 |B1*M1 */
420 and \scratch6, \scratch6, \maskLSR /* 0 |A2*M2| 0 |R2*M2 */
421 and \d2_8888, \d2_8888, \maskLSR /* 0 |G2*M2| 0 |B2*M2 */
422 addq.ph \scratch1, \scratch1, \scratch5
423 addq.ph \scratch2, \scratch2, \d1_8888
424 addq.ph \scratch3, \scratch3, \scratch6
425 addq.ph \scratch4, \scratch4, \d2_8888
426 shra_r.ph \scratch1, \scratch1, 8
427 shra_r.ph \scratch2, \scratch2, 8
428 shra_r.ph \scratch3, \scratch3, 8
429 shra_r.ph \scratch4, \scratch4, 8
430 precr.qb.ph \d1_8888, \scratch1, \scratch2
431 precr.qb.ph \d2_8888, \scratch3, \scratch4
435 * Multiply pixel (a8r8g8b8) with single pixel (a8r8g8b8). It requires maskLSR
436 * needed for rounding process. maskLSR must have following value:
437 * li maskLSR, 0x00ff00ff
439 .macro MIPS_UN8x4_MUL_UN8x4 s_8888, \
443 scratch1, scratch2, scratch3, scratch4
444 preceu.ph.qbl \scratch1, \m_8888 /* 0 | A | 0 | R */
445 preceu.ph.qbr \scratch2, \m_8888 /* 0 | G | 0 | B */
446 muleu_s.ph.qbl \scratch3, \s_8888, \scratch1 /* A*A | R*R */
447 muleu_s.ph.qbr \scratch4, \s_8888, \scratch2 /* G*G | B*B */
448 shra_r.ph \scratch1, \scratch3, 8
449 shra_r.ph \scratch2, \scratch4, 8
450 and \scratch1, \scratch1, \maskLSR /* 0 |A*A| 0 |R*R */
451 and \scratch2, \scratch2, \maskLSR /* 0 |G*G| 0 |B*B */
452 addq.ph \scratch1, \scratch1, \scratch3
453 addq.ph \scratch2, \scratch2, \scratch4
454 shra_r.ph \scratch1, \scratch1, 8
455 shra_r.ph \scratch2, \scratch2, 8
456 precr.qb.ph \d_8888, \scratch1, \scratch2
460 * Multiply two pixels (a8r8g8b8) with two pixels (a8r8g8b8). It requires
461 * maskLSR needed for rounding process. maskLSR must have following value:
462 * li maskLSR, 0x00ff00ff
465 .macro MIPS_2xUN8x4_MUL_2xUN8x4 s1_8888, \
472 scratch1, scratch2, scratch3, \
473 scratch4, scratch5, scratch6
474 preceu.ph.qbl \scratch1, \m1_8888 /* 0 | A | 0 | R */
475 preceu.ph.qbr \scratch2, \m1_8888 /* 0 | G | 0 | B */
476 preceu.ph.qbl \scratch3, \m2_8888 /* 0 | A | 0 | R */
477 preceu.ph.qbr \scratch4, \m2_8888 /* 0 | G | 0 | B */
478 muleu_s.ph.qbl \scratch5, \s1_8888, \scratch1 /* A*A | R*R */
479 muleu_s.ph.qbr \scratch6, \s1_8888, \scratch2 /* G*G | B*B */
480 muleu_s.ph.qbl \scratch1, \s2_8888, \scratch3 /* A*A | R*R */
481 muleu_s.ph.qbr \scratch2, \s2_8888, \scratch4 /* G*G | B*B */
482 shra_r.ph \scratch3, \scratch5, 8
483 shra_r.ph \scratch4, \scratch6, 8
484 shra_r.ph \d1_8888, \scratch1, 8
485 shra_r.ph \d2_8888, \scratch2, 8
486 and \scratch3, \scratch3, \maskLSR /* 0 |A*A| 0 |R*R */
487 and \scratch4, \scratch4, \maskLSR /* 0 |G*G| 0 |B*B */
488 and \d1_8888, \d1_8888, \maskLSR /* 0 |A*A| 0 |R*R */
489 and \d2_8888, \d2_8888, \maskLSR /* 0 |G*G| 0 |B*B */
490 addq.ph \scratch3, \scratch3, \scratch5
491 addq.ph \scratch4, \scratch4, \scratch6
492 addq.ph \d1_8888, \d1_8888, \scratch1
493 addq.ph \d2_8888, \d2_8888, \scratch2
494 shra_r.ph \scratch3, \scratch3, 8
495 shra_r.ph \scratch4, \scratch4, 8
496 shra_r.ph \scratch5, \d1_8888, 8
497 shra_r.ph \scratch6, \d2_8888, 8
498 precr.qb.ph \d1_8888, \scratch3, \scratch4
499 precr.qb.ph \d2_8888, \scratch5, \scratch6
502 #endif //PIXMAN_MIPS_DSPR2_ASM_H