3 * Copyright 2012 Samsung Electronics S.LSI Co. LTD
5 * Licensed under the Apache License, Version 2.0 (the "License");
6 * you may not use this file except in compliance with the License.
7 * You may obtain a copy of the License at
9 * http://www.apache.org/licenses/LICENSE-2.0
11 * Unless required by applicable law or agreed to in writing, software
12 * distributed under the License is distributed on an "AS IS" BASIS,
13 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
14 * See the License for the specific language governing permissions and
15 * limitations under the License.
19 * @file Exynos_OMX_Def.h
20 * @brief Exynos_OMX specific define
21 * @author SeungBeom Kim (sbcrux.kim@samsung.com)
27 #ifndef EXYNOS_OMX_DEF
28 #define EXYNOS_OMX_DEF
30 #include "OMX_Types.h"
31 #include "OMX_IVCommon.h"
33 #define VERSIONMAJOR_NUMBER 1
34 #ifndef SLP_PLATFORM /* omx version */
35 #define VERSIONMINOR_NUMBER 0
37 #define VERSIONMINOR_NUMBER 1
39 #define REVISION_NUMBER 0
43 #define MAX_OMX_COMPONENT_NUM 20
44 #define MAX_OMX_COMPONENT_ROLE_NUM 10
45 #define MAX_OMX_COMPONENT_NAME_SIZE OMX_MAX_STRINGNAME_SIZE
46 #define MAX_OMX_COMPONENT_ROLE_SIZE OMX_MAX_STRINGNAME_SIZE
47 #define MAX_OMX_COMPONENT_LIBNAME_SIZE OMX_MAX_STRINGNAME_SIZE * 2
48 #define MAX_OMX_MIMETYPE_SIZE OMX_MAX_STRINGNAME_SIZE
50 #define MAX_TIMESTAMP 40
53 #define MAX_BUFFER_PLANE 3
55 #ifdef SLP_PLATFORM /* build env */
56 #define EXYNOS_OMX_INSTALL_PATH "/usr/lib/omx/"
58 #define EXYNOS_OMX_INSTALL_PATH "/system/lib/omx/"
61 typedef enum _EXYNOS_CODEC_TYPE
70 typedef struct _EXYNOS_OMX_PRIORITYMGMTTYPE
72 OMX_U32 nGroupPriority; /* the value 0 represents the highest priority */
73 /* for a group of components */
75 } EXYNOS_OMX_PRIORITYMGMTTYPE;
77 typedef enum _EXYNOS_OMX_INDEXTYPE
79 #define EXYNOS_INDEX_PARAM_ENABLE_THUMBNAIL "OMX.SEC.index.ThumbnailMode"
80 OMX_IndexVendorThumbnailMode = 0x7F000001,
81 #define EXYNOS_INDEX_CONFIG_VIDEO_INTRAPERIOD "OMX.SEC.index.VideoIntraPeriod"
82 OMX_IndexConfigVideoIntraPeriod = 0x7F000002,
83 #ifdef USE_S3D_SUPPORT
84 #define EXYNOS_INDEX_PARAM_GET_S3D "OMX.SEC.index.S3DMode"
85 OMX_IndexVendorS3DMode = 0x7F000003,
89 #define EXYNOS_INDEX_PARAM_ENABLE_PB "OMX.SEC.index.enablePlatformSpecificBuffers"
90 OMX_IndexParamEnablePlatformSpecificBuffers = 0x7F000011,
92 /* for Android Native Window */
93 #define EXYNOS_INDEX_PARAM_ENABLE_ANB "OMX.google.android.index.enableAndroidNativeBuffers"
94 OMX_IndexParamEnableAndroidBuffers = 0x7F000011,
96 #define EXYNOS_INDEX_PARAM_GET_ANB "OMX.google.android.index.getAndroidNativeBufferUsage"
97 OMX_IndexParamGetAndroidNativeBuffer = 0x7F000012,
98 #define EXYNOS_INDEX_PARAM_USE_ANB "OMX.google.android.index.useAndroidNativeBuffer"
99 OMX_IndexParamUseAndroidNativeBuffer = 0x7F000013,
100 /* for Android Store Metadata Inbuffer */
101 #define EXYNOS_INDEX_PARAM_STORE_METADATA_BUFFER "OMX.google.android.index.storeMetaDataInBuffers"
102 OMX_IndexParamStoreMetaDataBuffer = 0x7F000014,
103 /* prepend SPS/PPS to I/IDR for H.264 Encoder */
104 #define EXYNOS_INDEX_PARAM_PREPEND_SPSPPS_TO_IDR "OMX.SEC.index.prependSPSPPSToIDRFrames"
105 OMX_IndexParamPrependSPSPPSToIDR = 0x7F000015,
107 /* avi demux timestamp reorder */
108 #define EXYNOS_INDEX_PARAM_ENABLE_TS_REORDER "OMX.SEC.index.enableTimestampReorder"
109 OMX_IndexParamEnableTimestampReorder = 0x7F000016,
111 /* DMA FD output for hdcp */
112 #define EXYNOS_INDEX_PARAM_ENC_SHARED_OUTPUT_FD "OMX.SEC.index.encoderSharedOutputFD"
113 OMX_IndexParamSharedOutputFD = 0x7F000017,
117 /* for Android PV OpenCore*/
118 OMX_COMPONENT_CAPABILITY_TYPE_INDEX = 0xFF7A347
119 } EXYNOS_OMX_INDEXTYPE;
121 typedef enum _EXYNOS_OMX_ERRORTYPE
123 OMX_ErrorNoEOF = (OMX_S32) 0x90000001,
124 OMX_ErrorInputDataDecodeYet = (OMX_S32) 0x90000002,
125 OMX_ErrorInputDataEncodeYet = (OMX_S32) 0x90000003,
126 OMX_ErrorCodecInit = (OMX_S32) 0x90000004,
127 OMX_ErrorCodecDecode = (OMX_S32) 0x90000005,
128 OMX_ErrorCodecEncode = (OMX_S32) 0x90000006,
129 OMX_ErrorCodecFlush = (OMX_S32) 0x90000007,
130 OMX_ErrorOutputBufferUseYet = (OMX_S32) 0x90000008,
131 OMX_ErrorCorruptedFrame = (OMX_S32) 0x90000009
132 } EXYNOS_OMX_ERRORTYPE;
134 typedef enum _EXYNOS_OMX_COMMANDTYPE
136 EXYNOS_OMX_CommandComponentDeInit = 0x7F000001,
137 EXYNOS_OMX_CommandEmptyBuffer,
138 EXYNOS_OMX_CommandFillBuffer,
139 EXYNOS_OMX_CommandFakeBuffer
140 } EXYNOS_OMX_COMMANDTYPE;
142 typedef enum _EXYNOS_OMX_TRANS_STATETYPE {
143 EXYNOS_OMX_TransStateInvalid,
144 EXYNOS_OMX_TransStateLoadedToIdle,
145 EXYNOS_OMX_TransStateIdleToExecuting,
146 EXYNOS_OMX_TransStateExecutingToIdle,
147 EXYNOS_OMX_TransStateIdleToLoaded,
148 EXYNOS_OMX_TransStateMax = 0X7FFFFFFF
149 } EXYNOS_OMX_TRANS_STATETYPE;
151 typedef enum _EXYNOS_OMX_COLOR_FORMATTYPE {
152 #ifdef SLP_PLATFORM /* dmabuf fd color format */
153 OMX_SEC_COLOR_FormatNV12T_DmaBuf_Fd = 0x7F000001, /* use same value with phyaddr */
154 OMX_SEC_COLOR_FormatNV12L_DmaBuf_Fd = 0x7F000002,
156 OMX_SEC_COLOR_FormatNV12TPhysicalAddress = 0x7F000001, /**< Reserved region for introducing Vendor Extensions */
157 OMX_SEC_COLOR_FormatNV12LPhysicalAddress = 0x7F000002,
159 OMX_SEC_COLOR_FormatNV12LVirtualAddress = 0x7F000003,
160 OMX_SEC_COLOR_FormatNV12Tiled = 0x7FC00002, /* 0x7FC00002 */
161 OMX_SEC_COLOR_FormatNV21LPhysicalAddress = 0x7F000010,
162 OMX_SEC_COLOR_FormatNV21Linear = 0x7F000011,
163 /* to copy a encoded data for drm component using gsc or fimc */
164 OMX_SEC_COLOR_FormatEncodedData = OMX_COLOR_FormatYCbYCr,
166 #ifdef USE_KHRONOS_OMX_HEADER
167 /* for Android SurfaceMediaSource*/
168 OMX_COLOR_FormatAndroidOpaque = 0x7F000789
170 }EXYNOS_OMX_COLOR_FORMATTYPE;
172 typedef enum _EXYNOS_OMX_SUPPORTFORMAT_TYPE
174 supportFormat_0 = 0x00,
182 } EXYNOS_OMX_SUPPORTFORMAT_TYPE;
184 typedef enum _EXYNOS_OMX_BUFFERPROCESS_TYPE
186 BUFFER_DEFAULT = 0x00,
189 BUFFER_METADATA = 0x04,
190 BUFFER_PBSHARE = 0x08 /* to get yuv output for some application */
191 } EXYNOS_OMX_BUFFERPROCESS_TYPE;
193 typedef struct _EXYNOS_OMX_VIDEO_PROFILELEVEL
197 } EXYNOS_OMX_VIDEO_PROFILELEVEL;
199 #ifdef USE_S3D_SUPPORT
200 typedef enum _EXYNOS_OMX_FPARGMT_TYPE
202 OMX_SEC_FPARGMT_CHECKERBRD_INTERL = 0x00,
203 OMX_SEC_FPARGMT_COLUMN_INTERL = 0x01,
204 OMX_SEC_FPARGMT_ROW_INTERL = 0x02,
205 OMX_SEC_FPARGMT_SIDE_BY_SIDE = 0x03,
206 OMX_SEC_FPARGMT_TOP_BOTTOM = 0x04,
207 OMX_SEC_FPARGMT_TEMPORAL_INTERL = 0x05,
208 OMX_SEC_FPARGMT_NONE = 0x0A
209 } EXYNOS_OMX_FPARGMT_TYPE;
212 #ifdef USE_KHRONOS_OMX_HEADER
213 #define OMX_VIDEO_CodingVPX 0x09 /**< Google VPX, formerly known as On2 VP8 */
216 #ifndef __OMX_EXPORTS
217 #define __OMX_EXPORTS
218 #define EXYNOS_EXPORT_REF __attribute__((visibility("default")))
219 #define EXYNOS_IMPORT_REF __attribute__((visibility("default")))
223 /* for using ST12, set the hw addr at SCMN_IMGB type buffer */
224 #define SCMN_IMGB_MAX_PLANE (4) /* max channel count */
226 /* image buffer definition
227 +------------------------------------------+ ---
230 | +---------------------------+ --- | |
232 | |<---------- w[] ---------->| | | |
240 | +---------------------------+ --- | |
242 +------------------------------------------+ ---
244 |<----------------- s[] ------------------>|
249 int w[SCMN_IMGB_MAX_PLANE]; /* width of each image plane */
250 int h[SCMN_IMGB_MAX_PLANE]; /* height of each image plane */
251 int s[SCMN_IMGB_MAX_PLANE]; /* stride of each image plane */
252 int e[SCMN_IMGB_MAX_PLANE]; /* elevation of each image plane */
253 void * a[SCMN_IMGB_MAX_PLANE]; /* user space address of each image plane */
254 void * p[SCMN_IMGB_MAX_PLANE]; /* physical address of each image plane, if needs */
255 int cs; /* color space type of image */
256 int x; /* left postion, if needs */
257 int y; /* top position, if needs */
258 int __dummy2; /* to align memory */
259 int data[16]; /* arbitrary data */
262 int fd[SCMN_IMGB_MAX_PLANE];
264 /* flag for buffer share */
265 int buf_share_method;
267 /* Y plane size in case of ST12 */
269 /* UV plane size in case of ST12 */
272 /* Tizen buffer object of each image plane */
273 void *bo[SCMN_IMGB_MAX_PLANE];
288 } SSBSIP_MFC_MEMORY_TYPE;