1 /* Disassemble V850 instructions.
2 Copyright 1996, 1997, 1998, 2000, 2001, 2002, 2003, 2005, 2007, 2010,
3 2012 Free Software Foundation, Inc.
5 This file is part of the GNU opcodes library.
7 This library is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 3, or (at your option)
12 It is distributed in the hope that it will be useful, but WITHOUT
13 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
14 or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public
15 License for more details.
17 You should have received a copy of the GNU General Public License
18 along with this program; if not, write to the Free Software
19 Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston,
20 MA 02110-1301, USA. */
25 #include "opcode/v850.h"
29 static const char *const v850_reg_names[] =
31 "r0", "r1", "r2", "sp", "gp", "r5", "r6", "r7",
32 "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15",
33 "r16", "r17", "r18", "r19", "r20", "r21", "r22", "r23",
34 "r24", "r25", "r26", "r27", "r28", "r29", "ep", "lp"
37 static const char *const v850_sreg_names[] =
39 "eipc/vip/mpm", "eipsw/mpc", "fepc/tid", "fepsw/ppa", "ecr/vmecr", "psw/vmtid",
40 "sr6/fpsr/vmadr/dcc", "sr7/fpepc/dc0",
41 "sr8/fpst/vpecr/dcv1", "sr9/fpcc/vptid", "sr10/fpcfg/vpadr/spal", "sr11/spau",
42 "sr12/vdecr/ipa0l", "eiic/vdtid/ipa0u", "feic/ipa1l", "dbic/ipa1u",
43 "ctpc/ipa2l", "ctpsw/ipa2u", "dbpc/ipa3l", "dbpsw/ipa3u", "ctbp/dpa0l",
44 "dir/dpa0u", "bpc/dpa0u", "asid/dpa1l",
45 "bpav/dpa1u", "bpam/dpa2l", "bpdv/dpa2u", "bpdm/dpa3l", "eiwr/dpa3u",
46 "fewr", "dbwr", "bsel"
49 static const char *const v850_cc_names[] =
51 "v", "c/l", "z", "nh", "s/n", "t", "lt", "le",
52 "nv", "nc/nl", "nz", "h", "ns/p", "sa", "ge", "gt"
55 static const char *const v850_float_cc_names[] =
57 "f/t", "un/or", "eq/neq", "ueq/ogl", "olt/uge", "ult/oge", "ole/ugt", "ule/ogt",
58 "sf/st", "ngle/gle", "seq/sne", "ngl/gl", "lt/nlt", "nge/ge", "le/nle", "ngt/gt"
63 print_value (int flags, bfd_vma memaddr, struct disassemble_info *info, long value)
65 if (flags & V850_PCREL)
67 bfd_vma addr = value + memaddr;
68 info->print_address_func (addr, info);
70 else if (flags & V850_OPERAND_DISP)
72 if (flags & V850_OPERAND_SIGNED)
74 info->fprintf_func (info->stream, "%ld", value);
78 info->fprintf_func (info->stream, "%lu", value);
81 else if (flags & V850E_IMMEDIATE32)
83 info->fprintf_func (info->stream, "0x%lx", value);
87 if (flags & V850_OPERAND_SIGNED)
89 info->fprintf_func (info->stream, "%ld", value);
93 info->fprintf_func (info->stream, "%lu", value);
99 get_operand_value (const struct v850_operand *operand,
103 struct disassemble_info * info,
110 if ((operand->flags & V850E_IMMEDIATE16)
111 || (operand->flags & V850E_IMMEDIATE16HI))
113 int status = info->read_memory_func (memaddr + bytes_read, buffer, 2, info);
117 value = bfd_getl16 (buffer);
119 if (operand->flags & V850E_IMMEDIATE16HI)
121 else if (value & 0x8000)
122 value |= (-1L << 16);
128 info->memory_error_func (status, memaddr + bytes_read, info);
133 if (operand->flags & V850E_IMMEDIATE23)
135 int status = info->read_memory_func (memaddr + 2, buffer, 4, info);
139 value = bfd_getl32 (buffer);
141 value = (operand->extract) (value, invalid);
147 info->memory_error_func (status, memaddr + bytes_read, info);
152 if (operand->flags & V850E_IMMEDIATE32)
154 int status = info->read_memory_func (memaddr + bytes_read, buffer, 4, info);
159 value = bfd_getl32 (buffer);
165 info->memory_error_func (status, memaddr + bytes_read, info);
170 if (operand->extract)
171 value = (operand->extract) (insn, invalid);
174 if (operand->bits == -1)
175 value = (insn & operand->shift);
177 value = (insn >> operand->shift) & ((1 << operand->bits) - 1);
179 if (operand->flags & V850_OPERAND_SIGNED)
180 value = ((long)(value << (sizeof (long)*8 - operand->bits))
181 >> (sizeof (long)*8 - operand->bits));
189 disassemble (bfd_vma memaddr, struct disassemble_info *info, int bytes_read, unsigned long insn)
191 struct v850_opcode *op = (struct v850_opcode *)v850_opcodes;
192 const struct v850_operand *operand;
194 int target_processor;
200 target_processor = PROCESSOR_V850;
204 target_processor = PROCESSOR_V850E;
207 case bfd_mach_v850e1:
208 target_processor = PROCESSOR_V850E;
211 case bfd_mach_v850e2:
212 target_processor = PROCESSOR_V850E2;
215 case bfd_mach_v850e2v3:
216 target_processor = PROCESSOR_V850E2V3;
220 /* If this is a two byte insn, then mask off the high bits. */
224 /* Find the opcode. */
227 if ((op->mask & insn) == op->opcode
228 && (op->processors & target_processor)
229 && !(op->processors & PROCESSOR_OPTION_ALIAS))
231 /* Code check start. */
232 const unsigned char *opindex_ptr;
236 for (opindex_ptr = op->operands, opnum = 1;
238 opindex_ptr++, opnum++)
243 operand = &v850_operands[*opindex_ptr];
245 value = get_operand_value (operand, insn, bytes_read, memaddr, info, 1, &invalid);
250 if ((operand->flags & V850_NOT_R0) && value == 0 && (op->memop) <=2)
253 if ((operand->flags & V850_NOT_SA) && value == 0xd)
256 if ((operand->flags & V850_NOT_IMM0) && value == 0)
260 /* Code check end. */
263 (*info->fprintf_func) (info->stream, "%s\t", op->name);
265 fprintf (stderr, "match: insn: %lx, mask: %lx, opcode: %lx, name: %s\n",
266 insn, op->mask, op->opcode, op->name );
270 /* Now print the operands.
272 MEMOP is the operand number at which a memory
273 address specification starts, or zero if this
274 instruction has no memory addresses.
276 A memory address is always two arguments.
278 This information allows us to determine when to
279 insert commas into the output stream as well as
280 when to insert disp[reg] expressions onto the
283 for (opindex_ptr = op->operands, opnum = 1;
285 opindex_ptr++, opnum++)
287 bfd_boolean square = FALSE;
292 operand = &v850_operands[*opindex_ptr];
294 value = get_operand_value (operand, insn, bytes_read, memaddr, info, 0, 0);
296 /* The first operand is always output without any
299 For the following arguments:
301 If memop && opnum == memop + 1, then we need '[' since
302 we're about to output the register used in a memory
305 If memop && opnum == memop + 2, then we need ']' since
306 we just finished the register in a memory reference. We
307 also need a ',' before this operand.
309 Else we just need a comma.
311 We may need to output a trailing ']' if the last operand
312 in an instruction is the register for a memory address.
314 The exception (and there's always an exception) are the
315 "jmp" insn which needs square brackets around it's only
316 register argument, and the clr1/not1/set1/tst1 insns
317 which [...] around their second register argument. */
320 if (operand->flags & V850_OPERAND_BANG)
324 else if (operand->flags & V850_OPERAND_PERCENT)
329 if (opnum == 1 && opnum == memop)
331 info->fprintf_func (info->stream, "%s[", prefix);
335 && (v850_operands[*(opindex_ptr - 1)].flags & V850_OPERAND_DISP) != 0
338 info->fprintf_func (info->stream, "%s[", prefix);
342 && ( op->opcode == 0x00e407e0 /* clr1 */
343 || op->opcode == 0x00e207e0 /* not1 */
344 || op->opcode == 0x00e007e0 /* set1 */
345 || op->opcode == 0x00e607e0 /* tst1 */
348 info->fprintf_func (info->stream, ", %s[", prefix);
352 info->fprintf_func (info->stream, ", %s", prefix);
354 /* Extract the flags, ignoring ones which do not effect disassembly output. */
355 flag = operand->flags & (V850_OPERAND_REG
359 | V850E_OPERAND_REG_LIST
361 | V850_OPERAND_FLOAT_CC);
365 case V850_OPERAND_REG: info->fprintf_func (info->stream, "%s", v850_reg_names[value]); break;
366 case (V850_OPERAND_REG|V850_REG_EVEN): info->fprintf_func (info->stream, "%s", v850_reg_names[value*2]); break;
367 case V850_OPERAND_EP: info->fprintf_func (info->stream, "ep"); break;
368 case V850_OPERAND_SRG: info->fprintf_func (info->stream, "%s", v850_sreg_names[value]); break;
370 case V850E_OPERAND_REG_LIST:
372 static int list12_regs[32] = { 30, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
373 0, 0, 0, 0, 0, 31, 29, 28, 23, 22, 21, 20, 27, 26, 25, 24 };
376 unsigned long int mask = 0;
380 switch (operand->shift)
382 case 0xffe00001: regs = list12_regs; break;
384 /* xgettext:c-format */
385 fprintf (stderr, _("unknown operand shift: %x\n"), operand->shift );
389 for (i = 0; i < 32; i++)
391 if (value & (1 << i))
395 default: mask |= (1 << regs[ i ]); break;
396 /* xgettext:c-format */
397 case 0: fprintf (stderr, _("unknown reg: %d\n"), i ); abort ();
398 case -1: pc = 1; break;
403 info->fprintf_func (info->stream, "{");
412 for (bit = 0; bit < 32; bit++)
413 if (mask & (1 << bit))
415 unsigned long int first = bit;
416 unsigned long int last;
419 info->fprintf_func (info->stream, ", ");
423 info->fprintf_func (info->stream, "%s", v850_reg_names[first]);
425 for (bit++; bit < 32; bit++)
426 if ((mask & (1 << bit)) == 0)
431 if (last > first + 1)
433 info->fprintf_func (info->stream, " - %s", v850_reg_names[ last - 1 ]);
439 info->fprintf_func (info->stream, "%sPC", mask ? ", " : "");
442 info->fprintf_func (info->stream, "}");
446 case V850_OPERAND_CC: info->fprintf_func (info->stream, "%s", v850_cc_names[value]); break;
447 case V850_OPERAND_FLOAT_CC: info->fprintf_func (info->stream, "%s", v850_float_cc_names[value]); break;
450 print_value (operand->flags, memaddr, info, value);
455 (*info->fprintf_func) (info->stream, "]");
469 print_insn_v850 (bfd_vma memaddr, struct disassemble_info * info)
471 int status, status2, match;
473 int length = 0, code_length = 0;
474 unsigned long insn = 0, insn2 = 0;
475 int target_processor;
481 target_processor = PROCESSOR_V850;
485 target_processor = PROCESSOR_V850E;
488 case bfd_mach_v850e1:
489 target_processor = PROCESSOR_V850E;
492 case bfd_mach_v850e2:
493 target_processor = PROCESSOR_V850E2;
496 case bfd_mach_v850e2v3:
497 target_processor = PROCESSOR_V850E2V3;
501 status = info->read_memory_func (memaddr, buffer, 2, info);
505 info->memory_error_func (status, memaddr, info);
509 insn = bfd_getl16 (buffer);
511 status2 = info->read_memory_func (memaddr+2, buffer, 2 , info);
515 insn2 = bfd_getl16 (buffer);
516 /* fprintf (stderr, "insn2 0x%08lx\n", insn2); */
521 && (target_processor == PROCESSOR_V850E2
522 || target_processor == PROCESSOR_V850E2V3))
524 if ((insn & 0xffff) == 0x02e0 /* jr 32bit */
525 && !status2 && (insn2 & 0x1) == 0)
530 else if ((insn & 0xffe0) == 0x02e0 /* jarl 32bit */
531 && !status2 && (insn2 & 0x1) == 0)
536 else if ((insn & 0xffe0) == 0x06e0 /* jmp 32bit */
537 && !status2 && (insn2 & 0x1) == 0)
545 && target_processor == PROCESSOR_V850E2V3)
547 if (((insn & 0xffe0) == 0x0780 /* ld.b 23bit */
548 && !status2 && (insn2 & 0x000f) == 0x0005)
549 || ((insn & 0xffe0) == 0x07a0 /* ld.bu 23bit */
550 && !status2 && (insn2 & 0x000f) == 0x0005)
551 || ((insn & 0xffe0) == 0x0780 /* ld.h 23bit */
552 && !status2 && (insn2 & 0x000f) == 0x0007)
553 || ((insn & 0xffe0) == 0x07a0 /* ld.hu 23bit */
554 && !status2 && (insn2 & 0x000f) == 0x0007)
555 || ((insn & 0xffe0) == 0x0780 /* ld.w 23bit */
556 && !status2 && (insn2 & 0x000f) == 0x0009))
561 else if (((insn & 0xffe0) == 0x0780 /* st.b 23bit */
562 && !status2 && (insn2 & 0x000f) == 0x000d)
563 || ((insn & 0xffe0) == 0x07a0 /* st.h 23bit */
564 && !status2 && (insn2 & 0x000f) == 0x000d)
565 || ((insn & 0xffe0) == 0x0780 /* st.w 23bit */
566 && !status2 && (insn2 & 0x000f) == 0x000f))
574 && target_processor != PROCESSOR_V850)
576 if ((insn & 0xffe0) == 0x0620) /* 32 bit MOV */
581 else if ((insn & 0xffc0) == 0x0780 /* prepare {list}, imm5, imm16<<16 */
582 && !status2 && (insn2 & 0x001f) == 0x0013)
587 else if ((insn & 0xffc0) == 0x0780 /* prepare {list}, imm5, imm16 */
588 && !status2 && (insn2 & 0x001f) == 0x000b)
593 else if ((insn & 0xffc0) == 0x0780 /* prepare {list}, imm5, imm32 */
594 && !status2 && (insn2 & 0x001f) == 0x001b)
603 && (insn & 0x0600) == 0x0600))
605 /* This is a 4 byte insn. */
606 status = info->read_memory_func (memaddr, buffer, 4, info);
609 insn = bfd_getl32 (buffer);
612 length = code_length = 4;
616 if (code_length > length)
618 status = info->read_memory_func (memaddr + length, buffer, code_length - length, info);
623 if (length == 0 && !status)
624 length = code_length = 2;
629 match = disassemble (memaddr, info, length, insn);
635 status = info->read_memory_func (memaddr, buffer, code_length, info);
637 while (l < code_length)
639 if (code_length - l == 2)
641 insn = bfd_getl16 (buffer + l) & 0xffff;
642 info->fprintf_func (info->stream, ".short\t0x%04lx", insn);
647 insn = bfd_getl32 (buffer + l);
648 info->fprintf_func (info->stream, ".long\t0x%08lx", insn);