1 /* Disassembly routines for TMS320C54X architecture
2 Copyright 1999, 2000, 2001 Free Software Foundation, Inc.
3 Contributed by Timothy Wall (twall@cygnus.com)
5 This program is free software; you can redistribute it and/or modify
6 it under the terms of the GNU General Public License as published by
7 the Free Software Foundation; either version 2 of the License, or
8 (at your option) any later version.
10 This program is distributed in the hope that it will be useful,
11 but WITHOUT ANY WARRANTY; without even the implied warranty of
12 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 GNU General Public License for more details.
15 You should have received a copy of the GNU General Public License
16 along with this program; if not, write to the Free Software
17 Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
25 #include "opcode/tic54x.h"
26 #include "coff/tic54x.h"
28 typedef struct _instruction {
34 static int has_lkaddr PARAMS ((unsigned short, template *));
35 static int get_insn_size PARAMS ((unsigned short, instruction *));
36 static int get_instruction PARAMS ((disassemble_info *, bfd_vma,
37 unsigned short, instruction *));
38 static int print_instruction PARAMS ((disassemble_info *, bfd_vma,
39 unsigned short, char *,
40 enum optype [], int, int));
41 static int print_parallel_instruction PARAMS ((disassemble_info *, bfd_vma,
42 unsigned short, partemplate *,
44 static int sprint_dual_address (disassemble_info *,char [],
46 static int sprint_indirect_address (disassemble_info *,char [],
48 static int sprint_direct_address (disassemble_info *,char [],
50 static int sprint_mmr (disassemble_info *,char [],int);
51 static int sprint_condition (disassemble_info *,char *,unsigned short);
52 static int sprint_cc2 (disassemble_info *,char *,unsigned short);
55 print_insn_tic54x (memaddr, info)
57 disassemble_info *info;
60 unsigned short opcode;
64 status = (*info->read_memory_func) (memaddr, opbuf, 2, info);
67 (*info->memory_error_func) (status, memaddr, info);
71 opcode = bfd_getl16 (opbuf);
72 if (!get_instruction (info, memaddr, opcode, &insn))
75 size = get_insn_size (opcode, &insn);
76 info->bytes_per_line = 2;
77 info->bytes_per_chunk = 2;
78 info->octets_per_byte = 2;
79 info->display_endian = BFD_ENDIAN_LITTLE;
83 if (!print_parallel_instruction (info, memaddr, opcode, insn.ptm, size))
88 if (!print_instruction (info, memaddr, opcode,
89 (char *) insn.tm->name,
90 insn.tm->operand_types,
91 size, (insn.tm->flags & FL_EXT)))
99 has_lkaddr (opcode, tm)
100 unsigned short opcode;
103 return (IS_LKADDR (opcode)
104 && (OPTYPE (tm->operand_types[0]) == OP_Smem
105 || OPTYPE (tm->operand_types[1]) == OP_Smem
106 || OPTYPE (tm->operand_types[2]) == OP_Smem
107 || OPTYPE (tm->operand_types[1]) == OP_Sind));
110 /* always returns 1 (whether an insn template was found) since we provide an
111 "unknown instruction" template */
113 get_instruction (info, addr, opcode, insn)
114 disassemble_info *info;
116 unsigned short opcode;
123 for (tm = (template *) tic54x_optab; tm->name; tm++)
125 if (tm->opcode == (opcode & tm->mask))
127 /* a few opcodes span two words */
128 if (tm->flags & FL_EXT)
130 /* if lk addressing is used, the second half of the opcode gets
131 pushed one word later */
133 bfd_vma addr2 = addr + 1 + has_lkaddr (opcode, tm);
134 int status = (*info->read_memory_func) (addr2, opbuf, 2, info);
137 unsigned short opcode2 = bfd_getl16 (opbuf);
138 if (tm->opcode2 == (opcode2 & tm->mask2))
152 for (ptm = (partemplate *) tic54x_paroptab; ptm->name; ptm++)
154 if (ptm->opcode == (opcode & ptm->mask))
162 insn->tm = (template *) &tic54x_unknown_opcode;
167 get_insn_size (opcode, insn)
168 unsigned short opcode;
175 /* only non-parallel instructions support lk addressing */
176 size = insn->ptm->words;
180 size = insn->tm->words + has_lkaddr (opcode, insn->tm);
187 print_instruction (info, memaddr, opcode, tm_name, tm_operands, size, ext)
188 disassemble_info *info;
190 unsigned short opcode;
192 enum optype tm_operands[];
197 /* string storage for multiple operands */
198 char operand[4][64] = { {0},{0},{0},{0}, };
200 unsigned long opcode2 = 0;
201 unsigned long lkaddr = 0;
202 enum optype src = OP_None;
203 enum optype dst = OP_None;
207 info->fprintf_func (info->stream, "%-7s", tm_name);
211 int status = (*info->read_memory_func) (memaddr + 1, buf, 2, info);
214 lkaddr = opcode2 = bfd_getl16 (buf);
217 status = (*info->read_memory_func) (memaddr + 2, buf, 2, info);
220 opcode2 = bfd_getl16 (buf);
224 for (i = 0; i < MAX_OPERANDS && OPTYPE (tm_operands[i]) != OP_None; i++)
226 char *next_comma = ",";
227 int optional = (tm_operands[i] & OPT) != 0;
229 switch (OPTYPE (tm_operands[i]))
232 sprint_dual_address (info, operand[i], XMEM (opcode));
233 info->fprintf_func (info->stream, "%s%s", comma, operand[i]);
236 sprint_dual_address (info, operand[i], YMEM (opcode));
237 info->fprintf_func (info->stream, "%s%s", comma, operand[i]);
242 info->fprintf_func (info->stream, "%s", comma);
243 if (INDIRECT (opcode))
245 if (MOD (opcode) >= 12)
247 bfd_vma addr = lkaddr;
248 int arf = ARF (opcode);
249 int mod = MOD (opcode);
251 info->fprintf_func (info->stream, "*(");
253 info->fprintf_func (info->stream, "*%sar%d(",
254 (mod == 13 || mod == 14 ? "+" : ""),
256 (*(info->print_address_func)) ((bfd_vma) addr, info);
257 info->fprintf_func (info->stream, ")%s",
258 mod == 14 ? "%" : "");
262 sprint_indirect_address (info, operand[i], opcode);
263 info->fprintf_func (info->stream, "%s", operand[i]);
268 /* FIXME -- use labels (print_address_func) */
269 /* in order to do this, we need to guess what DP is */
270 sprint_direct_address (info, operand[i], opcode);
271 info->fprintf_func (info->stream, "%s", operand[i]);
275 info->fprintf_func (info->stream, "%s", comma);
276 (*(info->print_address_func)) ((bfd_vma) opcode2, info);
279 /* upper 7 bits of address are in the opcode */
280 opcode2 += ((unsigned long) opcode & 0x7F) << 16;
283 info->fprintf_func (info->stream, "%s", comma);
284 (*(info->print_address_func)) ((bfd_vma) opcode2, info);
287 sprint_mmr (info, operand[i], MMRX (opcode));
288 info->fprintf_func (info->stream, "%s%s", comma, operand[i]);
291 sprint_mmr (info, operand[i], MMRY (opcode));
292 info->fprintf_func (info->stream, "%s%s", comma, operand[i]);
295 sprint_mmr (info, operand[i], MMR (opcode));
296 info->fprintf_func (info->stream, "%s%s", comma, operand[i]);
299 sprintf (operand[i], "pa%d", (unsigned) opcode2);
300 info->fprintf_func (info->stream, "%s%s", comma, operand[i]);
303 src = SRC (ext ? opcode2 : opcode) ? OP_B : OP_A;
304 sprintf (operand[i], (src == OP_B) ? "b" : "a");
305 info->fprintf_func (info->stream, "%s%s", comma, operand[i]);
308 src = SRC1 (ext ? opcode2 : opcode) ? OP_B : OP_A;
309 sprintf (operand[i], (src == OP_B) ? "b" : "a");
310 info->fprintf_func (info->stream, "%s%s", comma, operand[i]);
313 dst = DST (opcode) ? OP_B : OP_A;
314 sprintf (operand[i], (dst == OP_B) ? "a" : "b");
315 info->fprintf_func (info->stream, "%s%s", comma, operand[i]);
318 dst = DST (ext ? opcode2 : opcode) ? OP_B : OP_A;
319 if (!optional || dst != src)
321 sprintf (operand[i], (dst == OP_B) ? "b" : "a");
322 info->fprintf_func (info->stream, "%s%s", comma, operand[i]);
328 sprintf (operand[i], "b");
329 info->fprintf_func (info->stream, "%s%s", comma, operand[i]);
332 sprintf (operand[i], "a");
333 info->fprintf_func (info->stream, "%s%s", comma, operand[i]);
336 sprintf (operand[i], "ar%d", (int) ARX (opcode));
337 info->fprintf_func (info->stream, "%s%s", comma, operand[i]);
340 shift = SHIFT (ext ? opcode2 : opcode);
341 if (!optional || shift != 0)
343 sprintf (operand[i], "%d", shift);
344 info->fprintf_func (info->stream, "%s%s", comma, operand[i]);
350 shift = SHFT (opcode);
351 if (!optional || shift != 0)
353 sprintf (operand[i], "%d", (unsigned) shift);
354 info->fprintf_func (info->stream, "%s%s", comma, operand[i]);
360 sprintf (operand[i], "#%d", (int) (short) opcode2);
361 info->fprintf_func (info->stream, "%s%s", comma, operand[i]);
364 sprintf (operand[i], "t");
365 info->fprintf_func (info->stream, "%s%s", comma, operand[i]);
368 sprintf (operand[i], "ts");
369 info->fprintf_func (info->stream, "%s%s", comma, operand[i]);
372 sprintf (operand[i], "%d", (int) ((signed char) (opcode & 0xFF)));
373 info->fprintf_func (info->stream, "%s%s", comma, operand[i]);
376 sprintf (operand[i], "16");
377 info->fprintf_func (info->stream, "%s%s", comma, operand[i]);
380 sprintf (operand[i], "asm");
381 info->fprintf_func (info->stream, "%s%s", comma, operand[i]);
384 sprintf (operand[i], "%d", (int) (opcode & 0xF));
385 info->fprintf_func (info->stream, "%s%s", comma, operand[i]);
388 /* put all CC operands in the same operand */
389 sprint_condition (info, operand[i], opcode);
390 info->fprintf_func (info->stream, "%s%s", comma, operand[i]);
394 sprint_cc2 (info, operand[i], opcode);
395 info->fprintf_func (info->stream, "%s%s", comma, operand[i]);
399 const char *code[] = { "eq", "lt", "gt", "neq" };
400 sprintf (operand[i], code[CC3 (opcode)]);
401 info->fprintf_func (info->stream, "%s%s", comma, operand[i]);
406 int code = (opcode >> 8) & 0x3;
407 sprintf (operand[i], "%d", (code == 0) ? 1 : (code == 2) ? 2 : 3);
408 info->fprintf_func (info->stream, "%s%s", comma, operand[i]);
412 sprintf (operand[i], "#%d",
413 (int) (((signed char) opcode & 0x1F) << 3) >> 3);
414 info->fprintf_func (info->stream, "%s%s", comma, operand[i]);
417 sprintf (operand[i], "#%d", (unsigned) (opcode & 0xFF));
418 info->fprintf_func (info->stream, "%s%s", comma, operand[i]);
421 sprintf (operand[i], "#%d", (int) (opcode & 0x7));
422 info->fprintf_func (info->stream, "%s%s", comma, operand[i]);
425 sprintf (operand[i], "#%d", (unsigned) opcode2);
426 info->fprintf_func (info->stream, "%s%s", comma, operand[i]);
429 n = (opcode >> 9) & 0x1;
430 sprintf (operand[i], "st%d", n);
431 info->fprintf_func (info->stream, "%s%s", comma, operand[i]);
435 const char *status0[] = {
436 "0", "1", "2", "3", "4", "5", "6", "7", "8",
437 "ovb", "ova", "c", "tc", "13", "14", "15"
439 const char *status1[] = {
440 "0", "1", "2", "3", "4",
441 "cmpt", "frct", "c16", "sxm", "ovm", "10",
442 "intm", "hm", "xf", "cpl", "braf"
444 sprintf (operand[i], "%s",
445 n ? status1[SBIT (opcode)] : status0[SBIT (opcode)]);
446 info->fprintf_func (info->stream, "%s%s", comma, operand[i]);
450 sprintf (operand[i], "%d", (int) ((opcode >> 9) & 1) + 1);
451 info->fprintf_func (info->stream, "%s%s", comma, operand[i]);
454 sprintf (operand[i], "trn");
455 info->fprintf_func (info->stream, "%s%s", comma, operand[i]);
458 sprintf (operand[i], "dp");
459 info->fprintf_func (info->stream, "%s%s", comma, operand[i]);
462 /* FIXME-- this is DP, print the original address? */
463 sprintf (operand[i], "#%d", (int) (opcode & 0x1FF));
464 info->fprintf_func (info->stream, "%s%s", comma, operand[i]);
467 sprintf (operand[i], "arp");
468 info->fprintf_func (info->stream, "%s%s", comma, operand[i]);
471 sprintf (operand[i], "%d", (int) (opcode & 0x1F));
472 info->fprintf_func (info->stream, "%s%s", comma, operand[i]);
475 sprintf (operand[i], "??? (0x%x)", tm_operands[i]);
476 info->fprintf_func (info->stream, "%s%s", comma, operand[i]);
485 print_parallel_instruction (info, memaddr, opcode, ptm, size)
486 disassemble_info *info;
488 unsigned short opcode;
492 print_instruction (info, memaddr, opcode,
493 ptm->name, ptm->operand_types, size, 0);
494 info->fprintf_func (info->stream, " || ");
495 return print_instruction (info, memaddr, opcode,
496 ptm->parname, ptm->paroperand_types, size, 0);
500 sprint_dual_address (info, buf, code)
501 disassemble_info *info ATTRIBUTE_UNUSED;
505 const char *formats[] = {
511 return sprintf (buf, formats[XMOD (code)], XARX (code));
515 sprint_indirect_address (info, buf, opcode)
516 disassemble_info *info ATTRIBUTE_UNUSED;
518 unsigned short opcode;
520 const char *formats[] = {
534 return sprintf (buf, formats[MOD (opcode)], ARF (opcode));
538 sprint_direct_address (info, buf, opcode)
539 disassemble_info *info ATTRIBUTE_UNUSED;
541 unsigned short opcode;
543 /* FIXME -- look up relocation if available */
544 return sprintf (buf, "0x??%02x", (int) (opcode & 0x7F));
548 sprint_mmr (info, buf, mmr)
549 disassemble_info *info ATTRIBUTE_UNUSED;
553 symbol *reg = (symbol *) mmregs;
554 while (reg->name != NULL)
556 if (mmr == reg->value)
558 sprintf (buf, "%s", (reg + 1)->name);
563 sprintf (buf, "MMR(%d)", mmr); /* FIXME -- different targets. */
568 sprint_cc2 (info, buf, opcode)
569 disassemble_info *info ATTRIBUTE_UNUSED;
571 unsigned short opcode;
573 const char *cc2[] = {
574 "??", "??", "ageq", "alt", "aneq", "aeq", "agt", "aleq",
575 "??", "??", "bgeq", "blt", "bneq", "beq", "bgt", "bleq",
577 return sprintf (buf, "%s", cc2[opcode & 0xF]);
581 sprint_condition (info, buf, opcode)
582 disassemble_info *info ATTRIBUTE_UNUSED;
584 unsigned short opcode;
587 const char *cmp[] = {
588 "??", "??", "geq", "lt", "neq", "eq", "gt", "leq"
592 char acc = (opcode & 0x8) ? 'b' : 'a';
594 buf += sprintf (buf, "%c%s%s", acc, cmp[(opcode & 0x7)],
595 (opcode & 0x20) ? ", " : "");
597 buf += sprintf (buf, "%c%s", acc, (opcode & 0x10) ? "ov" : "nov");
599 else if (opcode & 0x3F)
602 buf += sprintf (buf, "%s%s",
603 ((opcode & 0x30) == 0x30) ? "tc" : "ntc",
604 (opcode & 0x0F) ? ", " : "");
606 buf += sprintf (buf, "%s%s",
607 ((opcode & 0x0C) == 0x0C) ? "c" : "nc",
608 (opcode & 0x03) ? ", " : "");
610 buf += sprintf (buf, "%s",
611 ((opcode & 0x03) == 0x03) ? "bio" : "nbio");
614 buf += sprintf (buf, "unc");