1 /* Disassembly routines for TMS320C54X architecture
2 Copyright 1999, 2000, 2001, 2007 Free Software Foundation, Inc.
3 Contributed by Timothy Wall (twall@cygnus.com)
5 This file is part of the GNU opcodes library.
7 This library is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 3, or (at your option)
12 It is distributed in the hope that it will be useful, but WITHOUT
13 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
14 or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public
15 License for more details.
17 You should have received a copy of the GNU General Public License
18 along with this file; see the file COPYING. If not, write to the
19 Free Software Foundation, 51 Franklin Street - Fifth Floor, Boston,
20 MA 02110-1301, USA. */
27 #include "opcode/tic54x.h"
28 #include "coff/tic54x.h"
30 static int has_lkaddr (unsigned short, const template *);
31 static int get_insn_size (unsigned short, const template *);
32 static int print_instruction (disassemble_info *, bfd_vma,
33 unsigned short, const char *,
34 const enum optype [], int, int);
35 static int print_parallel_instruction (disassemble_info *, bfd_vma,
37 const template *, int);
38 static int sprint_dual_address (disassemble_info *,char [],
40 static int sprint_indirect_address (disassemble_info *,char [],
42 static int sprint_direct_address (disassemble_info *,char [],
44 static int sprint_mmr (disassemble_info *,char [],int);
45 static int sprint_condition (disassemble_info *,char *,unsigned short);
46 static int sprint_cc2 (disassemble_info *,char *,unsigned short);
49 print_insn_tic54x (bfd_vma memaddr, disassemble_info *info)
52 unsigned short opcode;
56 status = (*info->read_memory_func) (memaddr, opbuf, 2, info);
59 (*info->memory_error_func) (status, memaddr, info);
63 opcode = bfd_getl16 (opbuf);
64 tm = tic54x_get_insn (info, memaddr, opcode, &size);
66 info->bytes_per_line = 2;
67 info->bytes_per_chunk = 2;
68 info->octets_per_byte = 2;
69 info->display_endian = BFD_ENDIAN_LITTLE;
71 if (tm->flags & FL_PAR)
73 if (!print_parallel_instruction (info, memaddr, opcode, tm, size))
78 if (!print_instruction (info, memaddr, opcode,
81 size, (tm->flags & FL_EXT)))
89 has_lkaddr (unsigned short memdata, const template *tm)
91 return (IS_LKADDR (memdata)
92 && (OPTYPE (tm->operand_types[0]) == OP_Smem
93 || OPTYPE (tm->operand_types[1]) == OP_Smem
94 || OPTYPE (tm->operand_types[2]) == OP_Smem
95 || OPTYPE (tm->operand_types[1]) == OP_Sind
96 || OPTYPE (tm->operand_types[0]) == OP_Lmem
97 || OPTYPE (tm->operand_types[1]) == OP_Lmem));
100 /* always returns 1 (whether an insn template was found) since we provide an
101 "unknown instruction" template */
103 tic54x_get_insn (disassemble_info *info, bfd_vma addr,
104 unsigned short memdata, int *size)
106 const template *tm = NULL;
108 for (tm = tic54x_optab; tm->name; tm++)
110 if (tm->opcode == (memdata & tm->mask))
112 /* a few opcodes span two words */
113 if (tm->flags & FL_EXT)
115 /* if lk addressing is used, the second half of the opcode gets
116 pushed one word later */
118 bfd_vma addr2 = addr + 1 + has_lkaddr (memdata, tm);
119 int status = (*info->read_memory_func) (addr2, opbuf, 2, info);
120 // FIXME handle errors
123 unsigned short data2 = bfd_getl16 (opbuf);
124 if (tm->opcode2 == (data2 & tm->mask2))
126 if (size) *size = get_insn_size (memdata, tm);
133 if (size) *size = get_insn_size (memdata, tm);
138 for (tm = (template *) tic54x_paroptab; tm->name; tm++)
140 if (tm->opcode == (memdata & tm->mask))
142 if (size) *size = get_insn_size (memdata, tm);
148 return &tic54x_unknown_opcode;
152 get_insn_size (unsigned short memdata, const template *insn)
156 if (insn->flags & FL_PAR)
158 /* only non-parallel instructions support lk addressing */
163 size = insn->words + has_lkaddr (memdata, insn);
170 print_instruction (info, memaddr, opcode, tm_name, tm_operands, size, ext)
171 disassemble_info *info;
173 unsigned short opcode;
175 const enum optype tm_operands[];
180 /* string storage for multiple operands */
181 char operand[4][64] = { {0},{0},{0},{0}, };
183 unsigned long opcode2 = 0;
184 unsigned long lkaddr = 0;
185 enum optype src = OP_None;
186 enum optype dst = OP_None;
190 info->fprintf_func (info->stream, "%-7s", tm_name);
194 int status = (*info->read_memory_func) (memaddr + 1, buf, 2, info);
197 lkaddr = opcode2 = bfd_getl16 (buf);
200 status = (*info->read_memory_func) (memaddr + 2, buf, 2, info);
203 opcode2 = bfd_getl16 (buf);
207 for (i = 0; i < MAX_OPERANDS && OPTYPE (tm_operands[i]) != OP_None; i++)
209 char *next_comma = ",";
210 int optional = (tm_operands[i] & OPT) != 0;
212 switch (OPTYPE (tm_operands[i]))
215 sprint_dual_address (info, operand[i], XMEM (opcode));
216 info->fprintf_func (info->stream, "%s%s", comma, operand[i]);
219 sprint_dual_address (info, operand[i], YMEM (opcode));
220 info->fprintf_func (info->stream, "%s%s", comma, operand[i]);
225 info->fprintf_func (info->stream, "%s", comma);
226 if (INDIRECT (opcode))
228 if (MOD (opcode) >= 12)
230 bfd_vma addr = lkaddr;
231 int arf = ARF (opcode);
232 int mod = MOD (opcode);
234 info->fprintf_func (info->stream, "*(");
236 info->fprintf_func (info->stream, "*%sar%d(",
237 (mod == 13 || mod == 14 ? "+" : ""),
239 (*(info->print_address_func)) ((bfd_vma) addr, info);
240 info->fprintf_func (info->stream, ")%s",
241 mod == 14 ? "%" : "");
245 sprint_indirect_address (info, operand[i], opcode);
246 info->fprintf_func (info->stream, "%s", operand[i]);
251 /* FIXME -- use labels (print_address_func) */
252 /* in order to do this, we need to guess what DP is */
253 sprint_direct_address (info, operand[i], opcode);
254 info->fprintf_func (info->stream, "%s", operand[i]);
258 info->fprintf_func (info->stream, "%s", comma);
259 (*(info->print_address_func)) ((bfd_vma) opcode2, info);
262 /* upper 7 bits of address are in the opcode */
263 opcode2 += ((unsigned long) opcode & 0x7F) << 16;
266 info->fprintf_func (info->stream, "%s", comma);
267 (*(info->print_address_func)) ((bfd_vma) opcode2, info);
270 sprint_mmr (info, operand[i], MMRX (opcode));
271 info->fprintf_func (info->stream, "%s%s", comma, operand[i]);
274 sprint_mmr (info, operand[i], MMRY (opcode));
275 info->fprintf_func (info->stream, "%s%s", comma, operand[i]);
278 sprint_mmr (info, operand[i], MMR (opcode));
279 info->fprintf_func (info->stream, "%s%s", comma, operand[i]);
282 sprintf (operand[i], "pa%d", (unsigned) opcode2);
283 info->fprintf_func (info->stream, "%s%s", comma, operand[i]);
286 src = SRC (ext ? opcode2 : opcode) ? OP_B : OP_A;
287 sprintf (operand[i], (src == OP_B) ? "b" : "a");
288 info->fprintf_func (info->stream, "%s%s", comma, operand[i]);
291 src = SRC1 (ext ? opcode2 : opcode) ? OP_B : OP_A;
292 sprintf (operand[i], (src == OP_B) ? "b" : "a");
293 info->fprintf_func (info->stream, "%s%s", comma, operand[i]);
296 dst = DST (opcode) ? OP_B : OP_A;
297 sprintf (operand[i], (dst == OP_B) ? "a" : "b");
298 info->fprintf_func (info->stream, "%s%s", comma, operand[i]);
301 dst = DST (ext ? opcode2 : opcode) ? OP_B : OP_A;
302 if (!optional || dst != src)
304 sprintf (operand[i], (dst == OP_B) ? "b" : "a");
305 info->fprintf_func (info->stream, "%s%s", comma, operand[i]);
311 sprintf (operand[i], "b");
312 info->fprintf_func (info->stream, "%s%s", comma, operand[i]);
315 sprintf (operand[i], "a");
316 info->fprintf_func (info->stream, "%s%s", comma, operand[i]);
319 sprintf (operand[i], "ar%d", (int) ARX (opcode));
320 info->fprintf_func (info->stream, "%s%s", comma, operand[i]);
323 shift = SHIFT (ext ? opcode2 : opcode);
324 if (!optional || shift != 0)
326 sprintf (operand[i], "%d", shift);
327 info->fprintf_func (info->stream, "%s%s", comma, operand[i]);
333 shift = SHFT (opcode);
334 if (!optional || shift != 0)
336 sprintf (operand[i], "%d", (unsigned) shift);
337 info->fprintf_func (info->stream, "%s%s", comma, operand[i]);
343 sprintf (operand[i], "#%d", (int) (short) opcode2);
344 info->fprintf_func (info->stream, "%s%s", comma, operand[i]);
347 sprintf (operand[i], "t");
348 info->fprintf_func (info->stream, "%s%s", comma, operand[i]);
351 sprintf (operand[i], "ts");
352 info->fprintf_func (info->stream, "%s%s", comma, operand[i]);
355 sprintf (operand[i], "%d", (int) ((signed char) (opcode & 0xFF)));
356 info->fprintf_func (info->stream, "%s%s", comma, operand[i]);
359 sprintf (operand[i], "16");
360 info->fprintf_func (info->stream, "%s%s", comma, operand[i]);
363 sprintf (operand[i], "asm");
364 info->fprintf_func (info->stream, "%s%s", comma, operand[i]);
367 sprintf (operand[i], "%d", (int) (opcode & 0xF));
368 info->fprintf_func (info->stream, "%s%s", comma, operand[i]);
371 /* put all CC operands in the same operand */
372 sprint_condition (info, operand[i], opcode);
373 info->fprintf_func (info->stream, "%s%s", comma, operand[i]);
377 sprint_cc2 (info, operand[i], opcode);
378 info->fprintf_func (info->stream, "%s%s", comma, operand[i]);
382 const char *code[] = { "eq", "lt", "gt", "neq" };
383 sprintf (operand[i], code[CC3 (opcode)]);
384 info->fprintf_func (info->stream, "%s%s", comma, operand[i]);
389 int code = (opcode >> 8) & 0x3;
390 sprintf (operand[i], "%d", (code == 0) ? 1 : (code == 2) ? 2 : 3);
391 info->fprintf_func (info->stream, "%s%s", comma, operand[i]);
395 sprintf (operand[i], "#%d",
396 (int) (((signed char) opcode & 0x1F) << 3) >> 3);
397 info->fprintf_func (info->stream, "%s%s", comma, operand[i]);
400 sprintf (operand[i], "#%d", (unsigned) (opcode & 0xFF));
401 info->fprintf_func (info->stream, "%s%s", comma, operand[i]);
404 sprintf (operand[i], "#%d", (int) (opcode & 0x7));
405 info->fprintf_func (info->stream, "%s%s", comma, operand[i]);
408 sprintf (operand[i], "#%d", (unsigned) opcode2);
409 info->fprintf_func (info->stream, "%s%s", comma, operand[i]);
412 n = (opcode >> 9) & 0x1;
413 sprintf (operand[i], "st%d", n);
414 info->fprintf_func (info->stream, "%s%s", comma, operand[i]);
418 const char *status0[] = {
419 "0", "1", "2", "3", "4", "5", "6", "7", "8",
420 "ovb", "ova", "c", "tc", "13", "14", "15"
422 const char *status1[] = {
423 "0", "1", "2", "3", "4",
424 "cmpt", "frct", "c16", "sxm", "ovm", "10",
425 "intm", "hm", "xf", "cpl", "braf"
427 sprintf (operand[i], "%s",
428 n ? status1[SBIT (opcode)] : status0[SBIT (opcode)]);
429 info->fprintf_func (info->stream, "%s%s", comma, operand[i]);
433 sprintf (operand[i], "%d", (int) ((opcode >> 9) & 1) + 1);
434 info->fprintf_func (info->stream, "%s%s", comma, operand[i]);
437 sprintf (operand[i], "trn");
438 info->fprintf_func (info->stream, "%s%s", comma, operand[i]);
441 sprintf (operand[i], "dp");
442 info->fprintf_func (info->stream, "%s%s", comma, operand[i]);
445 /* FIXME-- this is DP, print the original address? */
446 sprintf (operand[i], "#%d", (int) (opcode & 0x1FF));
447 info->fprintf_func (info->stream, "%s%s", comma, operand[i]);
450 sprintf (operand[i], "arp");
451 info->fprintf_func (info->stream, "%s%s", comma, operand[i]);
454 sprintf (operand[i], "%d", (int) (opcode & 0x1F));
455 info->fprintf_func (info->stream, "%s%s", comma, operand[i]);
458 sprintf (operand[i], "??? (0x%x)", tm_operands[i]);
459 info->fprintf_func (info->stream, "%s%s", comma, operand[i]);
468 print_parallel_instruction (info, memaddr, opcode, ptm, size)
469 disassemble_info *info;
471 unsigned short opcode;
475 print_instruction (info, memaddr, opcode,
476 ptm->name, ptm->operand_types, size, 0);
477 info->fprintf_func (info->stream, " || ");
478 return print_instruction (info, memaddr, opcode,
479 ptm->parname, ptm->paroperand_types, size, 0);
483 sprint_dual_address (info, buf, code)
484 disassemble_info *info ATTRIBUTE_UNUSED;
488 const char *formats[] = {
494 return sprintf (buf, formats[XMOD (code)], XARX (code));
498 sprint_indirect_address (info, buf, opcode)
499 disassemble_info *info ATTRIBUTE_UNUSED;
501 unsigned short opcode;
503 const char *formats[] = {
517 return sprintf (buf, formats[MOD (opcode)], ARF (opcode));
521 sprint_direct_address (info, buf, opcode)
522 disassemble_info *info ATTRIBUTE_UNUSED;
524 unsigned short opcode;
526 /* FIXME -- look up relocation if available */
527 return sprintf (buf, "DP+0x%02x", (int) (opcode & 0x7F));
531 sprint_mmr (info, buf, mmr)
532 disassemble_info *info ATTRIBUTE_UNUSED;
536 symbol *reg = (symbol *) mmregs;
537 while (reg->name != NULL)
539 if (mmr == reg->value)
541 sprintf (buf, "%s", (reg + 1)->name);
546 sprintf (buf, "MMR(%d)", mmr); /* FIXME -- different targets. */
551 sprint_cc2 (info, buf, opcode)
552 disassemble_info *info ATTRIBUTE_UNUSED;
554 unsigned short opcode;
556 const char *cc2[] = {
557 "??", "??", "ageq", "alt", "aneq", "aeq", "agt", "aleq",
558 "??", "??", "bgeq", "blt", "bneq", "beq", "bgt", "bleq",
560 return sprintf (buf, "%s", cc2[opcode & 0xF]);
564 sprint_condition (info, buf, opcode)
565 disassemble_info *info ATTRIBUTE_UNUSED;
567 unsigned short opcode;
570 const char *cmp[] = {
571 "??", "??", "geq", "lt", "neq", "eq", "gt", "leq"
575 char acc = (opcode & 0x8) ? 'b' : 'a';
577 buf += sprintf (buf, "%c%s%s", acc, cmp[(opcode & 0x7)],
578 (opcode & 0x20) ? ", " : "");
580 buf += sprintf (buf, "%c%s", acc, (opcode & 0x10) ? "ov" : "nov");
582 else if (opcode & 0x3F)
585 buf += sprintf (buf, "%s%s",
586 ((opcode & 0x30) == 0x30) ? "tc" : "ntc",
587 (opcode & 0x0F) ? ", " : "");
589 buf += sprintf (buf, "%s%s",
590 ((opcode & 0x0C) == 0x0C) ? "c" : "nc",
591 (opcode & 0x03) ? ", " : "");
593 buf += sprintf (buf, "%s",
594 ((opcode & 0x03) == 0x03) ? "bio" : "nbio");
597 buf += sprintf (buf, "unc");