1 /* Disassembly routines for TMS320C54X architecture
2 Copyright 1999, 2000, 2001 Free Software Foundation, Inc.
3 Contributed by Timothy Wall (twall@cygnus.com)
5 This program is free software; you can redistribute it and/or modify
6 it under the terms of the GNU General Public License as published by
7 the Free Software Foundation; either version 2 of the License, or
8 (at your option) any later version.
10 This program is distributed in the hope that it will be useful,
11 but WITHOUT ANY WARRANTY; without even the implied warranty of
12 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 GNU General Public License for more details.
15 You should have received a copy of the GNU General Public License
16 along with this program; if not, write to the Free Software
17 Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
25 #include "opcode/tic54x.h"
26 #include "coff/tic54x.h"
28 static int has_lkaddr (unsigned short, const template *);
29 static int get_insn_size (unsigned short, const template *);
30 static int print_instruction (disassemble_info *, bfd_vma,
31 unsigned short, const char *,
32 const enum optype [], int, int);
33 static int print_parallel_instruction (disassemble_info *, bfd_vma,
35 const template *, int);
36 static int sprint_dual_address (disassemble_info *,char [],
38 static int sprint_indirect_address (disassemble_info *,char [],
40 static int sprint_direct_address (disassemble_info *,char [],
42 static int sprint_mmr (disassemble_info *,char [],int);
43 static int sprint_condition (disassemble_info *,char *,unsigned short);
44 static int sprint_cc2 (disassemble_info *,char *,unsigned short);
47 print_insn_tic54x (bfd_vma memaddr, disassemble_info *info)
50 unsigned short opcode;
54 status = (*info->read_memory_func) (memaddr, opbuf, 2, info);
57 (*info->memory_error_func) (status, memaddr, info);
61 opcode = bfd_getl16 (opbuf);
62 tm = tic54x_get_insn (info, memaddr, opcode, &size);
64 info->bytes_per_line = 2;
65 info->bytes_per_chunk = 2;
66 info->octets_per_byte = 2;
67 info->display_endian = BFD_ENDIAN_LITTLE;
69 if (tm->flags & FL_PAR)
71 if (!print_parallel_instruction (info, memaddr, opcode, tm, size))
76 if (!print_instruction (info, memaddr, opcode,
79 size, (tm->flags & FL_EXT)))
87 has_lkaddr (unsigned short memdata, const template *tm)
89 return (IS_LKADDR (memdata)
90 && (OPTYPE (tm->operand_types[0]) == OP_Smem
91 || OPTYPE (tm->operand_types[1]) == OP_Smem
92 || OPTYPE (tm->operand_types[2]) == OP_Smem
93 || OPTYPE (tm->operand_types[1]) == OP_Sind
94 || OPTYPE (tm->operand_types[0]) == OP_Lmem
95 || OPTYPE (tm->operand_types[1]) == OP_Lmem));
98 /* always returns 1 (whether an insn template was found) since we provide an
99 "unknown instruction" template */
101 tic54x_get_insn (disassemble_info *info, bfd_vma addr,
102 unsigned short memdata, int *size)
104 const template *tm = NULL;
106 for (tm = tic54x_optab; tm->name; tm++)
108 if (tm->opcode == (memdata & tm->mask))
110 /* a few opcodes span two words */
111 if (tm->flags & FL_EXT)
113 /* if lk addressing is used, the second half of the opcode gets
114 pushed one word later */
116 bfd_vma addr2 = addr + 1 + has_lkaddr (memdata, tm);
117 int status = (*info->read_memory_func) (addr2, opbuf, 2, info);
118 // FIXME handle errors
121 unsigned short data2 = bfd_getl16 (opbuf);
122 if (tm->opcode2 == (data2 & tm->mask2))
124 if (size) *size = get_insn_size (memdata, tm);
131 if (size) *size = get_insn_size (memdata, tm);
136 for (tm = (template *) tic54x_paroptab; tm->name; tm++)
138 if (tm->opcode == (memdata & tm->mask))
140 if (size) *size = get_insn_size (memdata, tm);
146 return &tic54x_unknown_opcode;
150 get_insn_size (unsigned short memdata, const template *insn)
154 if (insn->flags & FL_PAR)
156 /* only non-parallel instructions support lk addressing */
161 size = insn->words + has_lkaddr (memdata, insn);
168 print_instruction (info, memaddr, opcode, tm_name, tm_operands, size, ext)
169 disassemble_info *info;
171 unsigned short opcode;
173 const enum optype tm_operands[];
178 /* string storage for multiple operands */
179 char operand[4][64] = { {0},{0},{0},{0}, };
181 unsigned long opcode2 = 0;
182 unsigned long lkaddr = 0;
183 enum optype src = OP_None;
184 enum optype dst = OP_None;
188 info->fprintf_func (info->stream, "%-7s", tm_name);
192 int status = (*info->read_memory_func) (memaddr + 1, buf, 2, info);
195 lkaddr = opcode2 = bfd_getl16 (buf);
198 status = (*info->read_memory_func) (memaddr + 2, buf, 2, info);
201 opcode2 = bfd_getl16 (buf);
205 for (i = 0; i < MAX_OPERANDS && OPTYPE (tm_operands[i]) != OP_None; i++)
207 char *next_comma = ",";
208 int optional = (tm_operands[i] & OPT) != 0;
210 switch (OPTYPE (tm_operands[i]))
213 sprint_dual_address (info, operand[i], XMEM (opcode));
214 info->fprintf_func (info->stream, "%s%s", comma, operand[i]);
217 sprint_dual_address (info, operand[i], YMEM (opcode));
218 info->fprintf_func (info->stream, "%s%s", comma, operand[i]);
223 info->fprintf_func (info->stream, "%s", comma);
224 if (INDIRECT (opcode))
226 if (MOD (opcode) >= 12)
228 bfd_vma addr = lkaddr;
229 int arf = ARF (opcode);
230 int mod = MOD (opcode);
232 info->fprintf_func (info->stream, "*(");
234 info->fprintf_func (info->stream, "*%sar%d(",
235 (mod == 13 || mod == 14 ? "+" : ""),
237 (*(info->print_address_func)) ((bfd_vma) addr, info);
238 info->fprintf_func (info->stream, ")%s",
239 mod == 14 ? "%" : "");
243 sprint_indirect_address (info, operand[i], opcode);
244 info->fprintf_func (info->stream, "%s", operand[i]);
249 /* FIXME -- use labels (print_address_func) */
250 /* in order to do this, we need to guess what DP is */
251 sprint_direct_address (info, operand[i], opcode);
252 info->fprintf_func (info->stream, "%s", operand[i]);
256 info->fprintf_func (info->stream, "%s", comma);
257 (*(info->print_address_func)) ((bfd_vma) opcode2, info);
260 /* upper 7 bits of address are in the opcode */
261 opcode2 += ((unsigned long) opcode & 0x7F) << 16;
264 info->fprintf_func (info->stream, "%s", comma);
265 (*(info->print_address_func)) ((bfd_vma) opcode2, info);
268 sprint_mmr (info, operand[i], MMRX (opcode));
269 info->fprintf_func (info->stream, "%s%s", comma, operand[i]);
272 sprint_mmr (info, operand[i], MMRY (opcode));
273 info->fprintf_func (info->stream, "%s%s", comma, operand[i]);
276 sprint_mmr (info, operand[i], MMR (opcode));
277 info->fprintf_func (info->stream, "%s%s", comma, operand[i]);
280 sprintf (operand[i], "pa%d", (unsigned) opcode2);
281 info->fprintf_func (info->stream, "%s%s", comma, operand[i]);
284 src = SRC (ext ? opcode2 : opcode) ? OP_B : OP_A;
285 sprintf (operand[i], (src == OP_B) ? "b" : "a");
286 info->fprintf_func (info->stream, "%s%s", comma, operand[i]);
289 src = SRC1 (ext ? opcode2 : opcode) ? OP_B : OP_A;
290 sprintf (operand[i], (src == OP_B) ? "b" : "a");
291 info->fprintf_func (info->stream, "%s%s", comma, operand[i]);
294 dst = DST (opcode) ? OP_B : OP_A;
295 sprintf (operand[i], (dst == OP_B) ? "a" : "b");
296 info->fprintf_func (info->stream, "%s%s", comma, operand[i]);
299 dst = DST (ext ? opcode2 : opcode) ? OP_B : OP_A;
300 if (!optional || dst != src)
302 sprintf (operand[i], (dst == OP_B) ? "b" : "a");
303 info->fprintf_func (info->stream, "%s%s", comma, operand[i]);
309 sprintf (operand[i], "b");
310 info->fprintf_func (info->stream, "%s%s", comma, operand[i]);
313 sprintf (operand[i], "a");
314 info->fprintf_func (info->stream, "%s%s", comma, operand[i]);
317 sprintf (operand[i], "ar%d", (int) ARX (opcode));
318 info->fprintf_func (info->stream, "%s%s", comma, operand[i]);
321 shift = SHIFT (ext ? opcode2 : opcode);
322 if (!optional || shift != 0)
324 sprintf (operand[i], "%d", shift);
325 info->fprintf_func (info->stream, "%s%s", comma, operand[i]);
331 shift = SHFT (opcode);
332 if (!optional || shift != 0)
334 sprintf (operand[i], "%d", (unsigned) shift);
335 info->fprintf_func (info->stream, "%s%s", comma, operand[i]);
341 sprintf (operand[i], "#%d", (int) (short) opcode2);
342 info->fprintf_func (info->stream, "%s%s", comma, operand[i]);
345 sprintf (operand[i], "t");
346 info->fprintf_func (info->stream, "%s%s", comma, operand[i]);
349 sprintf (operand[i], "ts");
350 info->fprintf_func (info->stream, "%s%s", comma, operand[i]);
353 sprintf (operand[i], "%d", (int) ((signed char) (opcode & 0xFF)));
354 info->fprintf_func (info->stream, "%s%s", comma, operand[i]);
357 sprintf (operand[i], "16");
358 info->fprintf_func (info->stream, "%s%s", comma, operand[i]);
361 sprintf (operand[i], "asm");
362 info->fprintf_func (info->stream, "%s%s", comma, operand[i]);
365 sprintf (operand[i], "%d", (int) (opcode & 0xF));
366 info->fprintf_func (info->stream, "%s%s", comma, operand[i]);
369 /* put all CC operands in the same operand */
370 sprint_condition (info, operand[i], opcode);
371 info->fprintf_func (info->stream, "%s%s", comma, operand[i]);
375 sprint_cc2 (info, operand[i], opcode);
376 info->fprintf_func (info->stream, "%s%s", comma, operand[i]);
380 const char *code[] = { "eq", "lt", "gt", "neq" };
381 sprintf (operand[i], code[CC3 (opcode)]);
382 info->fprintf_func (info->stream, "%s%s", comma, operand[i]);
387 int code = (opcode >> 8) & 0x3;
388 sprintf (operand[i], "%d", (code == 0) ? 1 : (code == 2) ? 2 : 3);
389 info->fprintf_func (info->stream, "%s%s", comma, operand[i]);
393 sprintf (operand[i], "#%d",
394 (int) (((signed char) opcode & 0x1F) << 3) >> 3);
395 info->fprintf_func (info->stream, "%s%s", comma, operand[i]);
398 sprintf (operand[i], "#%d", (unsigned) (opcode & 0xFF));
399 info->fprintf_func (info->stream, "%s%s", comma, operand[i]);
402 sprintf (operand[i], "#%d", (int) (opcode & 0x7));
403 info->fprintf_func (info->stream, "%s%s", comma, operand[i]);
406 sprintf (operand[i], "#%d", (unsigned) opcode2);
407 info->fprintf_func (info->stream, "%s%s", comma, operand[i]);
410 n = (opcode >> 9) & 0x1;
411 sprintf (operand[i], "st%d", n);
412 info->fprintf_func (info->stream, "%s%s", comma, operand[i]);
416 const char *status0[] = {
417 "0", "1", "2", "3", "4", "5", "6", "7", "8",
418 "ovb", "ova", "c", "tc", "13", "14", "15"
420 const char *status1[] = {
421 "0", "1", "2", "3", "4",
422 "cmpt", "frct", "c16", "sxm", "ovm", "10",
423 "intm", "hm", "xf", "cpl", "braf"
425 sprintf (operand[i], "%s",
426 n ? status1[SBIT (opcode)] : status0[SBIT (opcode)]);
427 info->fprintf_func (info->stream, "%s%s", comma, operand[i]);
431 sprintf (operand[i], "%d", (int) ((opcode >> 9) & 1) + 1);
432 info->fprintf_func (info->stream, "%s%s", comma, operand[i]);
435 sprintf (operand[i], "trn");
436 info->fprintf_func (info->stream, "%s%s", comma, operand[i]);
439 sprintf (operand[i], "dp");
440 info->fprintf_func (info->stream, "%s%s", comma, operand[i]);
443 /* FIXME-- this is DP, print the original address? */
444 sprintf (operand[i], "#%d", (int) (opcode & 0x1FF));
445 info->fprintf_func (info->stream, "%s%s", comma, operand[i]);
448 sprintf (operand[i], "arp");
449 info->fprintf_func (info->stream, "%s%s", comma, operand[i]);
452 sprintf (operand[i], "%d", (int) (opcode & 0x1F));
453 info->fprintf_func (info->stream, "%s%s", comma, operand[i]);
456 sprintf (operand[i], "??? (0x%x)", tm_operands[i]);
457 info->fprintf_func (info->stream, "%s%s", comma, operand[i]);
466 print_parallel_instruction (info, memaddr, opcode, ptm, size)
467 disassemble_info *info;
469 unsigned short opcode;
473 print_instruction (info, memaddr, opcode,
474 ptm->name, ptm->operand_types, size, 0);
475 info->fprintf_func (info->stream, " || ");
476 return print_instruction (info, memaddr, opcode,
477 ptm->parname, ptm->paroperand_types, size, 0);
481 sprint_dual_address (info, buf, code)
482 disassemble_info *info ATTRIBUTE_UNUSED;
486 const char *formats[] = {
492 return sprintf (buf, formats[XMOD (code)], XARX (code));
496 sprint_indirect_address (info, buf, opcode)
497 disassemble_info *info ATTRIBUTE_UNUSED;
499 unsigned short opcode;
501 const char *formats[] = {
515 return sprintf (buf, formats[MOD (opcode)], ARF (opcode));
519 sprint_direct_address (info, buf, opcode)
520 disassemble_info *info ATTRIBUTE_UNUSED;
522 unsigned short opcode;
524 /* FIXME -- look up relocation if available */
525 return sprintf (buf, "DP+0x%02x", (int) (opcode & 0x7F));
529 sprint_mmr (info, buf, mmr)
530 disassemble_info *info ATTRIBUTE_UNUSED;
534 symbol *reg = (symbol *) mmregs;
535 while (reg->name != NULL)
537 if (mmr == reg->value)
539 sprintf (buf, "%s", (reg + 1)->name);
544 sprintf (buf, "MMR(%d)", mmr); /* FIXME -- different targets. */
549 sprint_cc2 (info, buf, opcode)
550 disassemble_info *info ATTRIBUTE_UNUSED;
552 unsigned short opcode;
554 const char *cc2[] = {
555 "??", "??", "ageq", "alt", "aneq", "aeq", "agt", "aleq",
556 "??", "??", "bgeq", "blt", "bneq", "beq", "bgt", "bleq",
558 return sprintf (buf, "%s", cc2[opcode & 0xF]);
562 sprint_condition (info, buf, opcode)
563 disassemble_info *info ATTRIBUTE_UNUSED;
565 unsigned short opcode;
568 const char *cmp[] = {
569 "??", "??", "geq", "lt", "neq", "eq", "gt", "leq"
573 char acc = (opcode & 0x8) ? 'b' : 'a';
575 buf += sprintf (buf, "%c%s%s", acc, cmp[(opcode & 0x7)],
576 (opcode & 0x20) ? ", " : "");
578 buf += sprintf (buf, "%c%s", acc, (opcode & 0x10) ? "ov" : "nov");
580 else if (opcode & 0x3F)
583 buf += sprintf (buf, "%s%s",
584 ((opcode & 0x30) == 0x30) ? "tc" : "ntc",
585 (opcode & 0x0F) ? ", " : "");
587 buf += sprintf (buf, "%s%s",
588 ((opcode & 0x0C) == 0x0C) ? "c" : "nc",
589 (opcode & 0x03) ? ", " : "");
591 buf += sprintf (buf, "%s",
592 ((opcode & 0x03) == 0x03) ? "bio" : "nbio");
595 buf += sprintf (buf, "unc");