1 /* Disassembly routines for TMS320C54X architecture
2 Copyright 1999, 2000, 2001, 2005, 2007, 2009, 2012
3 Free Software Foundation, Inc.
4 Contributed by Timothy Wall (twall@cygnus.com)
6 This file is part of the GNU opcodes library.
8 This library is free software; you can redistribute it and/or modify
9 it under the terms of the GNU General Public License as published by
10 the Free Software Foundation; either version 3, or (at your option)
13 It is distributed in the hope that it will be useful, but WITHOUT
14 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
15 or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public
16 License for more details.
18 You should have received a copy of the GNU General Public License
19 along with this file; see the file COPYING. If not, write to the
20 Free Software Foundation, 51 Franklin Street - Fifth Floor, Boston,
21 MA 02110-1301, USA. */
28 #include "opcode/tic54x.h"
29 #include "coff/tic54x.h"
31 static int has_lkaddr (unsigned short, const insn_template *);
32 static int get_insn_size (unsigned short, const insn_template *);
33 static int print_instruction (disassemble_info *, bfd_vma,
34 unsigned short, const char *,
35 const enum optype [], int, int);
36 static int print_parallel_instruction (disassemble_info *, bfd_vma,
38 const insn_template *, int);
39 static int sprint_dual_address (disassemble_info *,char [],
41 static int sprint_indirect_address (disassemble_info *,char [],
43 static int sprint_direct_address (disassemble_info *,char [],
45 static int sprint_mmr (disassemble_info *,char [],int);
46 static int sprint_condition (disassemble_info *,char *,unsigned short);
47 static int sprint_cc2 (disassemble_info *,char *,unsigned short);
50 print_insn_tic54x (bfd_vma memaddr, disassemble_info *info)
53 unsigned short opcode;
55 const insn_template* tm;
57 status = (*info->read_memory_func) (memaddr, opbuf, 2, info);
60 (*info->memory_error_func) (status, memaddr, info);
64 opcode = bfd_getl16 (opbuf);
65 tm = tic54x_get_insn (info, memaddr, opcode, &size);
67 info->bytes_per_line = 2;
68 info->bytes_per_chunk = 2;
69 info->octets_per_byte = 2;
70 info->display_endian = BFD_ENDIAN_LITTLE;
72 if (tm->flags & FL_PAR)
74 if (!print_parallel_instruction (info, memaddr, opcode, tm, size))
79 if (!print_instruction (info, memaddr, opcode,
82 size, (tm->flags & FL_EXT)))
90 has_lkaddr (unsigned short memdata, const insn_template *tm)
92 return (IS_LKADDR (memdata)
93 && (OPTYPE (tm->operand_types[0]) == OP_Smem
94 || OPTYPE (tm->operand_types[1]) == OP_Smem
95 || OPTYPE (tm->operand_types[2]) == OP_Smem
96 || OPTYPE (tm->operand_types[1]) == OP_Sind
97 || OPTYPE (tm->operand_types[0]) == OP_Lmem
98 || OPTYPE (tm->operand_types[1]) == OP_Lmem));
101 /* always returns 1 (whether an insn template was found) since we provide an
102 "unknown instruction" template */
104 tic54x_get_insn (disassemble_info *info, bfd_vma addr,
105 unsigned short memdata, int *size)
107 const insn_template *tm = NULL;
109 for (tm = tic54x_optab; tm->name; tm++)
111 if (tm->opcode == (memdata & tm->mask))
113 /* a few opcodes span two words */
114 if (tm->flags & FL_EXT)
116 /* if lk addressing is used, the second half of the opcode gets
117 pushed one word later */
119 bfd_vma addr2 = addr + 1 + has_lkaddr (memdata, tm);
120 int status = (*info->read_memory_func) (addr2, opbuf, 2, info);
121 // FIXME handle errors
124 unsigned short data2 = bfd_getl16 (opbuf);
125 if (tm->opcode2 == (data2 & tm->mask2))
127 if (size) *size = get_insn_size (memdata, tm);
134 if (size) *size = get_insn_size (memdata, tm);
139 for (tm = (insn_template *) tic54x_paroptab; tm->name; tm++)
141 if (tm->opcode == (memdata & tm->mask))
143 if (size) *size = get_insn_size (memdata, tm);
149 return &tic54x_unknown_opcode;
153 get_insn_size (unsigned short memdata, const insn_template *insn)
157 if (insn->flags & FL_PAR)
159 /* only non-parallel instructions support lk addressing */
164 size = insn->words + has_lkaddr (memdata, insn);
171 print_instruction (info, memaddr, opcode, tm_name, tm_operands, size, ext)
172 disassemble_info *info;
174 unsigned short opcode;
176 const enum optype tm_operands[];
181 /* string storage for multiple operands */
182 char operand[4][64] = { {0},{0},{0},{0}, };
184 unsigned long opcode2 = 0;
185 unsigned long lkaddr = 0;
186 enum optype src = OP_None;
187 enum optype dst = OP_None;
191 info->fprintf_func (info->stream, "%-7s", tm_name);
195 int status = (*info->read_memory_func) (memaddr + 1, buf, 2, info);
198 lkaddr = opcode2 = bfd_getl16 (buf);
201 status = (*info->read_memory_func) (memaddr + 2, buf, 2, info);
204 opcode2 = bfd_getl16 (buf);
208 for (i = 0; i < MAX_OPERANDS && OPTYPE (tm_operands[i]) != OP_None; i++)
210 char *next_comma = ",";
211 int optional = (tm_operands[i] & OPT) != 0;
213 switch (OPTYPE (tm_operands[i]))
216 sprint_dual_address (info, operand[i], XMEM (opcode));
217 info->fprintf_func (info->stream, "%s%s", comma, operand[i]);
220 sprint_dual_address (info, operand[i], YMEM (opcode));
221 info->fprintf_func (info->stream, "%s%s", comma, operand[i]);
226 info->fprintf_func (info->stream, "%s", comma);
227 if (INDIRECT (opcode))
229 if (MOD (opcode) >= 12)
231 bfd_vma addr = lkaddr;
232 int arf = ARF (opcode);
233 int mod = MOD (opcode);
235 info->fprintf_func (info->stream, "*(");
237 info->fprintf_func (info->stream, "*%sar%d(",
238 (mod == 13 || mod == 14 ? "+" : ""),
240 (*(info->print_address_func)) ((bfd_vma) addr, info);
241 info->fprintf_func (info->stream, ")%s",
242 mod == 14 ? "%" : "");
246 sprint_indirect_address (info, operand[i], opcode);
247 info->fprintf_func (info->stream, "%s", operand[i]);
252 /* FIXME -- use labels (print_address_func) */
253 /* in order to do this, we need to guess what DP is */
254 sprint_direct_address (info, operand[i], opcode);
255 info->fprintf_func (info->stream, "%s", operand[i]);
259 info->fprintf_func (info->stream, "%s", comma);
260 (*(info->print_address_func)) ((bfd_vma) opcode2, info);
263 /* upper 7 bits of address are in the opcode */
264 opcode2 += ((unsigned long) opcode & 0x7F) << 16;
267 info->fprintf_func (info->stream, "%s", comma);
268 (*(info->print_address_func)) ((bfd_vma) opcode2, info);
271 sprint_mmr (info, operand[i], MMRX (opcode));
272 info->fprintf_func (info->stream, "%s%s", comma, operand[i]);
275 sprint_mmr (info, operand[i], MMRY (opcode));
276 info->fprintf_func (info->stream, "%s%s", comma, operand[i]);
279 sprint_mmr (info, operand[i], MMR (opcode));
280 info->fprintf_func (info->stream, "%s%s", comma, operand[i]);
283 sprintf (operand[i], "pa%d", (unsigned) opcode2);
284 info->fprintf_func (info->stream, "%s%s", comma, operand[i]);
287 src = SRC (ext ? opcode2 : opcode) ? OP_B : OP_A;
288 sprintf (operand[i], (src == OP_B) ? "b" : "a");
289 info->fprintf_func (info->stream, "%s%s", comma, operand[i]);
292 src = SRC1 (ext ? opcode2 : opcode) ? OP_B : OP_A;
293 sprintf (operand[i], (src == OP_B) ? "b" : "a");
294 info->fprintf_func (info->stream, "%s%s", comma, operand[i]);
297 dst = DST (opcode) ? OP_B : OP_A;
298 sprintf (operand[i], (dst == OP_B) ? "a" : "b");
299 info->fprintf_func (info->stream, "%s%s", comma, operand[i]);
302 dst = DST (ext ? opcode2 : opcode) ? OP_B : OP_A;
303 if (!optional || dst != src)
305 sprintf (operand[i], (dst == OP_B) ? "b" : "a");
306 info->fprintf_func (info->stream, "%s%s", comma, operand[i]);
312 sprintf (operand[i], "b");
313 info->fprintf_func (info->stream, "%s%s", comma, operand[i]);
316 sprintf (operand[i], "a");
317 info->fprintf_func (info->stream, "%s%s", comma, operand[i]);
320 sprintf (operand[i], "ar%d", (int) ARX (opcode));
321 info->fprintf_func (info->stream, "%s%s", comma, operand[i]);
324 shift = SHIFT (ext ? opcode2 : opcode);
325 if (!optional || shift != 0)
327 sprintf (operand[i], "%d", shift);
328 info->fprintf_func (info->stream, "%s%s", comma, operand[i]);
334 shift = SHFT (opcode);
335 if (!optional || shift != 0)
337 sprintf (operand[i], "%d", (unsigned) shift);
338 info->fprintf_func (info->stream, "%s%s", comma, operand[i]);
344 sprintf (operand[i], "#%d", (int) (short) opcode2);
345 info->fprintf_func (info->stream, "%s%s", comma, operand[i]);
348 sprintf (operand[i], "t");
349 info->fprintf_func (info->stream, "%s%s", comma, operand[i]);
352 sprintf (operand[i], "ts");
353 info->fprintf_func (info->stream, "%s%s", comma, operand[i]);
356 sprintf (operand[i], "%d", (int) ((signed char) (opcode & 0xFF)));
357 info->fprintf_func (info->stream, "%s%s", comma, operand[i]);
360 sprintf (operand[i], "16");
361 info->fprintf_func (info->stream, "%s%s", comma, operand[i]);
364 sprintf (operand[i], "asm");
365 info->fprintf_func (info->stream, "%s%s", comma, operand[i]);
368 sprintf (operand[i], "%d", (int) (opcode & 0xF));
369 info->fprintf_func (info->stream, "%s%s", comma, operand[i]);
372 /* put all CC operands in the same operand */
373 sprint_condition (info, operand[i], opcode);
374 info->fprintf_func (info->stream, "%s%s", comma, operand[i]);
378 sprint_cc2 (info, operand[i], opcode);
379 info->fprintf_func (info->stream, "%s%s", comma, operand[i]);
383 const char *code[] = { "eq", "lt", "gt", "neq" };
385 /* Do not use sprintf with only two parameters as a
386 compiler warning could be generated in such conditions. */
387 sprintf (operand[i], "%s", code[CC3 (opcode)]);
388 info->fprintf_func (info->stream, "%s%s", comma, operand[i]);
393 int code = (opcode >> 8) & 0x3;
394 sprintf (operand[i], "%d", (code == 0) ? 1 : (code == 2) ? 2 : 3);
395 info->fprintf_func (info->stream, "%s%s", comma, operand[i]);
399 sprintf (operand[i], "#%d",
400 (int) (((signed char) opcode & 0x1F) << 3) >> 3);
401 info->fprintf_func (info->stream, "%s%s", comma, operand[i]);
404 sprintf (operand[i], "#%d", (unsigned) (opcode & 0xFF));
405 info->fprintf_func (info->stream, "%s%s", comma, operand[i]);
408 sprintf (operand[i], "#%d", (int) (opcode & 0x7));
409 info->fprintf_func (info->stream, "%s%s", comma, operand[i]);
412 sprintf (operand[i], "#%d", (unsigned) opcode2);
413 info->fprintf_func (info->stream, "%s%s", comma, operand[i]);
416 n = (opcode >> 9) & 0x1;
417 sprintf (operand[i], "st%d", n);
418 info->fprintf_func (info->stream, "%s%s", comma, operand[i]);
422 const char *status0[] = {
423 "0", "1", "2", "3", "4", "5", "6", "7", "8",
424 "ovb", "ova", "c", "tc", "13", "14", "15"
426 const char *status1[] = {
427 "0", "1", "2", "3", "4",
428 "cmpt", "frct", "c16", "sxm", "ovm", "10",
429 "intm", "hm", "xf", "cpl", "braf"
431 sprintf (operand[i], "%s",
432 n ? status1[SBIT (opcode)] : status0[SBIT (opcode)]);
433 info->fprintf_func (info->stream, "%s%s", comma, operand[i]);
437 sprintf (operand[i], "%d", (int) ((opcode >> 9) & 1) + 1);
438 info->fprintf_func (info->stream, "%s%s", comma, operand[i]);
441 sprintf (operand[i], "trn");
442 info->fprintf_func (info->stream, "%s%s", comma, operand[i]);
445 sprintf (operand[i], "dp");
446 info->fprintf_func (info->stream, "%s%s", comma, operand[i]);
449 /* FIXME-- this is DP, print the original address? */
450 sprintf (operand[i], "#%d", (int) (opcode & 0x1FF));
451 info->fprintf_func (info->stream, "%s%s", comma, operand[i]);
454 sprintf (operand[i], "arp");
455 info->fprintf_func (info->stream, "%s%s", comma, operand[i]);
458 sprintf (operand[i], "%d", (int) (opcode & 0x1F));
459 info->fprintf_func (info->stream, "%s%s", comma, operand[i]);
462 sprintf (operand[i], "??? (0x%x)", tm_operands[i]);
463 info->fprintf_func (info->stream, "%s%s", comma, operand[i]);
472 print_parallel_instruction (info, memaddr, opcode, ptm, size)
473 disassemble_info *info;
475 unsigned short opcode;
476 const insn_template *ptm;
479 print_instruction (info, memaddr, opcode,
480 ptm->name, ptm->operand_types, size, 0);
481 info->fprintf_func (info->stream, " || ");
482 return print_instruction (info, memaddr, opcode,
483 ptm->parname, ptm->paroperand_types, size, 0);
487 sprint_dual_address (info, buf, code)
488 disassemble_info *info ATTRIBUTE_UNUSED;
492 const char *formats[] = {
498 return sprintf (buf, formats[XMOD (code)], XARX (code));
502 sprint_indirect_address (info, buf, opcode)
503 disassemble_info *info ATTRIBUTE_UNUSED;
505 unsigned short opcode;
507 const char *formats[] = {
521 return sprintf (buf, formats[MOD (opcode)], ARF (opcode));
525 sprint_direct_address (info, buf, opcode)
526 disassemble_info *info ATTRIBUTE_UNUSED;
528 unsigned short opcode;
530 /* FIXME -- look up relocation if available */
531 return sprintf (buf, "DP+0x%02x", (int) (opcode & 0x7F));
535 sprint_mmr (info, buf, mmr)
536 disassemble_info *info ATTRIBUTE_UNUSED;
540 symbol *reg = (symbol *) mmregs;
541 while (reg->name != NULL)
543 if (mmr == reg->value)
545 sprintf (buf, "%s", (reg + 1)->name);
550 sprintf (buf, "MMR(%d)", mmr); /* FIXME -- different targets. */
555 sprint_cc2 (info, buf, opcode)
556 disassemble_info *info ATTRIBUTE_UNUSED;
558 unsigned short opcode;
560 const char *cc2[] = {
561 "??", "??", "ageq", "alt", "aneq", "aeq", "agt", "aleq",
562 "??", "??", "bgeq", "blt", "bneq", "beq", "bgt", "bleq",
564 return sprintf (buf, "%s", cc2[opcode & 0xF]);
568 sprint_condition (info, buf, opcode)
569 disassemble_info *info ATTRIBUTE_UNUSED;
571 unsigned short opcode;
574 const char *cmp[] = {
575 "??", "??", "geq", "lt", "neq", "eq", "gt", "leq"
579 char acc = (opcode & 0x8) ? 'b' : 'a';
581 buf += sprintf (buf, "%c%s%s", acc, cmp[(opcode & 0x7)],
582 (opcode & 0x20) ? ", " : "");
584 buf += sprintf (buf, "%c%s", acc, (opcode & 0x10) ? "ov" : "nov");
586 else if (opcode & 0x3F)
589 buf += sprintf (buf, "%s%s",
590 ((opcode & 0x30) == 0x30) ? "tc" : "ntc",
591 (opcode & 0x0F) ? ", " : "");
593 buf += sprintf (buf, "%s%s",
594 ((opcode & 0x0C) == 0x0C) ? "c" : "nc",
595 (opcode & 0x03) ? ", " : "");
597 buf += sprintf (buf, "%s",
598 ((opcode & 0x03) == 0x03) ? "bio" : "nbio");
601 buf += sprintf (buf, "unc");